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S73WS256N Based MCPs
Stacked Multi-Chip Product (MCP) 512/256 Megabit (32M/16M x 16-bit) CMOS 1.8 Volt-only, Simultaneous Read/Write, Burst Mode Flash Memory with 256/128 Megabit (4M/2M x 16-bit x 4 Banks) Mobile SDRAM on Shared Data Bus
Data Sheet
ADVANCE INFORMATION
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Publication Number S73WS256N_00
Revision A
Amendment 3
Issue Date December 16, 2005
Advance
Information
Notice On Data Sheet Designations
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ii
S73WS256N Based MCPs
S73WS256N_00_A3 December 16, 2005
S73WS256N based MCPs
Stacked Multi-Chip Product (MCP) 512/256 Megabit (32M/16M x 16-bit) CMOS 1.8 Volt-only, Simultaneous Read/Write, Burst Mode Flash Memory with 256/ 128 Megabit (4M/2M x 16-bit x 4 Banks) Mobile SDRAM on Shared Data Bus
Data Sheet
ADVANCE INFORMATION
Distinctive Characteristics
0&3 )HDWXUHV
3RZHU VXSSO\ YROWDJH RI WR 9
+LJK 3HUIRUPDQFH
)ODVK DFFHVV WLPH QV )ODVK EXUVW IUHTXHQF\ 0+] 0+] 0+] 0RELOH 6'5$0 EXUVW IUHTXHQF\ 0+] 3DFNDJH [ PP 2SHUDWLQJ 7HPSHUDWXUH & WR & ZLUHOHVV
General Description
7KH 6:6 VHULHV LV D SURGXFW OLQH RI VWDFNHG 0XOWL&KLS 3URGXFW 0&3 SDFNDJHV DQG FRQVLVWV RI 2QH RU WZR LQ WKLV FDVH RQH GLH LV XVHG DV FRGH DQG WKH RWKHU DV GDWD IODVK PHPRU\ GLH 2QH 0RELOH 6'5$0 GLH 6KDUHG DGGUHVVGDWD EXV IRU )ODVK DQG 0RELOH 6'5$0 EDOO SLQRXW 7KH SURGXFWV FRYHUHG E\ WKLV GRFXPHQW DUH OLVWHG LQ WKH WDEOH EHORZ )RU GHWDLOV DERXW WKHLU VSHFLILFDWLRQV SOHDVH UHIHU WR WKH LQGLYLGXDO FRQVWLWXHQW GDWDVKHHWV IRU IXUWKHU GHWDLOV
Flash Memory Density 256Mb 512Mb
0RELOH 6'5$0 'HQVLW\
0E 0E
6:61'
6:61'( 6:61((
Publication Number S73WS256N_00
Revision A
Amendment 3
Issue Date December 16, 2005
Advance
Information
1
Product Selector Guide
Device-Model# Flash Density (Code) Flash Density (Data) Flash Initial/Burst Speed (ns/MHz) SDRAM SDRAM burst Density Speed (MHz) Supplier DYB Package
6:61'%$:$ 6:61'%$:$% 6:61'(%$:7 6:61'(%$:7% 6:61((%$:7 6:61((%$:7% 6:61'%):$ 6:61'%):$% 6:61'(%):7 6:61'(%):7% 6:61((%):7 6:61((%):7%
0E
QV0+]
0+]

VHFWRU [[ XQSURWHFWHG EDOO
0E 0E QV0+] 0+]

VHFWRU [[ XQSURWHFWHG EDOO
0E
QV0+]
0+]

VHFWRU [[ XQSURWHFWHG EDOO
0E 0E QV0+] 0+]

VHFWRU [[ XQSURWHFWHG EDOO
2
S73WS256N Based MCPs
S73WS256N_00_A3 December 16, 2005
Advance
Information
Table of Contents
S73WS256N Based MCPs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . i
1 2 3 Product Selector Guide . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 MCP Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Connection Diagrams. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 3.1 2 x 256Mb Flash with 256Mb SDRAM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 3.2 2 x 256Mb Flash with 128Mb SDRAM. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 3.3 256MbFlash with 128Mb SDRAM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .14 3.4 Lookahead Diagram on Shared Bus . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 Input/Output Descriptions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 Logic Symbol for MCP . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 Ordering Information. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 Physical Dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 7.1 TLD137--137-ball Fine-Pitch Ball Grid Array (FBGA) 9 x 12.0 mm Package. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 7.2 FTF137--137-ball Fine-Pitch Ball Grid Array (FBGA) 9 x 12.0 x 1.4 mm Package . . . . . . . . . . . . . . . . . . . . . . . . . . 21 Input/Output Descriptions & Logic Symbol . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 Additional Resources . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 Product Overview. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26 11.1 Memory Map . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26 Device Operations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28 12.1 Device Operation Table . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28 12.2 Asynchronous Read. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28 12.3 Page Read Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29 12.4 Synchronous (Burst) Read Mode & Configuration Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29 12.4.1 Continuous Burst Read Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32 12.4.2 8-, 16-, 32-Word Linear Burst Read with Wrap Around . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .33 12.4.3 8-, 16-, 32-Word Linear Burst without Wrap Around . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .33 12.4.4 Configuration Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .33 12.5 Autoselect . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35 12.6 Program/Erase Operations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37 12.6.1 Single Word Programming. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37 12.6.2 Write Buffer Programming . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39 12.6.3 Sector Erase . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42 12.6.4 Chip Erase Command Sequence . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45 12.6.5 Erase Suspend/Erase Resume Commands . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45 12.6.6 Program Suspend/Program Resume Commands . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 47 12.6.7 Accelerated Program/Chip Erase . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 48 12.6.8 Unlock Bypass. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 48 12.6.9 Write Operation Status. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 49 12.7 Simultaneous Read/Write . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 56 12.8 Writing Commands/Command Sequences . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 56 12.9 Handshaking. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 56 12.10 Hardware Reset. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 57 12.11 Software Reset. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 57 Advanced Sector Protection/Unprotection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 59 13.1 Lock Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 60 13.2 Persistent Protection Bits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 61 13.3 Dynamic Protection Bits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 63 13.4 Persistent Protection Bit Lock Bit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 63 13.5 Password Protection Method . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 63 13.6 Advanced Sector Protection Software Examples . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 66 13.7 Hardware Data Protection Methods . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 66 13.7.1 WP# Method . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 66 S73WS256N Based MCPs 3
4 5 6 7
8 9 10 11 12
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December 16, 2005 S73WS256N_00_A3
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15
16
17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 4
13.7.2 ACC Method . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 66 13.7.3 Low VCC Write Inhibit. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 67 13.7.4 Write Pulse "Glitch Protection" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 67 13.7.5 Power-Up Write Inhibit. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 67 Power Conservation Modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 68 14.1 Standby Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 68 14.2 Automatic Sleep Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 68 14.3 Hardware RESET# Input Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 68 14.4 Output Disable (OE#). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 68 Secured Silicon Sector Flash Memory Region . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 69 15.1 Factory Secured Silicon Sector . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 69 15.2 Customer Secured Silicon Sector. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 70 15.3 Secured Silicon Sector Entry/Exit Command Sequences . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 70 Electrical Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 72 16.1 Absolute Maximum Ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 72 16.2 Operating Ranges . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 73 16.3 Test Conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 73 16.4 Key to Switching Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 74 16.5 Switching Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 74 16.6 VCC Power-up . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 74 16.7 DC Characteristics (CMOS Compatible) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 75 16.8 AC Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 76 16.8.1 CLK Characterization . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 76 16.8.2 Synchronous/Burst Read . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 77 16.8.3 Timing Diagrams. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 78 16.8.4 AC Characteristics--Asynchronous Read . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 80 16.8.5 Hardware Reset (RESET#) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 82 16.8.6 Erase/Program Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 83 16.8.7 Erase and Programming Performance. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 94 16.8.8 BGA Ball Capacitance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 95 Appendix . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 96 17.1 Common Flash Memory Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 99 Revisions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 103 General Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 105 Functional Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 106 Pin Descriptions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 107 Functional Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 107 Initialization. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 108 Mode Register Definition . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 108 Burst Length . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 109 Burst Type . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 111 CAS Latency . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 111 Operating Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .112 Write Burst Mode. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .113 Extended Mode Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .113 Temperature Compensated Self Refresh. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .113 Partial Array Self Refresh . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .113 Driver Strength . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 114 Commands . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .115 Command Inhibit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .115 No Operation (NOP) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .115 Load Mode Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 116 Active . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 116 Read . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 116 S73WS256N Based MCPs S73WS256N_00_A3 December 16, 2005
Mobile SDRAM Type 1 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 104
Advance
Information
40 41 42 43 44 45 46 47
Write . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 116 Precharge . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 116 Auto Precharge. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .117 Burst Terminate . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .117 Auto Refresh . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .117 Self Refresh . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .117 Deep Power-down . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 118 Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 118 47.1 Bank/Row Activation. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 118 47.2 Reads . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 119 47.3 Writes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 125 47.4 Precharge . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 129 47.5 Power-down . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 129 47.6 Deep Power-down . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 131 47.7 Clock Suspend . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 131 47.8 Burst Read/Single Write . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 131 47.9 Concurrent Auto Precharge. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 132 47.9.1 Read with Auto Precharge. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 132 47.10 Write with Auto Precharge . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 133 48 Absolute Maximum Ratings. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 139 49 Revision Summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 162 49.1 Revision A0 (April 1, 2005) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 162 49.2 Revision A1 (April 25, 2005) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 162 49.3 Revision A2 (April 25, 2005) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 162 49.4 Revision A3 (April 25, 2005) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 162
Mobile SDRAM Type 2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 163
50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 Absolute Maximum Ratings. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 164 DC Operating Conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 164 Capacitance. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 164 DC Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 165 AC Operating Test Conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 165 Operating AC Parameter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 166 AC Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 167 Simplified Truth Table . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 168 Mode Register Field Table to Program Modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 168 Normal MRS Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 169 EMRS for PASR (Partial Array Self Ref) & DS (Driver Strength) . . . . . . . . . . . . . . . . . . . . 169 Partial Array Self Refresh . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 169 Internal Temperature Compensated Self Refresh (TCSR) . . . . . . . . . . . . . . . . . . . . . . . . . 170 Power Up Sequence . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 170 Burst Sequence . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 170 64.1 Burst Length = 4 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .170 64.2 Burst Length = 8 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 171 65 Device Operations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .171 65.1 Addresses of 64Mb . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 171 65.1.1 Bank Addresses (BA0 ~ BA1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 171 65.1.2 Address Inputs (A0 ~ A11) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 171 65.2 Addresses of 128Mb. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 171 65.2.1 Bank Addresses (BA0 ~ BA1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 171 65.2.2 Address Inputs (A0 ~ A11) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 172 65.3 Clock . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 172 65.4 Clock Enable (CKE). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 172 65.5 NOP and Device Deselect . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 172 65.6 DQM Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 172 65.7 Mode Register Set (MRS) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 172 December 16, 2005 S73WS256N_00_A3 S73WS256N Based MCPs 5
Advance
Information
66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82
Extended Mode Register Set (EMRS) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 173 Bank Activate. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 173 Burst Read . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 173 Burst Write . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 174 All Banks Precharge. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 174 Precharge . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 174 Auto Precharge . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 174 Auto Refresh . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 174 Self Refresh . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 175 Basic Feature and Function Descriptions. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 175 65.17.1 Auto Refresh. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 181 65.17.2 Self Refresh . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 181 About Burst Type Control . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 182 About Burst Length Control . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 182 Function Truth Table (1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 183 Function Truth Table (2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 185 AC Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 186 SDRAM Type 2 Revision Summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 203 Address Table . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 205 Functional Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 205 Absolute Maximum Ratings. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 206 DC Operating Conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 207 Capacitance. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 207 DC Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 208 AC Operating Test Conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 208 Operating AC Parameters. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 209 AC Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 210 Simplified Truth Table . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .211 Mode Register Field Table to Program Modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .211 82.1 Normal MRS Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 212 82.2 EMRS for PASR (Partial Array Self Refresh) and DS (Driver Strength) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 212 Partial Array Self Refresh . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 212 83.1 Internal Temperature Compensated Self Refresh (TCSR) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 213 Power Up Sequence . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 213 Burst Sequence . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 214 85.1 Burst Length = 4 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 214 85.2 Burst Length = 8 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 214 Device Operations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 214 86.1 Addresses of 256Mb . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 214 86.1.1. Bank Addresses (BA0-BA1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 214 86.1.2 Address Inputs (A0-A12) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 214 86.2 Addresses of 512Mb . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 215 86.2.1. Bank Addresses (BA0-BA1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 215 86.2.2 Address Inputs (A0-A12) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 215 86.3 Clock (CLK). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 215 86.4 Clock Enable (CKE). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 215 86.5 NOP and Device Deselect . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 215 86.6 DQM Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 216 86.7 Mode Register Set (MRS) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 216 86.8 Extended Mode Register Set (EMRS) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 216 86.9 Bank Activate. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 216 86.10 Burst Read . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 217 86.11 Burst Write . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 217 86.12 All Banks Precharge. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 217 S73WS256N Based MCPs S73WS256N_00_A3 December 16, 2005
65.8 65.9 65.10 65.11 65.12 65.13 65.14 65.15 65.16 65.17
Mobile SDRAM Type 2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 204
83 84 85
86
6
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87
88 89 90 91 92 93 94
86.13 Precharge . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 217 86.14 Auto Precharge . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .218 86.15 Auto Refresh . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .218 86.16 Self Refresh . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .218 Basic Feature and Function Descriptions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 219 87.1 Clock Suspend . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 219 87.2 DQM Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 219 87.3 CAS# Interrupt 1 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 220 87.4 CAS# Interrupt 2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 222 87.5 Auto Refresh . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 226 87.6 Self Refresh . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 226 Burst Type Control. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 227 Burst Length Control . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 227 Function Truth Table 1 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 228 Function Truth Table 2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 230 Timing Diagrams . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 231 SDRAM Type 2 Revision Summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 248 MCP Revision Summary. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 249
December 16, 2005 S73WS256N_00_A3
S73WS256N Based MCPs
7
Advance
Information
List of Tables
7DEOH 7DEOH 7DEOH 7DEOH 7DEOH 7DEOH 7DEOH 7DEOH 7DEOH 7DEOH 7DEOH 7DEOH 7DEOH 7DEOH 7DEOH 7DEOH 7DEOH 7DEOH 7DEOH 7DEOH 7DEOH 7DEOH 7DEOH 7DEOH 7DEOH 7DEOH 7DEOH 7DEOH 7DEOH 7DEOH 7DEOH 7DEOH 7DEOH 7DEOH 7DEOH 7DEOH 7DEOH 7DEOH 7DEOH 7DEOH 7DEOH 7DEOH 7DEOH 7DEOH 7DEOH 7DEOH 7DEOH 7DEOH 7DEOH 7DEOH 7DEOH 7DEOH 7DEOH 7DEOH 7DEOH 7DEOH 7DEOH 7DEOH ,QSXW2XWSXW 'HVFULSWLRQV 6:61 6HFWRU 0HPRU\ $GGUHVV 0DS 6:61 6HFWRU 0HPRU\ $GGUHVV 0DS 'HYLFH 2SHUDWLRQV :RUG 6HOHFWLRQ ZLWKLQ D 3DJH $GGUHVV /DWHQF\ 6:61 $GGUHVV /DWHQF\ 6:61 $GGUHVV%RXQGDU\ &URVVLQJ /DWHQF\ 6:61 # 0+] $GGUHVV%RXQGDU\ &URVVLQJ /DWHQF\ 6:61 # 0+] $GGUHVV%RXQGDU\ &URVVLQJ /DWHQF\ 6:61 # 0+] $GGUHVV%RXQGDU\ &URVVLQJ /DWHQF\ 6:61 %XUVW $GGUHVV *URXSV &RQILJXUDWLRQ 5HJLVWHU $XWRVHOHFW $GGUHVVHV $XWRVHOHFW (QWU\ $XWRVHOHFW ([LW 6LQJOH :RUG 3URJUDP :ULWH %XIIHU 3URJUDP 6HFWRU (UDVH &KLS (UDVH (UDVH 6XVSHQG (UDVH 5HVXPH 3URJUDP 6XVSHQG 3URJUDP 5HVXPH 8QORFN %\SDVV (QWU\ 8QORFN %\SDVV 3URJUDP 8QORFN %\SDVV 5HVHW '4 DQG '4 ,QGLFDWLRQV :ULWH 2SHUDWLRQ 6WDWXV 5HVHW /RFN 5HJLVWHU 6HFWRU 3URWHFWLRQ 6FKHPHV 6HFXUHG 6LOLFRQ 6HFWRU $GGUHVVHV 6HFXUHG 6LOLFRQ 6HFWRU (QWU\ 6HFXUHG 6LOLFRQ 6HFWRU 3URJUDP 6HFXUHG 6LOLFRQ 6HFWRU ([LW 7HVW 6SHFLILFDWLRQV 6\QFKURQRXV :DLW 6WDWH 5HTXLUHPHQWV 0HPRU\ $UUD\ &RPPDQGV 6HFWRU 3URWHFWLRQ &RPPDQGV &), 4XHU\ ,GHQWLILFDWLRQ 6WULQJ 6\VWHP ,QWHUIDFH 6WULQJ 'HYLFH *HRPHWU\ 'HILQLWLRQ 3ULPDU\ 9HQGRU6SHFLILF ([WHQGHG 4XHU\ %XUVW 'HILQLWLRQ &$6 /DWHQF\ 7UXWK 7DEOH &RPPDQGV DQG '40 2SHUDWLRQ 7UXWK 7DEOH &.( 7UXWK 7DEOH &XUUHQW 6WDWH %DQN Q &RPPDQG WR %DQN Q 7UXWK 7DEOH &XUUHQW 6WDWH %DQN Q &RPPDQG WR %DQN P '& (OHFWULFDO &KDUDFWHULVWLFV DQG 2SHUDWLQJ &RQGLWLRQV $& (OHFWULFDO &KDUDFWHULVWLFV DQG 2SHUDWLQJ &RQGLWLRQV (OHFWULFDO &KDUDFWHULVWLFV DQG 5HFRPPHQGHG $& 2SHUDWLQJ &RQGLWLRQV $& )XQFWLRQDO &KDUDFWHULVWLFV ,'' 6SHFLILFDWLRQV DQG &RQGLWLRQV ,'' 6HOI 5HIUHVK &XUUHQW 2SWLRQV &DSDFLWDQFH 5HJLVWHU 3URJUDPPHG ZLWK ([WHQGHG 056
8
S73WS256N Based MCPs
S73WS256N_00_A3 December 16, 2005
Advance
Information
List of Figures
)LJXUH )LJXUH )LJXUH )LJXUH )LJXUH )LJXUH )LJXUH )LJXUH )LJXUH )LJXUH )LJXUH )LJXUH )LJXUH )LJXUH )LJXUH )LJXUH )LJXUH )LJXUH )LJXUH )LJXUH )LJXUH )LJXUH )LJXUH )LJXUH )LJXUH )LJXUH )LJXUH )LJXUH )LJXUH )LJXUH )LJXUH )LJXUH )LJXUH )LJXUH )LJXUH )LJXUH )LJXUH )LJXUH )LJXUH )LJXUH )LJXUH )LJXUH )LJXUH )LJXUH )LJXUH )LJXUH )LJXUH )LJXUH )LJXUH )LJXUH )LJXUH )LJXUH )LJXUH )LJXUH )LJXUH )LJXUH )LJXUH )LJXUH 6:61 %ORFN 'LDJUDP 6\QFKURQRXV$V\QFKURQRXV 6WDWH 'LDJUDP 6\QFKURQRXV 5HDG 6LQJOH :RUG 3URJUDP :ULWH %XIIHU 3URJUDPPLQJ 2SHUDWLRQ 6HFWRU (UDVH 2SHUDWLRQ :ULWH 2SHUDWLRQ 6WDWXV )ORZFKDUW $GYDQFHG 6HFWRU 3URWHFWLRQ8QSURWHFWLRQ 33% 3URJUDP(UDVH $OJRULWKP /RFN 5HJLVWHU 3URJUDP $OJRULWKP 0D[LPXP 1HJDWLYH 2YHUVKRRW :DYHIRUP 0D[LPXP 3RVLWLYH 2YHUVKRRW :DYHIRUP 7HVW 6HWXS ,QSXW :DYHIRUPV DQG 0HDVXUHPHQW /HYHOV 9&& 3RZHUXS 'LDJUDP &/. &KDUDFWHUL]DWLRQ &/. 6\QFKURQRXV %XUVW 0RGH 5HDG ZRUG /LQHDU %XUVW ZLWK :UDS $URXQG ZRUG /LQHDU %XUVW ZLWKRXW :UDS $URXQG /LQHDU %XUVW ZLWK 5'< 6HW 2QH &\FOH %HIRUH 'DWD $V\QFKURQRXV 0RGH 5HDG )RXU:RUG 3DJH0RGH 2SHUDWLRQ 5HVHW 7LPLQJV &KLS6HFWRU (UDVH 2SHUDWLRQ 7LPLQJV 3URJUDP 2SHUDWLRQ 7LPLQJ 8VLQJ $9' 3URJUDP 2SHUDWLRQ 7LPLQJ 8VLQJ &/. LQ 5HODWLRQVKLS WR $9' $FFHOHUDWHG 8QORFN %\SDVV 3URJUDPPLQJ 7LPLQJ 'DWD 3ROOLQJ 7LPLQJV 'XULQJ (PEHGGHG $OJRULWKP 7RJJOH %LW 7LPLQJV 'XULQJ (PEHGGHG $OJRULWKP 6\QFKURQRXV 'DWD 3ROOLQJ 7LPLQJV7RJJOH %LW 7LPLQJV &RQGLWLRQV IRU ,QFRUUHFW '4 3ROOLQJ 'XULQJ (UDVH 6XVSHQG &RUUHFW '4 3ROOLQJ GXULQJ (UDVH 6XVSHQG &RUUHFW '4 3ROOLQJ GXULQJ (UDVH 6XVSHQG &RUUHFW '4 3ROOLQJ GXULQJ (UDVH 6XVSHQG '4 YV '4 /DWHQF\ ZLWK %RXQGDU\ &URVVLQJ ZKHQ )UHTXHQF\ ! 0+] /DWHQF\ ZLWK %RXQGDU\ &URVVLQJ LQWR 3URJUDP(UDVH %DQN ([DPSOH RI :DLW 6WDWHV ,QVHUWLRQ %DFNWR%DFN 5HDG:ULWH &\FOH 7LPLQJV %ORFN 'LDJUDP 0RGH 5HJLVWHU 'HILQLWLRQ &$6 /DWHQF\ ([WHQGHG 0RGH 5HJLVWHU $FWLYDWLQJ D 6SHFLILF 5RZ LQ D 6SHFLILF %DQN 5HJLVWHU 5HDG &RPPDQG :ULWH &RPPDQG ,QLWLDOL]H DQG /RDG 0RGH 5HJLVWHU '& 2XWSXW /RDG &LUFXLW $& 2XWSXW /RDG &LUFXLW &ORFN 6XVSHQG '40 2SHUDWLRQ &$6 ,QWHUUXSW &$6 ,QWHUUXSW 5HDG ,QWHUUXSWHG E\ :ULWH '40 :ULWH ,QWHUUXSWHG E\ 3UHFKDUJH '40 3UHFKDUJH $XWR 3UHFKDUJH %XUVW 6WRS DQG ,QWHUUXSWHG E\ 3UHFKDUJH 056
December 16, 2005 S73WS256N_00_A3
S73WS256N Based MCPs
9
Advance
Information
)LJXUH )LJXUH )LJXUH )LJXUH )LJXUH )LJXUH )LJXUH )LJXUH )LJXUH )LJXUH )LJXUH )LJXUH )LJXUH )LJXUH )LJXUH )LJXUH )LJXUH )LJXUH )LJXUH )LJXUH )LJXUH )LJXUH )LJXUH )LJXUH )LJXUH )LJXUH )LJXUH )LJXUH )LJXUH )LJXUH )LJXUH )LJXUH )LJXUH )LJXUH )LJXUH )LJXUH )LJXUH )LJXUH )LJXUH )LJXUH )LJXUH )LJXUH )LJXUH )LJXUH )LJXUH )LJXUH )LJXUH )LJXUH )LJXUH )LJXUH )LJXUH )LJXUH )LJXUH )LJXUH )LJXUH )LJXUH
&ORFN 6XVSHQG ([LW DQG 3RZHU 'RZQ ([LW $XWR 5HIUHVK 6HOI 5HIUHVK 3RZHU 8S 6HTXHQFH IRU 0RELOH 6'5$0 6LQJOH %LW 5HDG:ULWH5HDG &\FOH 6DPH 3DJH #&$6 /DWHQF\ %XUVW /HQJWK 5HDG :ULWH &\FOH DW 6DPH %DQN #%XUVW /HQJWK W5'/ &/. 3DJH 5HDG :ULWH &\FOH DW 6DPH %DQN #%XUVW /HQJWK W5'/ &/. 3DJH 5HDG &\FOH DW 'LIIHUHQW %DQN #%XUVW /HQJWK 3DJH :ULWH &\FOH DW 'LIIHUHQW %DQN #%XUVW /HQJWK W5'/ &/. 5HDG :ULWH &\FOH DW 'LIIHUHQW %DQN #%XUVW /HQJWK 5HDG :ULWH &\FOH ZLWK $XWR 3UHFKDUJH #%XUVW /HQJWK 5HDG :ULWH &\FOH ZLWK $XWR 3UHFKDUJH #%XUVW /HQJWK &ORFN 6XVSHQVLRQ '40 2SHUDWLRQ &\FOH #&$6 /DWHQF\ %XUVW /HQJWK 5HDG ,QWHUUXSWHG E\ 3UHFKDUJH &RPPDQG 5HDG %XUVW 6WRS &\FOH #)XOO 3DJH %XUVW :ULWH ,QWHUUXSWHG E\ 3UHFKDUJH &RPPDQG :ULWH %XUVW 6WRS &\FOH # )XOO 3DJH %XUVW W5'/ &/. %XUVW 5HDG 6LQJOH ELW :ULWH &\FOH #%XUVW /HQJWK $FWLYH3UHFKDUJH 3RZHU 'RZQ 0RGH #&$6 /DWHQF\ %XUVW /HQJWK 6HOI 5HIUHVK (QWU\ ([LW &\FOH 0RGH 5HJLVWHU 6HW &\FOH DQG $XWR 5HIUHVK &\FOH ([WHQGHG 0RGH 5HJLVWHU 6HW &\FOH '& 2XWSXW /RDG &LUFXLW $& 2XWSXW /RDG &LUFXLW 3DUWLDO $UUD\ 6HOI 5HIUHVK $UHDV &ORFN 6XVSHQG 'XULQJ :ULWH &ORFN 6XVSHQG 'XULQJ 5HDG %/ :ULWH 0DVN %/ 5HDG 0DVN %/ '40 ZLWK &/RFN 6XVSHQGHG )XOO 3DJH 5HDG 5HDG ,QWHUUXSWHG E\ 5HDG %/ :ULWH ,QWHUUXSWHG E\ :ULWH %/ :ULWH ,QWHUUXSWHG E\ 5HDG %/ 5HDG ,QWHUUXSWHG E\ :ULWH DQG '40 :ULWH ,QWHUUXSWHG E\ 3UHFKDUJH DQG '40 3UHFKDUJH $XWR 3UHFKDUJH %XUVW 6WRS DQG ,QWHUUXSWHG E\ 3UHFKDUJH 0RGH 5HJLVWHU 6HW &ORFN 6XVSHQG ([LW DQG 3RZHU 'RZQ ([LW $XWR 5HIUHVK 6HOI 5HIUHVK 3RZHU 8S 6HTXHQFH 6LQJOH %LW 5HDG:ULWH5HDG &\FOH 6DPH 3DJH #&$6 /DWHQF\ %XUVW /HQJWK 5HDG :ULWH &\FOH DW 6DPH %DQN #%XUVW /HQJWK W5'/ &/. 5HDG :ULWH &\FOH DW 6DPH %DQN #%XUVW /HQJWK W5'/ &/. 3DJH 5HDG &\FOH DW 'LIIHUHQW %DQN #%XUVW /HQJWK 3DJH :ULWH &\FOH DW 'LIIHUHQW %DQN #%XUVW /HQJWK W5'/ &/. 5HDG :ULWH &\FOH DW 'LIIHUHQW %DQN #%XUVW /HQJWK 5HDG :ULWH &\FOH ZLWK $XWR 3UHFKDUJH , #%XUVW /HQJWK 5HDG :ULWH &\FOH ZLWK $XWR 3UHFKDUJH #%XUVW /HQJWK &ORFN 6XVSHQVLRQ '40 2SHUDWLRQ &\FOH #&$6 /DWHQF\ %XUVW /HQJWK 5HDG ,QWHUUXSWHG E\ 3UHFKDUJH &RPPDQG 5HDG %XUVW 6WRS &\FOH #)XOO 3DJH %XUVW :ULWH ,QWHUUXSWHG E\ 3UHFKDUJH &RPPDQG :ULWH %XUVW 6WRS &\FOH # )XOO 3DJH %XUVW W5'/ &/. %XUVW 5HDG 6LQJOH ELW :ULWH &\FOH #%XUVW /HQJWK $FWLYH3UHFKDUJH 3RZHU 'RZQ 0RGH #&$6 /DWHQF\ %XUVW /HQJWK 6HOI 5HIUHVK (QWU\ ([LW &\FOH ([WHQGHG 0RGH 5HJLVWHU 6HW &\FOH

10
S73WS256N Based MCPs
S73WS256N_00_A3 December 16, 2005
Advance
Information
2
MCP Block Diagram
VCCf A23 - A0 max +1* VCC VID DQ15 to DQ0
16
CLK WP#f1 ACC (Note 1) CE#f1 OE# WE# RESET# AVD# CE#f2
CLK WP# ACC Flash 1 Flash 2 CE# (Note 2) OE# WE# RDY RESET# AVD#
RDY VSS
DQ15 to DQ0
D-VCC D-VCCQ A12 - A0 D-CLK D-CE# D-WE# D-BA0 D-BA1 D-CKE D-RAS# D-CAS# D-DM0 D-DM1
D-max + 1*
VCC
VCCQ 16
CLK CE# DQ15 to DQ0 WE# BA0 BA1 CKE SDRAM RAS# CAS# DM0 DM1 VSSQ
D-VSSQ
* Amax = A23 D-Amax = A12
1RWHV )RU D RQH)ODVK FRQILJXUDWLRQ &( I )RU D WZR)ODVK FRQILJXUDWLRQ &( I FKLSHQDEOH SLQ IRU WKH VHFRQG )ODVK
&( &( IRU )ODVK DQG &( I
&( IRU )ODVK &( I LV WKH
)ODVK DQG 6'5$0 VKDUH FRPPRQ $$ DQG '4'4 $SSOLFDEOH RQO\ IRU WKH 6:61'( DQG 6:61(( GHYLFHV
December 16, 2005 S73WS256N_00_A3
S73WS256N Based MCPs
11
Advance
Information
3
3.1
Connection Diagrams
2 x 256Mb Flash with 256Mb SDRAM
EDOO )LQH3LWFK %DOO *ULG $UUD\ 7RS 9LHZ %DOOV )DFLQJ 'RZQ
A1
D-CKE
A2 D-CLK
A3
DNU
A4
DNU
A5
DNU
A6
DNU
A7
DNU
A8
DNU
A9
D-VSS
A10
D-CE#
B1
B2
B3
DNU
B4
DNU
B5
DNU
B6
DNU
B7
DNU
B8
DNU
B9
RFU
B10
D-CAS#
D-RAS# D-WE#
C1
DNU
C2
AVD#
C3
VSS
C4
CLK
C5
RFU
C6
RFU
C7
RFU
C8
RFU
C9
RFU
C10
DNU
D1
DNU
D2
WP#
D3
A7
D4
D-DM0
D5
ACC
D6
WE#
D7
A8
D8
A11
D9
F2-CE#
D10
DNU
Legend
E1
DNU
E2
A3
E3
A6
E4
D-DM1
E5
F-RST#
E6
RFU
E7
A19
E8
A12
E9
A15
E10
DNU
Flash/SDRAM Shared
F1
DNU
F2
A2
F3
A5
F4
A18
F5
RDY
F6
A20
F7
A9
F8
A13
F9
A21
F10
DNU
SDRAM only
G1
DNU
G2
A1
G3
A4
G4
A17
G6
A23
G7
A10
G8
A14
G9
A22
G10
DNU
H1
DNU
H2
A0
H3
VSS
H4
DQ1
H7
DQ6
H8
RFU
H9
A16
H10
DNU
Reserved for Future Use
J1
DNU
J2
F1-CE#
J3
OE#
J4
DQ9
J5
DQ3
J6
DQ4
J7
DQ13
J8
DQ15
J9
RFU
J10
DNU
Data Flash only
K1
DNU
K2
RFU
K3
DQ0
K4
DQ10
K5
F-VCC
K6
D-VCC
K7
DQ12
K8
DQ7
K9
VSS
K10
DNU
Flash/Data Shared
L1
DNU
L2
D-VCC
L3
DQ8
L4
DQ2
L5
DQ11
L6
RFU
L7
DQ5
L8
DQ14
L9
RFU
L10
DNU
Code Flash Only
M1
DNU
M2
RFU
M3
RFU
M4
VSS
M5
F-VCC
M6
RFU
M7
RFU
M8
RFU
M9
RFU
M10
DNU
Do Not Use N2
D-BA0
N1
RFU
N3
DNU
N4
DNU
N5
DNU
N6
DNU
N7
DNU
N8
DNU
N9
D-BA1
N10
RFU
P1
RFU
P2
D-VSS
P3
DNU
P4
DNU
P5
DNU
P6
DNU
P7
DNU
P8
DNU
P9
RFU
P10
RFU
1RWHV 7LH WKH 6'5$0 966 DQG 9664 WR '966
7LH WKH 6'5$0 9&& DQG 9&&4 WR '9&&
6SHFLDO +DQGOLQJ ,QVWUXFWLRQV )RU )%*$ 3DFNDJH
6SHFLDO KDQGOLQJ LV UHTXLUHG IRU )ODVK 0HPRU\ SURGXFWV LQ )%*$ SDFNDJHV )ODVK PHPRU\ GHYLFHV LQ )%*$ SDFNDJHV PD\ EH GDPDJHG LI H[SRVHG WR XOWUD VRQLF FOHDQLQJ PHWKRGV 7KH SDFNDJH DQGRU GDWD LQWHJULW\ PD\ EH FRPSURPLVHG LI WKH SDFNDJH ERG\ LV H[SRVHG WR WHPSHUDWXUHV DERYH & IRU SURORQJHG SHUL RGV RI WLPH
12
S73WS256N Based MCPs
S73WS256N_00_A3 December 16, 2005
Advance
Information
3.2
2 x 256Mb Flash with 128Mb SDRAM
EDOO )LQH3LWFK %DOO *ULG $UUD\ 7RS 9LHZ %DOOV )DFLQJ 'RZQ
A1
D-CKE
A2 D-CLK
A3
DNU
A4
DNU
A5
DNU
A6
DNU
A7
DNU
A8
DNU
A9
D-VSS
A10
D-CE#
B1
B2
B3
DNU
B4
DNU
B5
DNU
B6
DNU
B7
DNU
B8
DNU
B9
RFU
B10
D-CAS#
D-RAS# D-WE#
C1
DNU
C2
AVD#
C3
VSS
C4
CLK
C5
RFU
C6
RFU
C7
RFU
C8
RFU
C9
RFU
C10
DNU
D1
DNU
D2
WP#
D3
A7
D4
D-DM0
D5
ACC
D6
WE#
D7
A8
D8
A11
D9
F2-CE#
D10
DNU
Legend
E1
DNU
E2
A3
E3
A6
E4
D-DM1
E5
F-RST#
E6
RFU
E7
A19
E8
A12
E9
A15
E10
DNU
Flash/SDRAM Shared
F1
DNU
F2
A2
F3
A5
F4
A18
F5
RDY
F6
A20
F7
A9
F8
A13
F9
A21
F10
DNU
SDRAM only
G1
DNU
G2
A1
G3
A4
G4
A17
G6
A23
G7
A10
G8
A14
G9
A22
G10
DNU
H1
DNU
H2
A0
H3
VSS
H4
DQ1
H7
DQ6
H8
RFU
H9
A16
H10
DNU
Reserved for Future Use
J1
DNU
J2
F1-CE#
J3
OE#
J4
DQ9
J5
DQ3
J6
DQ4
J7
DQ13
J8
DQ15
J9
RFU
J10
DNU
Data Flash only
K1
DNU
K2
RFU
K3
DQ0
K4
DQ10
K5
F-VCC
K6
D-VCC
K7
DQ12
K8
DQ7
K9
VSS
K10
DNU
Flash/Data Shared
L1
DNU
L2
D-VCC
L3
DQ8
L4
DQ2
L5
DQ11
L6
RFU
L7
DQ5
L8
DQ14
L9
RFU
L10
DNU
Code Flash Only
M1
DNU
M2
RFU
M3
RFU
M4
VSS
M5
F-VCC
M6
RFU
M7
RFU
M8
RFU
M9
RFU
M10
DNU
Do Not Use
N1
RFU
N2
D-BA0
N3
DNU
N4
DNU
N5
DNU
N6
DNU
N7
DNU
N8
DNU
N9
D-BA1
N10
RFU
P1
RFU
P2
D-VSS
P3
DNU
P4
DNU
P5
DNU
P6
DNU
P7
DNU
P8
DNU
P9
RFU
P10
RFU
1RWHV 7LH WKH 6'5$0 966 DQG 9664 WR '966
7LH WKH 6'5$0 9&& DQG 9&&4 WR '9&&
6SHFLDO +DQGOLQJ ,QVWUXFWLRQV )RU )%*$ 3DFNDJH
6SHFLDO KDQGOLQJ LV UHTXLUHG IRU )ODVK 0HPRU\ SURGXFWV LQ )%*$ SDFNDJHV )ODVK PHPRU\ GHYLFHV LQ )%*$ SDFNDJHV PD\ EH GDPDJHG LI H[SRVHG WR XOWUD VRQLF FOHDQLQJ PHWKRGV 7KH SDFNDJH DQGRU GDWD LQWHJULW\ PD\ EH FRPSURPLVHG LI WKH SDFNDJH ERG\ LV H[SRVHG WR WHPSHUDWXUHV DERYH & IRU SURORQJHG SHUL RGV RI WLPH
December 16, 2005 S73WS256N_00_A3
S73WS256N Based MCPs
13
Advance
Information
3.3
256MbFlash with 128Mb SDRAM
EDOO )LQH3LWFK %DOO *ULG $UUD\ 7RS 9LHZ %DOOV )DFLQJ 'RZQ
A1
D-CKE
A2 D-CLK
A3
DNU
A4
DNU
A5
DNU
A6
DNU
A7
DNU
A8
DNU
A9
D-VSS
A10
D-CE#
B1
B2
B3
DNU
B4
DNU
B5
DNU
B6
DNU
B7
DNU
B8
DNU
B9
RFU
B10
D-CAS#
D-RAS# D-WE#
C1
DNU
C2
AVD#
C3
VSS
C4
CLK
C5
RFU
C6
RFU
C7
RFU
C8
RFU
C9
RFU
C10
DNU
D1
DNU
D2
WP#
D3
A7
D4
D-DM0
D5
ACC
D6
WE#
D7
A8
D8
A11
D9
RFU
D10
DNU
Legend
E1
DNU
E2
A3
E3
A6
E4
D-DM1
E5
F-RST#
E6
RFU
E7
A19
E8
A12
E9
A15
E10
DNU
Flash/SDRAM Shared
F1
DNU
F2
A2
F3
A5
F4
A18
F5
RDY
F6
A20
F7
A9
F8
A13
F9
A21
F10
DNU
SDRAM only
G1
DNU
G2
A1
G3
A4
G4
A17
G6
A23
G7
A10
G8
A14
G9
A22
G10
DNU
H1
DNU
H2
A0
H3
VSS
H4
DQ1
H7
DQ6
H8
RFU
H9
A16
H10
DNU
Reserved for Future Use
J1
DNU
J2
F1-CE#
J3
OE#
J4
DQ9
J5
DQ3
J6
DQ4
J7
DQ13
J8
DQ15
J9
RFU
J10
DNU
Code Flash Only
K1
DNU
K2
RFU
K3
DQ0
K4
DQ10
K5
F-VCC
K6
D-VCC
K7
DQ12
K8
DQ7
K9
VSS
K10
DNU
Do Not Use
L1
DNU
L2
D-VCC
L3
DQ8
L4
DQ2
L5
DQ11
L6
RFU
L7
DQ5
L8
DQ14
L9
RFU
L10
DNU
M1
DNU
M2
RFU
M3
RFU
M4
VSS
M5
F-VCC
M6
RFU
M7
RFU
M8
RFU
M9
RFU
M10
DNU
N1
RFU
N2
D-BA0
N3
DNU
N4
DNU
N5
DNU
N6
DNU
N7
DNU
N8
DNU
N9
D-BA1
N10
RFU
P1
RFU
P2
D-VSS
P3
DNU
P4
DNU
P5
DNU
P6
DNU
P7
DNU
P8
DNU
P9
RFU
P10
RFU
1RWHV 7LH WKH 6'5$0 966 DQG 9664 WR '966
7LH WKH 6'5$0 9&& DQG 9&&4 WR '9&&
6SHFLDO +DQGOLQJ ,QVWUXFWLRQV )RU )%*$ 3DFNDJH
6SHFLDO KDQGOLQJ LV UHTXLUHG IRU )ODVK 0HPRU\ SURGXFWV LQ )%*$ SDFNDJHV )ODVK PHPRU\ GHYLFHV LQ )%*$ SDFNDJHV PD\ EH GDPDJHG LI H[SRVHG WR XOWUD VRQLF FOHDQLQJ PHWKRGV 7KH SDFNDJH DQGRU GDWD LQWHJULW\ PD\ EH FRPSURPLVHG LI WKH SDFNDJH ERG\ LV H[SRVHG WR WHPSHUDWXUHV DERYH & IRU SURORQJHG SHUL RGV RI WLPH
14
S73WS256N Based MCPs
S73WS256N_00_A3 December 16, 2005
Advance
Information
3.4
Lookahead Diagram on Shared Bus
A1 D-CKE B1 D-RAS# C1 DNU
D1
A2 D-CLK B2 D-WE# C2 AVD#
D2
A3 DNU B3 DNU C3 VSS D3 D-A7 E3 A6 F3 A5 G3 A4 H3 VSS J3 OE# K3 DQ0 L3 DQ8 M3 A26 N3 DNU P3 DNU
A4 DNU B4 DNU C4 CLK D4
D-DM0/ R-LB#
A5 DNU B5 DNU C5 F2-CE# D5 ACC E5 F-RST# F5
RDY/WAIT#
A6 DNU B6 DNU C6 F-VCC D6 WE# E6 R-CE2 F6 A20 G6 A23
A7 DNU B7 DNU C7 F-CLK# D7 A8 E7 A19 F7 A9 G7 A10 H7 DQ6
A8 DNU B8 DNU C8 R-OE# D8 A11 E8 A12 F8 A13 G8 A14 H8 A24 J8 DQ15 K8 DQ7 L8 DQ14 M8 F-VCCQ N8 DNU P8 DNU
A9 D-VSS B9 D-DQS3 C9 F2-OE# D9 F3-CE# E9 A15 F9 A21 G9 A22 H9 A16 J9
R-CRE or R-MRS
A10 D-CE# B10 D-CAS# C10 DNU D10 DNU E10 DNU F10 DNU G10 DNU H10 DNU J10 DNU
Legend:
RFU (Reserved for Future Use)
Code Flash Only
DNU E1 DNU F1 DNU G1 DNU H1 DNU J1 DNU K1 DNU L1 L2 DNU M1 DNU N1 F-DQS0 P1 D-DQS0
WP# E2 A3 F2 A2 G2 A1 H2 A0 J2 F1-CE# K2 R-CE1# L2 L2 R-VCC M2 A27 N2 D-BA0 P2 D-VSS
MirrorBit Data Only
E4
D-DM1/ R-UB#
F4 A18 G4 A17 H4 DQ1 J4 DQ9 K4 DQ10 L4 DQ2 M4 VSS N4 DNU P4 DNU
Flash/Data Shared
Flash/xRAM Shared
pSRAM Only
J5 DQ3 K5 F-VCC L5 DQ11 M5 F-VCC N5 DNU P5 DNU
J6 DQ4 K6 R-VCC L6 A25 M6 F4-CE# N6 DNU P6 DNU
J7 DQ13 K7 DQ12 L7 DQ5 M7 R-VCCQ N7 DNU P7 DNU
xRAM Shared K10 DNU L10 DNU M10 DNU N10 F-DQS1 P10 D-DQS1 SDRAM Only
K9 VSS L9 WP# M9 DD-CLK# N9 D-BA1 P9 D-DQS2
1RWHV ,Q DGGLWLRQ WR EHLQJ GHILQHG DV )&( %DOO & FDQ DOVR EH DVVLJQHG DV )&( KDV WZR FKLS HQDEOH VLJQDOV
) DQG ) GHQRWH ;,3&RGH )ODVK ZKLOH ) DQG ) GHQRWH 'DWD&RPSDQLRQ )ODVK
IRU FRGH IODVK WKDW
December 16, 2005 S73WS256N_00_A3
S73WS256N Based MCPs
15
Advance
Information
4
Input/Output Descriptions
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S73WS256N Based MCPs
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December 16, 2005 S73WS256N_00_A3
S73WS256N Based MCPs
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7
7.1
Physical Dimensions
TLD137--137-ball Fine-Pitch Ball Grid Array (FBGA) 9 x 12.0 mm Package
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NOTES: PACKAGE JEDEC DxE SYMBOL A A1 A2 D E D1 E1 MD ME n b eE eD SD / SE 0.35 TLD 137 N/A 12.00 mm x 9.00 mm PACKAGE MIN --0.17 0.81 NOM ------12.00 BSC. 9.00 BSC. 10.40 BSC. 7.20 BSC. 14 10 137 0.40 0.80 BSC. 0.80 BSC 0.40 BSC. G5,H5,H6 0.45 MAX 1.20 --0.97 PROFILE BALL HEIGHT BODY THICKNESS BODY SIZE BODY SIZE MATRIX FOOTPRINT MATRIX FOOTPRINT MATRIX SIZE D DIRECTION MATRIX SIZE E DIRECTION BALL COUNT BALL DIAMETER BALL PITCH BALL PITCH SOLDER BALL PLACEMENT DEPOPULATED SOLDER BALLS 9. 8. 7 6 NOTE 2. 3. 4. 5. 1. DIMENSIONING AND TOLERANCING METHODS PER ASME Y14.5M-1994. ALL DIMENSIONS ARE IN MILLIMETERS. BALL POSITION DESIGNATION PER JESD 95-1, SPP-010. e REPRESENTS THE SOLDER BALL GRID PITCH. SYMBOL "MD" IS THE BALL MATRIX SIZE IN THE "D" DIRECTION. SYMBOL "ME" IS THE BALL MATRIX SIZE IN THE "E" DIRECTION. n IS THE NUMBER OF POPULTED SOLDER BALL POSITIONS FOR MATRIX SIZE MD X ME. DIMENSION "b" IS MEASURED AT THE MAXIMUM BALL DIAMETER IN A PLANE PARALLEL TO DATUM C. SD AND SE ARE MEASURED WITH RESPECT TO DATUMS A AND B AND DEFINE THE POSITION OF THE CENTER SOLDER BALL IN THE OUTER ROW. WHEN THERE IS AN ODD NUMBER OF SOLDER BALLS IN THE OUTER ROW SD OR SE = 0.000. WHEN THERE IS AN EVEN NUMBER OF SOLDER BALLS IN THE OUTER ROW, SD OR SE = e/2 "+" INDICATES THE THEORETICAL CENTER OF DEPOPULATED BALLS. N/A
10 A1 CORNER TO BE IDENTIFIED BY CHAMFER, LASER OR INK MARK, METALLIZED MARK INDENTATION OR OTHER MEANS.
3393\ 16-038.22a
20
S73WS256N Based MCPs
S73WS256N_00_A3 December 16, 2005
Advance
Information
7.2
FTF137--137-ball Fine-Pitch Ball Grid Array (FBGA) 9 x 12.0 x 1.4 mm Package
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NOTES: PACKAGE JEDEC DxE SYMBOL A A1 A2 D E D1 E1 MD ME n Ob eE eD SD / SE 0.35 FTF 137 N/A 12.00 mm x 9.00 mm PACKAGE MIN --0.17 1.02 NOM ------12.00 BSC. 9.00 BSC. 10.40 BSC. 7.20 BSC. 14 10 137 0.40 0.80 BSC. 0.80 BSC 0.40 BSC. G5,H5,H6 0.45 MAX 1.40 --1.17 PROFILE BALL HEIGHT BODY THICKNESS BODY SIZE BODY SIZE MATRIX FOOTPRINT MATRIX FOOTPRINT MATRIX SIZE D DIRECTION MATRIX SIZE E DIRECTION BALL COUNT BALL DIAMETER BALL PITCH BALL PITCH SOLDER BALL PLACEMENT DEPOPULATED SOLDER BALLS 9 8. 6 7 4. 5. NOTE 2. 3. 1. DIMENSIONING AND TOLERANCING METHODS PER ASME Y14.5M-1994. ALL DIMENSIONS ARE IN MILLIMETERS. BALL POSITION DESIGNATION PER JEP95, SECTION 4.3, SPP-010. e REPRESENTS THE SOLDER BALL GRID PITCH. SYMBOL "MD" IS THE BALL MATRIX SIZE IN THE "D" DIRECTION. SYMBOL "ME" IS THE BALL MATRIX SIZE IN THE "E" DIRECTION. n IS THE NUMBER OF POPULTED SOLDER BALL POSITIONS FOR MATRIX SIZE MD X ME. DIMENSION "b" IS MEASURED AT THE MAXIMUM BALL DIAMETER IN A PLANE PARALLEL TO DATUM C. SD AND SE ARE MEASURED WITH RESPECT TO DATUMS A AND B AND DEFINE THE POSITION OF THE CENTER SOLDER BALL IN THE OUTER ROW. WHEN THERE IS AN ODD NUMBER OF SOLDER BALLS IN THE OUTER ROW SD OR SE = 0.000. WHEN THERE IS AN EVEN NUMBER OF SOLDER BALLS IN THE OUTER ROW, SD OR SE = e/2 "+" INDICATES THE THEORETICAL CENTER OF DEPOPULATED BALLS. A1 CORNER TO BE IDENTIFIED BY CHAMFER, LASER OR INK MARK, METALLIZED MARK INDENTATION OR OTHER MEANS.
3532 \ 16-038.21 \ 12.13.05
December 16, 2005 S73WS256N_00_A3
S73WS256N Based MCPs
21
S29WS-N MirrorBitTM Flash Family
S29WS256N, S29WS128N 256/128 Megabit (16/8 M x 16 bit) CMOS 1.8 Volt-only Simultaneous Read/Write, Burst-mode Flash Memory
Data Sheet
PRELIMINARY
General Description
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Publication Number S29WS-N_m0
Revision I
Amendment 0
Issue Date December 3, 2005
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Preliminary
8
Input/Output Descriptions & Logic Symbol
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Table 8.1
Symbol
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Description
Type
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S29WS-N_m0_I0 December 3, 2005
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December 3, 2005 S29WS-N_m0_I0
25
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11
Product Overview
7KH 6:61 IDPLO\ FRQVLVWV RI 0ELW YROWVRQO\ VLPXOWDQHRXV UHDGZULWH EXUVW PRGH )ODVK GHYLFH RSWLPL]HG IRU WRGD\V ZLUHOHVV GHVLJQV WKDW GHPDQG D ODUJH VWRUDJH DUUD\ ULFK IXQFWLRQDOLW\ DQG ORZ SRZHU FRQVXPSWLRQ 7KHVH GHYLFHV DUH RUJDQL]HG LQ RU 0ZRUGV RI ELWV HDFK DQG DUH FDSDEOH RI FRQWLQXRXV V\QFKURQRXV EXUVW UHDG RU OLQHDU UHDG RU ZRUG DOLJQHG JURXS ZLWK RU ZLWKRXW ZUDS DURXQG 7KHVH SURGXFWV DOVR RIIHU VLQJOH ZRUG SURJUDPPLQJ RU D ZRUG EXIIHU IRU SURJUDP PLQJ ZLWK SURJUDPHUDVH DQG VXVSHQG IXQFWLRQDOLW\ $GGLWLRQDO IHDWXUHV LQFOXGH $GYDQFHG 6HFWRU 3URWHFWLRQ PHWKRGV IRU SURWHFWLQJ VHFWRUV DV UHTXLUHG ZRUGV RI 6HFXUHG 6LOLFRQ DUHD IRU VWRULQJ FXVWRPHU DQG IDFWRU\ VHFXUHG LQIRUPDWLRQ 7KH 6HFXUHG 6LOLFRQ 6HFWRU LV 2QH 7LPH 3URJUDPPDEOH
11.1
Memory Map
7KH 6:61 0ELW GHYLFHV FRQVLVW RI EDQNV RUJDQL]HG DV VKRZQ LQ 7DEOH 7DEOH
Table 11.1
Bank Size Sector Count Sector Size (KB) Bank
S29WS256N Sector & Memory Address Map
Sector/ Sector Range
6$ 6$
Address Range
K)))K K)))K K%)))K &K))))K K))))K WR )K)))))K K))))K WR )K)))))K K))))K WR )K)))))K K))))K WR )K)))))K K))))K WR )K)))))K K))))K WR )K)))))K K))))K WR )K)))))K K))))K WR )K)))))K K))))K WR )K)))))K K))))K WR )K)))))K $K$))))K WR $)K$)))))K %K%))))K WR %)K%)))))K &K&))))K WR &)K&)))))K 'K'))))K WR ')K')))))K (K())))K WR ()K()))))K )K)))))K WR )(K)())))K ))K)))))K ))K)))))K ))K))%)))K ))&K))))))K
Notes
0%
6$ 6$ 6$ WR 6$
&RQWDLQV IRXU VPDOOHU VHFWRUV DW ERWWRP RI DGGUHVVDEOH PHPRU\
0% 0% 0% 0% 0% 0% 0% 0% 0% 0% 0% 0% 0% 0% 0%

6$ WR 6$ 6$ WR 6$ 6$ WR 6$ 6$ WR 6$ 6$ WR 6$ 6$ WR 6$ 6$ WR 6$ 6$ WR 6$ 6$ WR 6$ 6$ WR 6$ 6$ WR 6$ 6$ WR 6$ 6$ WR 6$ 6$ WR 6$ 6$ WR 6$ 6$ 6$ 6$ 6$
$OO .% VHFWRUV 3DWWHUQ IRU VHFWRU DGGUHVV UDQJH LV [[K[[))))K VHH QRWH
&RQWDLQV IRXU VPDOOHU VHFWRUV DW WRS RI DGGUHVVDEOH PHPRU\
1RWH 7KLV WDEOH KDV EHHQ FRQGHQVHG WR VKRZ VHFWRUUHODWHG LQIRUPDWLRQ IRU DQ HQWLUH GHYLFH RQ D VLQJOH SDJH 6HFWRUV DQG WKHLU DGGUHVV UDQJHV WKDW DUH QRW H[SOLFLWO\ OLVWHG VXFK DV 6$6$ KDYH VHFWRU VWDUWLQJ DQG HQGLQJ DGGUHVVHV WKDW IRUP WKH VDPH SDWWHUQ DV DOO RWKHU VHFWRUV RI WKDW VL]H )RU H[DPSOH DOO .% VHFWRUV KDYH WKH SDWWHUQ [[K[[))))K
26
S29WS-N_m0_I0 December 3, 2005
Preliminary
Table 11.2. S29WS128N Sector & Memory Address Map
Bank Size Sector Count Sector Size (KB)
0% 0% 0% 0% 0% 0% 0% 0% 0% 0% 0% 0% 0% 0% 0% 0%
Bank
Sector/ Sector Range
6$ 6$ 6$ 6$ 6$ WR 6$ 6$ WR 6$ 6$ WR 6$ 6$ WR 6$ 6$ WR 6$ 6$ WR 6$ 6$ WR 6$ 6$ WR 6$ 6$ WR 6$ 6$ WR 6$ 6$ WR 6$ 6$ WR 6$ 6$ WR 6$ 6$ WR 6$ 6$ WR 6$ 6$ WR 6$ 6$ 6$ 6$ 6$
Address Range
K)))K K)))K K%)))K &K))))K K))))K WR K))))K K))))K WR )K)))))K K))))K WR K))))K K))))K WR )K)))))K K))))K WR K))))K K))))K WR )K)))))K K))))K WR K))))K K))))K WR )K)))))K K))))K WR K))))K K))))K WR )K)))))K K))))K WR K))))K K))))K WR )K)))))K K))))K WR K))))K K))))K WR )K)))))K K))))K WR K))))K K))))K WR (K())))K )K))))K )K))))K )K)%)))K )&K)))))K
Notes
&RQWDLQV IRXU VPDOOHU VHFWRUV DW ERWWRP RI DGGUHVVDEOH PHPRU\
$OO .% VHFWRUV 3DWWHUQ IRU VHFWRU DGGUHVV UDQJH LV [[K[[))))K VHH QRWH
&RQWDLQV IRXU VPDOOHU VHFWRUV DW WRS RI DGGUHVVDEOH PHPRU\
1RWH 7KLV WDEOH KDV EHHQ FRQGHQVHG WR VKRZ VHFWRUUHODWHG LQIRUPDWLRQ IRU DQ HQWLUH GHYLFH RQ D VLQJOH SDJH 6HFWRUV DQG WKHLU DGGUHVV UDQJHV WKDW DUH QRW H[SOLFLWO\ OLVWHG VXFK DV 6$6$ KDYH VHFWRU VWDUWLQJ DQG HQGLQJ DGGUHVVHV WKDW IRUP WKH VDPH SDWWHUQ DV DOO RWKHU VHFWRUV RI WKDW VL]H )RU H[DPSOH DOO .% VHFWRUV KDYH WKH SDWWHUQ [[K[[))))K
December 3, 2005 S29WS-N_m0_I0
27
Preliminary
12 Device Operations
7KLV VHFWLRQ GHVFULEHV WKH UHDG SURJUDP HUDVH VLPXOWDQHRXV UHDGZULWH RSHUDWLRQV KDQGVKDN LQJ DQG UHVHW IHDWXUHV RI WKH )ODVK GHYLFHV 2SHUDWLRQV DUH LQLWLDWHG E\ ZULWLQJ VSHFLILF FRPPDQGV RU D VHTXHQFH ZLWK VSHFLILF DGGUHVV DQG GDWD SDWWHUQV LQWR WKH FRPPDQG UHJLVWHUV VHH 7DEOHV DQG 7KH FRPPDQG UHJLVWHU LWVHOI GRHV QRW RFFXS\ DQ\ DGGUHVVDEOH PHPRU\ ORFDWLRQ UDWKHU LW LV FRPSRVHG RI ODWFKHV WKDW VWRUH WKH FRPPDQGV DORQJ ZLWK WKH DGGUHVV DQG GDWD LQIRUPDWLRQ QHHGHG WR H[HFXWH WKH FRP PDQG 7KH FRQWHQWV RI WKH UHJLVWHU VHUYH DV LQSXW WR WKH LQWHUQDO VWDWH PDFKLQH DQG WKH VWDWH PDFKLQH RXWSXWV GLFWDWH WKH IXQFWLRQ RI WKH GHYLFH :ULWLQJ LQFRUUHFW DGGUHVV DQG GDWD YDOXHV RU ZULWLQJ WKHP LQ DQ LPSURSHU VHTXHQFH PD\ SODFH WKH GHYLFH LQ DQ XQNQRZQ VWDWH LQ ZKLFK FDVH WKH V\VWHP PXVW ZULWH WKH UHVHW FRPPDQG WR UHWXUQ WKH GHYLFH WR WKH UHDGLQJ DUUD\ GDWD PRGH
12.1
Device Operation Table
7KH GHYLFH PXVW EH VHWXS DSSURSULDWHO\ IRU HDFK RSHUDWLRQ 7DEOH GHVFULEHV WKH UHTXLUHG VWDWH RI HDFK FRQWURO SLQ IRU DQ\ SDUWLFXODU RSHUDWLRQ
Table 12.1
Operation CE#
Device Operations
OE# WE# Addresses DQ15-0 RESET# CLK AVD#
$V\QFKURQRXV 5HDG $GGUHVVHV /DWFKHG $V\QFKURQRXV 5HDG $GGUHVVHV 6WHDG\ 6WDWH $V\QFKURQRXV :ULWH 6\QFKURQRXV :ULWH 6WDQGE\ &( +DUGZDUH 5HVHW
Burst Read Operations (Synchronous)
/ / / / + ;
/ / + + ; ;
+ + / / ; ;
$GGU ,Q $GGU ,Q $GGU ,Q $GGU ,Q ; ;
'DWD 2XW 'DWD 2XW ,2 ,2 +,*+ = +,*+ =
+ + + + + /
; ; ; / /
; ;
; ;
/RDG 6WDUWLQJ %XUVW $GGUHVV $GYDQFH %XUVW WR QH[W DGGUHVV ZLWK DSSURSULDWH 'DWD SUHVHQWHG RQ WKH 'DWD %XV 7HUPLQDWH FXUUHQW %XUVW UHDG F\FOH 7HUPLQDWH FXUUHQW %XUVW UHDG F\FOH YLD 5(6(7 7HUPLQDWH FXUUHQW %XUVW UHDG F\FOH DQG VWDUW QHZ %XUVW UHDG F\FOH
/HJHQG / /RJLF + /RJLF ; 'RQW &DUH ,2
/ / + ; /
; / ; ; ;
+ + + + +
$GGU ,Q ; ; ; $GGU ,Q
; %XUVW 'DWD 2XW +,*+ = +,*+ = ,2
+ + + / + ; + ; ;
,QSXW2XWSXW
12.2
Asynchronous Read
$OO PHPRULHV UHTXLUH DFFHVV WLPH WR RXWSXW DUUD\ GDWD ,Q DQ DV\QFKURQRXV UHDG RSHUDWLRQ GDWD LV UHDG IURP RQH PHPRU\ ORFDWLRQ DW D WLPH $GGUHVVHV DUH SUHVHQWHG WR WKH GHYLFH LQ UDQGRP RUGHU DQG WKH SURSDJDWLRQ GHOD\ WKURXJK WKH GHYLFH FDXVHV WKH GDWD RQ LWV RXWSXWV WR DUULYH DV\QFKURQRXVO\ ZLWK WKH DGGUHVV RQ LWV LQSXWV 7KH GHYLFH GHIDXOWV WR UHDGLQJ DUUD\ GDWD DV\QFKURQRXVO\ DIWHU GHYLFH SRZHUXS RU KDUGZDUH UH VHW 7R UHDG GDWD IURP WKH PHPRU\ DUUD\ WKH V\VWHP PXVW ILUVW DVVHUW D YDOLG DGGUHVV RQ $PD[ $ ZKLOH GULYLQJ $9' DQG &( WR 9,/ :( PXVW UHPDLQ DW 9,+ 7KH ULVLQJ HGJH RI $9' ODWFKHV WKH DGGUHVV 7KH 2( VLJQDO PXVW EH GULYHQ WR 9,/ RQFH $9' KDV EHHQ GULYHQ WR 9,+ 'DWD LV RXWSXW RQ $'4$'4 SLQV DIWHU WKH DFFHVV WLPH W2( KDV HODSVHG IURP WKH IDOOLQJ HGJH RI 2(
28
S29WS-N_m0_I0 December 3, 2005
Preliminary
12.3
Page Read Mode
7KH GHYLFH LV FDSDEOH RI IDVW SDJH PRGH UHDG DQG LV FRPSDWLEOH ZLWK WKH SDJH PRGH 0DVN 520 UHDG RSHUDWLRQ 7KLV PRGH SURYLGHV IDVWHU UHDG DFFHVV VSHHG IRU UDQGRP ORFDWLRQV ZLWKLQ D SDJH 7KH UDQGRP RU LQLWLDO SDJH DFFHVV LV W$&& RU W&( DQG VXEVHTXHQW SDJH UHDG DFFHVVHV DV ORQJ DV WKH ORFDWLRQV VSHFLILHG E\ WKH PLFURSURFHVVRU IDOOV ZLWKLQ WKDW SDJH LV HTXLYDOHQW WR W3$&& :KHQ &( LV GHDVVHUWHG 9,+ WKH UHDVVHUWLRQ RI &( IRU VXEVHTXHQW DFFHVV KDV DFFHVV WLPH RI W$&& RU W&( +HUH DJDLQ &( VHOHFWV WKH GHYLFH DQG 2( LV WKH RXWSXW FRQWURO DQG VKRXOG EH XVHG WR JDWH GDWD WR WKH RXWSXW LQSXWV LI WKH GHYLFH LV VHOHFWHG )DVW SDJH PRGH DFFHVVHV DUH REWDLQHG E\ NHHSLQJ $PD[ $ FRQVWDQW DQG FKDQJLQJ $ $ WR VHOHFW WKH VSHFLILF ZRUG ZLWKLQ WKDW SDJH $GGUHVV ELWV $PD[ $ VHOHFW D ZRUG SDJH DQG DGGUHVV ELWV $ $ VHOHFW D VSHFLILF ZRUG ZLWKLQ WKDW SDJH 7KLV LV DQ DV\QFKURQRXV RSHUDWLRQ ZLWK WKH PLFURSURFHVVRU VXSSO\LQJ WKH VSH FLILF ZRUG ORFDWLRQ 6HH 7DEOH IRU GHWDLOV RQ VHOHFWLQJ VSHFLILF ZRUGV 7KH GHYLFH LV DXWRPDWLFDOO\ VHW WR UHDGLQJ DUUD\ GDWD DIWHU GHYLFH SRZHUXS 1R FRPPDQGV DUH UHTXLUHG WR UHWULHYH GDWD (DFK EDQN LV UHDG\ WR UHDG DUUD\ GDWD DIWHU FRPSOHWLQJ DQ (PEHGGHG 3URJUDP RU (PEHGGHG (UDVH DOJRULWKP 5HDGV IURP WKH PHPRU\ DUUD\ PD\ EH SHUIRUPHG LQ FRQMXQFWLRQ ZLWK WKH (UDVH 6XVSHQG DQG 3UR JUDP 6XVSHQG IHDWXUHV $IWHU WKH GHYLFH DFFHSWV DQ (UDVH 6XVSHQG FRPPDQG WKH FRUUHVSRQGLQJ EDQN HQWHUV WKH HUDVHVXVSHQGUHDG PRGH DIWHU ZKLFK WKH V\VWHP FDQ UHDG GDWD IURP DQ\ QRQ HUDVHVXVSHQGHG VHFWRU ZLWKLQ WKH VDPH EDQN 7KH V\VWHP FDQ UHDG DUUD\ GDWD XVLQJ WKH VWDQ GDUG UHDG WLPLQJ H[FHSW WKDW LI LW UHDGV DW DQ DGGUHVV ZLWKLQ HUDVHVXVSHQGHG VHFWRUV WKH GHYLFH RXWSXWV VWDWXV GDWD $IWHU FRPSOHWLQJ D SURJUDPPLQJ RSHUDWLRQ LQ WKH (UDVH 6XVSHQG PRGH WKH V\VWHP PD\ RQFH DJDLQ UHDG DUUD\ GDWD ZLWK WKH VDPH H[FHSWLRQ $IWHU WKH GHYLFH DFFHSWV D 3UR JUDP 6XVSHQG FRPPDQG WKH FRUUHVSRQGLQJ EDQN HQWHUV WKH SURJUDPVXVSHQGUHDG PRGH DIWHU ZKLFK WKH V\VWHP FDQ UHDG GDWD IURP DQ\ QRQSURJUDPVXVSHQGHG VHFWRU ZLWKLQ WKH VDPH EDQN 7KH GHDVVHUWLRQ DQG UHDVVHUWLRQ RI $9' FUHDWHV D QHZ W$&& 7KH XVHU PXVW NHHS $9' GXULQJ DQG EHWZHHQ SDJH UHDGV RQ DGGUHVV $ 'XULQJ 6LPXOWDQHRXV 2SHUDWLRQ 62 WKH XVHU QHHGV WR GHDVVHUW DQG UH DVVHUW HLWKHU &( $9' ZKHQ SHUIRUPLQJ GDWD SROOLQJ WR 62 UHDG ORZ RU
Table 12.2 Word Selection within a Page
:RUG :RUG :RUG :RUG :RUG $ $
12.4
Synchronous (Burst) Read Mode & Configuration Register
:KHQ D VHULHV RI DGMDFHQW DGGUHVVHV QHHGV WR EH UHDG IURP WKH GHYLFH LQ RUGHU IURP ORZHVW WR KLJKHVW DGGUHVV WKH V\QFKURQRXV RU EXUVW UHDG PRGH FDQ EH XVHG WR VLJQLILFDQWO\ UHGXFH WKH RYHUDOO WLPH QHHGHG IRU WKH GHYLFH WR RXWSXW DUUD\ GDWD $IWHU DQ LQLWLDO DFFHVV WLPH UHTXLUHG IRU WKH GDWD IURP WKH ILUVW DGGUHVV ORFDWLRQ VXEVHTXHQW GDWD LV RXWSXW V\QFKURQL]HG WR D FORFN LQSXW SURYLGHG E\ WKH V\VWHP 7KH GHYLFH RIIHUV ERWK FRQWLQXRXV DQG OLQHDU PHWKRGV RI EXUVW UHDG RSHUDWLRQ ZKLFK DUH GLV FXVVHG LQ VXEVHFWLRQV DQG DQG 6LQFH WKH GHYLFH GHIDXOWV WR DV\QFKURQRXV UHDG PRGH DIWHU SRZHUXS RU D KDUGZDUH UHVHW WKH FRQILJXUDWLRQ UHJLVWHU PXVW EH VHW WR HQDEOH WKH EXUVW UHDG PRGH 2WKHU &RQILJXUDWLRQ 5HJLVWHU VHWWLQJV LQFOXGH WKH QXPEHU RI ZDLW VWDWHV WR LQVHUW EHIRUH WKH LQLWLDO ZRUG W,$&& RI HDFK EXUVW
December 3, 2005 S29WS-N_m0_I0
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Preliminary
DFFHVV WKH EXUVW PRGH LQ ZKLFK WR RSHUDWH DQG ZKHQ 5'< LQGLFDWHV GDWD LV UHDG\ WR EH UHDG 3ULRU WR HQWHULQJ WKH EXUVW PRGH WKH V\VWHP VKRXOG ILUVW GHWHUPLQH WKH FRQILJXUDWLRQ UHJLVWHU VHWWLQJV DQG UHDG WKH FXUUHQW UHJLVWHU VHWWLQJV LI GHVLUHG YLD WKH 5HDG &RQILJXUDWLRQ 5HJLVWHU FRPPDQG VHTXHQFH DQG WKHQ ZULWH WKH FRQILJXUDWLRQ UHJLVWHU FRPPDQG VHTXHQFH 6HH 6HFWLRQ &RQILJXUDWLRQ 5HJLVWHU DQG 7DEOH 0HPRU\ $UUD\ &RPPDQGV IRU IXUWKHU GHWDLOV
Power-up/ Hardware Reset
Asynchronous Read Mode Only
Set Burst Mode Configuration Register Command for Synchronous Mode (CR15 = 0)
Set Burst Mode Configuration Register Command for Asynchronous Mode (CR15 = 1)
Synchronous Read Mode Only
Figure 12.1. Synchronous/Asynchronous State Diagram
7KH GHYLFH RXWSXWV WKH LQLWLDO ZRUG VXEMHFW WR WKH IROORZLQJ RSHUDWLRQDO FRQGLWLRQV W,$&& VSHFLILFDWLRQ WKH WLPH IURP WKH ULVLQJ HGJH RI WKH ILUVW FORFN F\FOH DIWHU DGGUHVVHV DUH ODWFKHG WR YDOLG GDWD RQ WKH GHYLFH RXWSXWV
FRQILJXUDWLRQ UHJLVWHU VHWWLQJ &5&5 WKH WRWDO QXPEHU RI FORFN F\FOHV ZDLW VWDWHV WKDW RFFXU EHIRUH YDOLG GDWD DSSHDUV RQ WKH GHYLFH RXWSXWV 7KH HIIHFW LV WKDW W,$&& LV OHQJWKHQHG 7KH GHYLFH RXWSXWV VXEVHTXHQW ZRUGV W%$&& DIWHU WKH DFWLYH HGJH RI HDFK VXFFHVVLYH FORFN F\FOH ZKLFK DOVR LQFUHPHQWV WKH LQWHUQDO DGGUHVV FRXQWHU 7KH GHYLFH RXWSXWV EXUVW GDWD DW WKLV UDWH VXEMHFW WR WKH IROORZLQJ RSHUDWLRQDO FRQGLWLRQV VWDUWLQJ DGGUHVV ZKHWKHU WKH DGGUHVV LV GLYLVLEOH E\ IRXU ZKHUH $>@ LV $ GLYLVLEOH E\IRXU DGGUHVV LQFXUV WKH OHDVW QXPEHU RI DGGLWLRQDO ZDLW VWDWHV WKDW RFFXU DIWHU WKH LQLWLDO ZRUG 7KH QXPEHU RI DGGLWLRQDO ZDLW VWDWHV UHTXLUHG LQFUHDVHV IRU EXUVW RSHUDWLRQV LQ ZKLFK WKH VWDUWLQJ DGGUHVV LV RQH WZR RU WKUHH ORFDWLRQV DERYH WKH GLYLVLEOHE\IRXU DGGUHVV LH ZKHUH $>@ LV RU ERXQGDU\ FURVVLQJ 7KHUH LV D ERXQGDU\ DW HYHU\ ZRUGV GXH WR WKH LQWHUQDO DUFKLWHFWXUH RI WKH GHYLFH 2QH DGGLWLRQDO ZDLW VWDWH PXVW EH LQVHUWHG ZKHQ FURVVLQJ WKLV ERXQGDU\ LI WKH PHPRU\ EXV LV RSHUDWLQJ DW D KLJK FORFN IUHTXHQF\ 3OHDVH UHIHU WR WKH WDEOHV EHORZ
FORFN IUHTXHQF\ WKH VSHHG DW ZKLFK WKH GHYLFH LV H[SHFWHG WR EXUVW GDWD +LJKHU VSHHGV UHTXLUH DGGLWLRQDO ZDLW VWDWHV DIWHU WKH LQLWLDO ZRUG IRU SURSHU RSHUDWLRQ ,Q DOO FDVHV ZLWK RU ZLWKRXW ODWHQF\ WKH 5'< RXWSXW LQGLFDWHV ZKHQ WKH QH[W GDWD LV DYDLODEOH WR EH UHDG 7DEOHV UHIOHFW ZDLW VWDWHV UHTXLUHG IRU 6:61 GHYLFHV 5HIHU WR WKH &RQILJ XUDWLRQ 5HJLVWHU WDEOH &5 &5 DQG WLPLQJ GLDJUDPV IRU PRUH GHWDLOV
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S29WS-N_m0_I0 December 3, 2005
Preliminary
Table 12.3 Address Latency (S29WS256N)
:RUG :DLW 6WDWHV [ ZV [ ZV [ ZV [ ZV ' ' ' ' ' ' ' ZV ' ' ZV ZV ' ZV ZV ZV &\FOH ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' '
Table 12.4 Address Latency (S29WS128N)
:RUG :DLW 6WDWHV ZV ZV ZV ZV ' ' ' ' ' ' ' ZV ' ' ZV ZV ' ZV ZV ZV &\FOH ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' '
Table 12.5 Address/Boundary Crossing Latency (S29WS256N @ 80MHz)
:RUG :DLW 6WDWHV ZV ZV ZV ZV ' ' ' ' ' ' ' ZV ' ' ZV ZV ' ZV ZV ZV &\FOH ZV ZV ZV ZV ZV ZV ZV ZV ' ' ' ' ' ' ' ' ' ' ' '
Table 12.6 Address/Boundary Crossing Latency (S29WS256N @ 66 MHz)
:RUG :DLW 6WDWHV ZV ZV ZV ZV ' ' ' ' ' ' ' ZV ' ' ZV ZV ' ZV ZV ZV &\FOH ZV ZV ZV ZV ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' '
Table 12.7 Address/Boundary Crossing Latency (S29WS256N @ 54MHz)
:RUG :DLW 6WDWHV ZV ZV ZV ZV ' ' ' ' ' ' ' ZV ' ' ZV ZV ' ZV ZV ZV &\FOH ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' '
Table 12.8 Address/Boundary Crossing Latency (S29WS128N)
:RUG :DLW 6WDWHV ZV ZV ZV ZV ' ' ' ' ' ' ' ZV ' ' ZV ZV ' ZV ZV ZV &\FOH ZV ZV ZV ZV ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' '
December 3, 2005 S29WS-N_m0_I0
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Preliminary
Note: Setup Configuration Register parameters
Write Unlock Cycles: Address 555h, Data AAh Address 2AAh, Data 55h
Unlock Cycle 1 Unlock Cycle 2
Write Set Configuration Register Command and Settings: Address 555h, Data D0h Address X00h, Data CR
Command Cycle CR = Configuration Register Bits CR15-CR0
Load Initial Address Address = RA
RA = Read Address
Read Initial Data RD = DQ[15:0]
RD = Read Data
Wait X Clocks: Additional Latency Due to Starting Address, Clock Frequency, and Boundary Crossing
5HIHU WR WKH /DWHQF\ WDEOHV
Read Next Data RD = DQ[15:0] No Delay X Clocks Crossing Boundary? No
Yes
End of Data?
Yes
Completed
Figure 12.2. &RQWLQXRXV %XUVW 5HDG 0RGH
Synchronous Read
,Q WKH FRQWLQXRXV EXUVW UHDG PRGH WKH GHYLFH RXWSXWV VHTXHQWLDO EXUVW GDWD IURP WKH VWDUWLQJ DGGUHVV JLYHQ DQG WKHQ ZUDS DURXQG WR DGGUHVV K ZKHQ LW UHDFKHV WKH KLJKHVW DGGUHVV DEOH PHPRU\ ORFDWLRQ 7KH EXUVW UHDG PRGH FRQWLQXHV XQWLO WKH V\VWHP GULYHV &( KLJK RU 5(6(7 9,/ &RQWLQXRXV EXUVW PRGH FDQ DOVR EH DERUWHG E\ DVVHUWLQJ $9' ORZ DQG SURYLGLQJ D QHZ DGGUHVV WR WKH GHYLFH ,I WKH DGGUHVV EHLQJ UHDG FURVVHV D ZRUG OLQH ERXQGDU\ DV PHQWLRQHG DERYH DQG WKH VXE VHTXHQW ZRUG OLQH LV QRW EHLQJ SURJUDPPHG RU HUDVHG DGGLWLRQDO ODWHQF\ F\FOHV DUH UHTXLUHG DV UHIOHFWHG E\ WKH FRQILJXUDWLRQ UHJLVWHU WDEOH 7DEOH ,I WKH DGGUHVV FURVVHV D EDQN ERXQGDU\ ZKLOH WKH VXEVHTXHQW EDQN LV SURJUDPPLQJ RU HUDVLQJ WKH GHYLFH SURYLGHV UHDG VWDWXV LQIRUPDWLRQ DQG WKH FORFN LV LJQRUHG 8SRQ FRPSOHWLRQ RI VWDWXV UHDG RU SURJUDP RU HUDVH RSHUDWLRQ WKH KRVW FDQ UHVWDUW D EXUVW UHDG RSHUDWLRQ XVLQJ D QHZ DG GUHVV DQG $9' SXOVH
32
S29WS-N_m0_I0 December 3, 2005
Preliminary
:RUG /LQHDU %XUVW 5HDG ZLWK :UDS $URXQG
,Q D OLQHDU EXUVW UHDG RSHUDWLRQ D IL[HG QXPEHU RI ZRUGV RU ZRUGV DUH UHDG IURP FRQVHFXWLYH DGGUHVVHV WKDW DUH GHWHUPLQHG E\ WKH JURXS ZLWKLQ ZKLFK WKH VWDUWLQJ DGGUHVV IDOOV 7KH JURXSV DUH VL]HG DFFRUGLQJ WR WKH QXPEHU RI ZRUGV UHDG LQ D VLQJOH EXUVW VHTXHQFH IRU D JLYHQ PRGH VHH 7DEOH )RU H[DPSOH LI WKH VWDUWLQJ DGGUHVV LQ WKH ZRUG PRGH LV &K WKH DGGUHVV UDQJH WR EH UHDG ZRXOG EH )K DQG WKH EXUVW VHTXHQFH ZRXOG EH &'()$%K 7KXV WKH GH YLFH RXWSXWV DOO ZRUGV LQ WKDW EXUVW DGGUHVV JURXS XQWLO DOO ZRUG DUH UHDG UHJDUGOHVV RI ZKHUH WKH VWDUWLQJ DGGUHVV RFFXUV LQ WKH DGGUHVV JURXS DQG WKHQ WHUPLQDWHV WKH EXUVW UHDG ,Q D VLPLODU IDVKLRQ WKH ZRUG DQG ZRUG /LQHDU :UDS PRGHV EHJLQ WKHLU EXUVW VHTXHQFH RQ WKH VWDUWLQJ DGGUHVV SURYLGHG WR WKH GHYLFH WKHQ ZUDS EDFN WR WKH ILUVW DGGUHVV LQ WKH VHOHFWHG DGGUHVV JURXS 1RWH WKDW LQ WKLV PRGH WKH DGGUHVV SRLQWHU GRHV QRW FURVV WKH ERXQGDU\ WKDW RFFXUV HYHU\ ZRUGV WKXV QR DGGLWLRQDO ZDLW VWDWHV DUH LQVHUWHG GXH WR ERXQGDU\ FURVVLQJ
Table 12.9 Burst Address Groups
Mode Group Size Group Address Ranges
ZRUG ZRUG ZRUG
ZRUGV ZRUGV ZRUGV
K )K K )K )K )K )K )K )K
:RUG /LQHDU %XUVW ZLWKRXW :UDS $URXQG
,I ZUDS DURXQG LV QRW HQDEOHG IRU OLQHDU EXUVW UHDG RSHUDWLRQV WKH ZRUG ZRUG RU ZRUG EXUVW H[HFXWHV XS WR WKH PD[LPXP PHPRU\ DGGUHVV RI WKH VHOHFWHG QXPEHU RI ZRUGV 7KH EXUVW VWRSV DIWHU RU DGGUHVVHV DQG GRHV QRW ZUDS DURXQG WR WKH ILUVW DGGUHVV RI WKH VHOHFWHG JURXS )RU H[DPSOH LI WKH VWDUWLQJ DGGUHVV LQ WKH ZRUG PRGH LV &K WKH DGGUHVV UDQJH WR EH UHDG ZRXOG EH K DQG WKH EXUVW VHTXHQFH ZRXOG EH &'()K LI ZUDS DURXQG LV QRW HQDEOHG 7KH QH[W DGGUHVV WR EH UHDG UHTXLUHV D QHZ DGGUHVV DQG $9' SXOVH 1RWH WKDW LQ WKLV EXUVW UHDG PRGH WKH DGGUHVV SRLQWHU PD\ FURVV WKH ERXQGDU\ WKDW RFFXUV HYHU\ ZRUGV ZKLFK ZLOO LQFXU WKH DGGLWLRQDO ERXQGDU\ FURVVLQJ ZDLW VWDWH
&RQILJXUDWLRQ 5HJLVWHU
7KH FRQILJXUDWLRQ UHJLVWHU VHWV YDULRXV RSHUDWLRQDO SDUDPHWHUV DVVRFLDWHG ZLWK EXUVW PRGH 8SRQ SRZHUXS RU KDUGZDUH UHVHW WKH GHYLFH GHIDXOWV WR WKH DV\QFKURQRXV UHDG PRGH DQG WKH FRQ ILJXUDWLRQ UHJLVWHU VHWWLQJV DUH LQ WKHLU GHIDXOW VWDWH 7KH KRVW V\VWHP VKRXOG GHWHUPLQH WKH SURSHU VHWWLQJV IRU WKH HQWLUH FRQILJXUDWLRQ UHJLVWHU DQG WKHQ H[HFXWH WKH 6HW &RQILJXUDWLRQ 5HJ LVWHU FRPPDQG VHTXHQFH EHIRUH DWWHPSWLQJ EXUVW RSHUDWLRQV 7KH FRQILJXUDWLRQ UHJLVWHU LV QRW UHVHW DIWHU GHDVVHUWLQJ &( 7KH &RQILJXUDWLRQ 5HJLVWHU FDQ DOVR EH UHDG XVLQJ D FRPPDQG VH TXHQFH VHH 7DEOH 7KH IROORZLQJ OLVW GHVFULEHV WKH UHJLVWHU VHWWLQJV
December 3, 2005 S29WS-N_m0_I0
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Preliminary
Table 12.10 Configuration Register
&5 %LW &5 &5 )XQFWLRQ 6HW 'HYLFH 5HDG 0RGH 5HVHUYHG 0+] &5 &5 6:61 6:61 6:61 3URJUDPPDEOH :DLW 6WDWH 6:61 6:61 6:61 0K] 0+] 'DWD YDOLG RQ WK DFWLYH &/. HGJH DIWHU DGGUHVVHV ODWFKHG 'DWD YDOLG RQ WK DFWLYH &/. HGJH DIWHU DGGUHVVHV ODWFKHG 'DWD YDOLG RQ WK DFWLYH &/. HGJH DIWHU DGGUHVVHV ODWFKHG GHIDXOW 5HVHUYHG 5HVHUYHG ,QVHUWV ZDLW VWDWHV EHIRUH LQLWLDO GDWD LV DYDLODEOH 6HWWLQJ JUHDWHU QXPEHU RI ZDLW VWDWHV EHIRUH LQLWLDO GDWD UHGXFHV ODWHQF\ DIWHU LQLWLDO GDWD 1RWHV 5'< VLJQDO DFWLYH ORZ 5'< VLJQDO DFWLYH KLJK GHIDXOW GHIDXOW 6HWWLQJV %LQDU\ 6\QFKURQRXV 5HDG %XUVW 0RGH (QDEOHG $V\QFKURQRXV 5HDG 0RGH GHIDXOW (QDEOHG 6:61 DW RU :DLW 6WDWH VHWWLQJ $OO RWKHUV
&5
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5'< DFWLYH RQH FORFN F\FOH EHIRUH GDWD 5'< DFWLYH ZLWK GDWD GHIDXOW :KHQ &5&5 DUH VHW WR 5'< LV DFWLYH ZLWK GDWD UHJDUGOHVV RI &5 VHWWLQJ GHIDXOW GHIDXOW GHIDXOW GHIDXOW
1R :UDS $URXQG %XUVW :UDS $URXQG %XUVW GHIDXOW ,JQRUHG LI LQ FRQWLQXRXV PRGH &RQWLQXRXV GHIDXOW :RUG /LQHDU %XUVW :RUG /LQHDU %XUVW :RUG /LQHDU %XUVW $OO RWKHU ELW VHWWLQJV DUH UHVHUYHG
&5 &5 &5
%XUVW /HQJWK
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&RQILJXUDWLRQ 5HJLVWHU LV LQ WKH GHIDXOW VWDWH XSRQ SRZHUXS RU KDUGZDUH UHVHW
5HDGLQJ WKH &RQILJXUDWLRQ 7DEOH 7KH FRQILJXUDWLRQ UHJLVWHU FDQ EH UHDG ZLWK D IRXUF\FOH FRP PDQG VHTXHQFH 6HH 7DEOH IRU VHTXHQFH GHWDLOV $ VRIWZDUH UHVHW FRPPDQG LV UHTXLUHG DIWHU UHDGLQJ RU VHWWLQJ WKH FRQILJXUDWLRQ UHJLVWHU WR VHW WKH GHYLFH LQWR WKH FRUUHFW VWDWH
34
S29WS-N_m0_I0 December 3, 2005
Preliminary
12.5
Autoselect
7KH $XWRVHOHFW LV XVHG IRU PDQXIDFWXUHU ,' 'HYLFH LGHQWLILFDWLRQ DQG VHFWRU SURWHFWLRQ LQIRUPD WLRQ 7KLV PRGH LV SULPDULO\ LQWHQGHG IRU SURJUDPPLQJ HTXLSPHQW WR DXWRPDWLFDOO\ PDWFK D GHYLFH ZLWK LWV FRUUHVSRQGLQJ SURJUDPPLQJ DOJRULWKP 7KH $XWRVHOHFW FRGHV FDQ DOVR EH DF FHVVHG LQV\VWHP :KHQ YHULI\LQJ VHFWRU SURWHFWLRQ WKH VHFWRU DGGUHVV PXVW DSSHDU RQ WKH DSSURSULDWH KLJKHVW RUGHU DGGUHVV ELWV VHH 7DEOH 7KH UHPDLQLQJ DGGUHVV ELWV DUH GRQ
W FDUH 7KH PRVW VLJQLILFDQW IRXU ELWV RI WKH DGGUHVV GXULQJ WKH WKLUG ZULWH F\FOH VHOHFWV WKH EDQN IURP ZKLFK WKH $XWRVHOHFW FRGHV DUH UHDG E\ WKH KRVW $OO RWKHU EDQNV FDQ EH DFFHVVHG QRUPDOO\ IRU GDWD UHDG ZLWKRXW H[LWLQJ WKH $XWRVHOHFW PRGH 7R DFFHVV WKH $XWRVHOHFW FRGHV WKH KRVW V\VWHP PXVW LVVXH WKH $XWRVHOHFW FRPPDQG 7KH $XWRVHOHFW FRPPDQG VHTXHQFH PD\ EH ZULWWHQ WR DQ DGGUHVV ZLWKLQ D EDQN WKDW LV HLWKHU LQ WKH UHDG RU HUDVHVXVSHQGUHDG PRGH 7KH $XWRVHOHFW FRPPDQG PD\ QRW EH ZULWWHQ ZKLOH WKH GHYLFH LV DFWLYHO\ SURJUDPPLQJ RU HUDVLQJ $XWRVHOHFW GRHV QRW VXSSRUW VLPXOWDQHRXV RSHUDWLRQV RU EXUVW PRGH 7KH V\VWHP PXVW ZULWH WKH UHVHW FRPPDQG WR UHWXUQ WR WKH UHDG PRGH RU HUDVHVXVSHQG UHDG PRGH LI WKH EDQN ZDV SUHYLRXVO\ LQ (UDVH 6XVSHQG
6HH 7DEOH IRU FRPPDQG VHTXHQFH GHWDLOV
Table 12.11 Autoselect Addresses
Description Address Read Data
0DQXIDFWXUHU ,' 'HYLFH ,' :RUG 'HYLFH ,' :RUG 'HYLFH ,' :RUG
%$ K %$ K %$ (K %$ )K
K (K :61 :61 '4 '4 5HVHUYHG /RFNHG /RFNHG 5HVHUYHG 1RW /RFNHG 1RW /RFNHG 6WDQGDUG +DQGVKDNH 3URWHFWV ERWK 7RS %RRW DQG '4 )DFWRU\ /RFN %LW '4 &XVWRPHU /RFN %LW '4 +DQGVKDNH %LW
,QGLFDWRU %LWV 6HH 1RWH
%$ K
'4 '4 :3 3URWHFWLRQ %RRW &RGH :3 %RWWRP %RRW 6HFWRUV 5HVHUYHG '4 5HVHUYHG '4 '<% 3RZHU XS 6WDWH >/RFN 5HJLVWHU '4@ /RFNHG GHIDXOW '4 33% (UDVHDELOLW\ >/RFN 5HJLVWHU '4@ (UDVH GLVDEOHG
8QORFNHG XVHU RSWLRQ
(UDVH DOORZHG
6HFWRU %ORFN /RFN 8QORFN
6$ K
K
/RFNHG K
8QORFNHG
1RWH )RU :61 DQG :6 '4 DQG '4 DUH UHVHUYHG
December 3, 2005 S29WS-N_m0_I0
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Preliminary
Software Functions and Sample Code
Table 12.12 Autoselect Entry
//' )XQFWLRQ OOGB$XWRVHOHFW(QWU\&PG
Cycle
Operation
Byte Address
Word Address
Data
8QORFN &\FOH 8QORFN &\FOH $XWRVHOHFW &RPPDQG
:ULWH :ULWH :ULWH
%$[$$$K %$[K %$[$$$K
%$[K %$[$$K %$[K
[$$K [K [K
Table 12.13 Autoselect Exit
//' )XQFWLRQ OOGB$XWRVHOHFW([LW&PG
Cycle
Operation
Byte Address
Word Address
Data
8QORFN &\FOH
:ULWH
EDVH ;;;K
EDVH ;;;K
[)K
1RWHV $Q\ RIIVHW ZLWKLQ WKH GHYLFH ZRUNV %$ EDVH %DQN $GGUHVV 7KH EDQN DGGUHVV LV UHTXLUHG EDVH DGGUHVV
7KH IROORZLQJ LV D & VRXUFH FRGH H[DPSOH RI XVLQJ WKH DXWRVHOHFW IXQFWLRQ WR UHDG WKH PDQXIDF WXUHU ,' 5HIHU WR WKH 6SDQVLRQ /RZ /HYHO 'ULYHU 8VHUV *XLGH DYDLODEOH RQ ZZZDPGFRP DQG ZZZIXMLWVXFRP IRU JHQHUDO LQIRUPDWLRQ RQ 6SDQVLRQ )ODVK PHPRU\ VRIWZDUH GHYHORSPHQW JXLGHOLQHV
/* Here is an example of Autoselect mode (getting manufacturer ID) */ /* Define UINT16 example: typedef unsigned short UINT16; */ UINT16 manuf_id; /* Auto Select Entry */ *( (UINT16 *)bank_addr + 0x555 ) = 0x00AA; /* write unlock cycle 1 */ *( (UINT16 *)bank_addr + 0x2AA ) = 0x0055; /* write unlock cycle 2 */ *( (UINT16 *)bank_addr + 0x555 ) = 0x0090; /* write autoselect command */
/* multiple reads can be performed after entry */ manuf_id = *( (UINT16 *)bank_addr + 0x000 ); /* read manuf. id */ /* Autoselect exit */
*( (UINT16 *)base_addr + 0x000 ) = 0x00F0; /* exit autoselect (write reset command) */
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S29WS-N_m0_I0 December 3, 2005
Preliminary
12.6
Program/Erase Operations
7KHVH GHYLFHV DUH FDSDEOH RI VHYHUDO PRGHV RI SURJUDPPLQJ DQG RU HUDVH RSHUDWLRQV ZKLFK DUH GHVFULEHG LQ GHWDLO LQ WKH IROORZLQJ VHFWLRQV +RZHYHU SULRU WR DQ\ SURJUDPPLQJ DQG RU HUDVH RSHUDWLRQ GHYLFHV PXVW EH VHWXS DSSURSULDWHO\ DV RXWOLQHG LQ WKH FRQILJXUDWLRQ UHJLVWHU 7DEOH )RU DQ\ SURJUDP DQG RU HUDVH RSHUDWLRQV LQFOXGLQJ ZULWLQJ FRPPDQG VHTXHQFHV WKH V\VWHP PXVW GULYH $9' DQG &( WR 9,/ DQG 2( WR 9,+ ZKHQ SURYLGLQJ DQ DGGUHVV WR WKH GHYLFH DQG GULYH :( DQG &( WR 9,/ DQG 2( WR 9,+ ZKHQ ZULWLQJ FRPPDQGV RU SURJUDPPLQJ GDWD $GGUHVVHV DUH ODWFKHG RQ WKH ODVW IDOOLQJ HGJH RI :( ULVLQJ HGJH RI :( RU &( 1RWH WKH IROORZLQJ :KHQ WKH (PEHGGHG 3URJUDP DOJRULWKP LV FRPSOHWH WKH GHYLFH UHWXUQV WR WKH UHDG PRGH 7KH V\VWHP FDQ GHWHUPLQH WKH VWDWXV RI WKH SURJUDP RSHUDWLRQ E\ XVLQJ '4 RU '4 5HIHU WR WKH :ULWH 2SHUDWLRQ 6WDWXV VHFWLRQ IRU LQIRUPDWLRQ RQ WKHVH VWDWXV ELWV $ FDQQRW EH SURJUDPPHG EDFN WR D $WWHPSWLQJ WR GR VR FDXVHV WKH GHYLFH WR VHW '4 KDOWLQJ DQ\ IXUWKHU RSHUDWLRQ DQG UHTXLULQJ D UHVHW FRPPDQG $ VXFFHHGLQJ UHDG VKRZV WKDW WKH GDWD LV VWLOO 2QO\ HUDVH RSHUDWLRQV FDQ FRQYHUW D WR D $Q\ FRPPDQGV ZULWWHQ WR WKH GHYLFH GXULQJ WKH (PEHGGHG 3URJUDP $OJRULWKP DUH LJQRUHG H[FHSW WKH 3URJUDP 6XVSHQG FRPPDQG 6HFXUHG 6LOLFRQ 6HFWRU $XWRVHOHFW DQG &), IXQFWLRQV DUH XQDYDLODEOH ZKHQ D SURJUDP RSHU DWLRQ LV LQ SURJUHVV $ KDUGZDUH UHVHW LPPHGLDWHO\ WHUPLQDWHV WKH SURJUDP RSHUDWLRQ DQG WKH SURJUDP FRPPDQG VHTXHQFH VKRXOG EH UHLQLWLDWHG RQFH WKH GHYLFH KDV UHWXUQHG WR WKH UHDG PRGH WR HQVXUH GDWD LQWHJULW\ 3URJUDPPLQJ LV DOORZHG LQ DQ\ VHTXHQFH DQG DFURVV VHFWRU ERXQGDULHV IRU VLQJOH ZRUG SUR JUDPPLQJ RSHUDWLRQ RU &( ZKLOH GDWD LV ODWFKHG RQ WKH VW

6LQJOH :RUG 3URJUDPPLQJ
6LQJOH ZRUG SURJUDPPLQJ PRGH LV WKH VLPSOHVW PHWKRG RI SURJUDPPLQJ ,Q WKLV PRGH IRXU )ODVK FRPPDQG ZULWH F\FOHV DUH XVHG WR SURJUDP DQ LQGLYLGXDO )ODVK DGGUHVV 7KH GDWD IRU WKLV SUR JUDPPLQJ RSHUDWLRQ FRXOG EH RU ELWV ZLGH :KLOH WKLV PHWKRG LV VXSSRUWHG E\ DOO 6SDQVLRQ GHYLFHV LQ JHQHUDO LW LV QRW UHFRPPHQGHG IRU GHYLFHV WKDW VXSSRUW :ULWH %XIIHU 3UR JUDPPLQJ 6HH 7DEOH IRU WKH UHTXLUHG EXV F\FOHV DQG )LJXUH IRU WKH IORZFKDUW :KHQ WKH (PEHGGHG 3URJUDP DOJRULWKP LV FRPSOHWH WKH GHYLFH WKHQ UHWXUQV WR WKH UHDG PRGH DQG DGGUHVVHV DUH QR ORQJHU ODWFKHG 7KH V\VWHP FDQ GHWHUPLQH WKH VWDWXV RI WKH SURJUDP RS HUDWLRQ E\ XVLQJ '4 RU '4 5HIHU WR WKH :ULWH 2SHUDWLRQ 6WDWXV VHFWLRQ IRU LQIRUPDWLRQ RQ WKHVH VWDWXV ELWV 'XULQJ SURJUDPPLQJ DQ\ FRPPDQG H[FHSW WKH 6XVSHQG 3URJUDP FRPPDQG LV LJQRUHG 7KH 6HFXUHG 6LOLFRQ 6HFWRU $XWRVHOHFW DQG &), IXQFWLRQV DUH XQDYDLODEOH ZKHQ D SURJUDP RSHUDWLRQ LV LQ SURJUHVV
December 3, 2005 S29WS-N_m0_I0
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Preliminary
$ KDUGZDUH UHVHW LPPHGLDWHO\ WHUPLQDWHV WKH SURJUDP RSHUDWLRQ 7KH SURJUDP FRPPDQG VH TXHQFH VKRXOG EH UHLQLWLDWHG RQFH WKH GHYLFH KDV UHWXUQHG WR WKH UHDG PRGH WR HQVXUH GDWD LQWHJULW\
Write Unlock Cycles: Address 555h, Data AAh Address 2AAh, Data 55h
Unlock Cycle 1 Unlock Cycle 2
Write Program Command: Address 555h, Data A0h
Setup Command
Program Data to Address: PA, PD
Program Address (PA), Program Data (PD)
Perform Polling Algorithm
(see Write Operation Status flowchart)
Polling Status = Busy? No Yes Polling Status = Done? No
Yes
Error condition (Exceeded Timing Limits)
PASS. Device is in read mode.
FAIL. Issue reset command to return to read array mode.
Figure 12.3.
Single Word Program
38
S29WS-N_m0_I0 December 3, 2005
Preliminary
Software Functions and Sample Code
Table 12.14. Single Word Program
//' )XQFWLRQ OOGB3URJUDP&PG
Cycle
Operation
Byte Address
Word Address
Data
8QORFN &\FOH 8QORFN &\FOH 3URJUDP 6HWXS 3URJUDP
:ULWH :ULWH :ULWH :ULWH
%DVH $$$K %DVH K %DVH $$$K :RUG $GGUHVV
%DVH K %DVH $$K %DVH K :RUG $GGUHVV
$$K K $K 'DWD :RUG
1RWH %DVH
%DVH $GGUHVV
7KH IROORZLQJ LV D & VRXUFH FRGH H[DPSOH RI XVLQJ WKH VLQJOH ZRUG SURJUDP IXQFWLRQ 5HIHU WR WKH 6SDQVLRQ /RZ /HYHO 'ULYHU 8VHUV *XLGH DYDLODEOH RQ ZZZDPGFRP DQG ZZZIXMLWVXFRP IRU JHQHUDO LQIRUPDWLRQ RQ 6SDQVLRQ )ODVK PHPRU\ VRIWZDUH GHYHORSPHQW JXLGHOLQHV
/* Example: Program Command */ *( (UINT16 *)base_addr + 0x555 ) *( (UINT16 *)base_addr + 0x2AA ) *( (UINT16 *)base_addr + 0x555 ) *( (UINT16 *)pa ) /* Poll for program completion */ = = = = 0x00AA; 0x0055; 0x00A0; data; /* /* /* /* write write write write unlock cycle 1 unlock cycle 2 program setup command data to be programmed */ */ */ */
:ULWH %XIIHU 3URJUDPPLQJ
:ULWH %XIIHU 3URJUDPPLQJ DOORZV WKH V\VWHP WR ZULWH D PD[LPXP RI ZRUGV LQ RQH SURJUDP PLQJ RSHUDWLRQ 7KLV UHVXOWV LQ D IDVWHU HIIHFWLYH ZRUG SURJUDPPLQJ WLPH WKDQ WKH VWDQGDUG ZRUG SURJUDPPLQJ DOJRULWKPV 7KH :ULWH %XIIHU 3URJUDPPLQJ FRPPDQG VHTXHQFH LV LQLWLDWHG E\ ILUVW ZULWLQJ WZR XQORFN F\FOHV 7KLV LV IROORZHG E\ D WKLUG ZULWH F\FOH FRQWDLQLQJ WKH :ULWH %XIIHU /RDG FRPPDQG ZULWWHQ DW WKH 6HFWRU $GGUHVV LQ ZKLFK SURJUDPPLQJ RFFXUV $W WKLV SRLQW WKH V\VWHP ZULWHV WKH QXPEHU RI ZRUG ORFDWLRQV PLQXV WKDW DUH ORDGHG LQWR WKH SDJH EXIIHU DW WKH 6HFWRU $GGUHVV LQ ZKLFK SURJUDPPLQJ RFFXUV 7KLV WHOOV WKH GHYLFH KRZ PDQ\ ZULWH EXIIHU DGGUHVVHV DUH ORDGHG ZLWK GDWD DQG WKHUHIRUH ZKHQ WR H[SHFW WKH 3URJUDP %XIIHU WR )ODVK FRQ ILUP FRPPDQG 7KH QXPEHU RI ORFDWLRQV WR SURJUDP FDQQRW H[FHHG WKH VL]H RI WKH ZULWH EXIIHU RU WKH RSHUDWLRQ DERUWV 1XPEHU ORDGHG WKH QXPEHU RI ORFDWLRQV WR SURJUDP PLQXV )RU H[ DPSOH LI WKH V\VWHP SURJUDPV DGGUHVV ORFDWLRQV WKHQ K VKRXOG EH ZULWWHQ WR WKH GHYLFH 7KH V\VWHP WKHQ ZULWHV WKH VWDUWLQJ DGGUHVVGDWD FRPELQDWLRQ 7KLV VWDUWLQJ DGGUHVV LV WKH ILUVW DGGUHVVGDWD SDLU WR EH SURJUDPPHG DQG VHOHFWV WKH ZULWHEXIIHUSDJH DGGUHVV $OO VXEVH TXHQW DGGUHVVGDWD SDLUV PXVW IDOO ZLWKLQ WKH HOHFWHGZULWHEXIIHUSDJH 7KH ZULWHEXIIHUSDJH LV VHOHFWHG E\ XVLQJ WKH DGGUHVVHV $0$; $ 7KH ZULWHEXIIHUSDJH DGGUHVVHV PXVW EH WKH VDPH IRU DOO DGGUHVVGDWD SDLUV ORDGHG LQWR WKH ZULWH EXIIHU 7KLV PHDQV :ULWH %XIIHU 3URJUDPPLQJ FDQQRW EH SHUIRUPHG DFURVV PXOWLSOH ZULWH EXIIHUSDJHV 7KLV DOVR PHDQV WKDW :ULWH %XIIHU 3URJUDPPLQJ FDQQRW EH SHUIRUPHG DFURVV PXO WLSOH VHFWRUV ,I WKH V\VWHP DWWHPSWV WR ORDG SURJUDPPLQJ GDWD RXWVLGH RI WKH VHOHFWHG ZULWH EXIIHUSDJH WKH RSHUDWLRQ $%257V $IWHU ZULWLQJ WKH 6WDUWLQJ $GGUHVV'DWD SDLU WKH V\VWHP WKHQ ZULWHV WKH UHPDLQLQJ DGGUHVVGDWD SDLUV LQWR WKH ZULWH EXIIHU 1RWH WKDW LI D :ULWH %XIIHU DGGUHVV ORFDWLRQ LV ORDGHG PXOWLSOH WLPHV WKH DGGUHVVGDWD SDLU FRXQWHU LV GHFUHPHQWHG IRU HYHU\ GDWD ORDG RSHUDWLRQ $OVR WKH ODVW GDWD ORDGHG DW D ORFDWLRQ EHIRUH WKH 3URJUDP %XIIHU WR )ODVK FRQILUP FRPPDQG LV SURJUDPPHG LQWR WKH GHYLFH ,W LV WKH VRIWZDUH
V UHVSRQVLELOLW\ WR FRPSUHKHQG UDPLILFDWLRQV RI ORDGLQJ D ZULWHEXIIHU ORFDWLRQ PRUH WKDQ RQFH 7KH FRXQWHU GHFUHPHQWV IRU HDFK GDWD ORDG RSHUDWLRQ 127 IRU HDFK XQLTXH ZULWH
December 3, 2005 S29WS-N_m0_I0
39
Preliminary
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40
S29WS-N_m0_I0 December 3, 2005
Preliminary
Software Functions and Sample Code
Table 12.15. Write Buffer Program
//' )XQFWLRQV 8VHG OOGB:ULWH7R%XIIHU&PG OOGB3URJUDP%XIIHU7R)ODVK&PG
Cycle
Description
Operation
Byte Address
Word Address
Data

8QORFN 8QORFN :ULWH %XIIHU /RDG &RPPDQG :ULWH :RUG &RXQW
:ULWH :ULWH :ULWH :ULWH
%DVH $$$K %DVH K
%DVH K %DVH $$K
$$K K K :RUG &RXQW 1K
3URJUDP $GGUHVV 3URJUDP $GGUHVV
1XPEHU RI ZRUGV 1 ORDGHG LQWR WKH ZULWH EXIIHU FDQ EH IURP WR ZRUGV WR /DVW /RDG %XIIHU :RUG 1 :ULWH %XIIHU WR )ODVK :ULWH :ULWH 3URJUDP $GGUHVV :RUG 1 6HFWRU $GGUHVV :RUG 1 K
1RWHV %DVH
%DVH $GGUHVV
/DVW /DVW F\FOH RI ZULWH EXIIHU SURJUDP RSHUDWLRQ GHSHQGLQJ RQ QXPEHU RI ZRUGV ZULWWHQ WKH WRWDO QXPEHU RI F\FOHV PD\ EH IURP WR )RU PD[LPXP HIILFLHQF\ LW LV UHFRPPHQGHG WKDW WKH ZULWH EXIIHU EH ORDGHG ZLWK WKH KLJKHVW QXPEHU RI ZRUGV 1 ZRUGV SRVVLEOH
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/* Example: Write Buffer Programming Command */ /* NOTES: Write buffer programming limited to 16 words. */ /* All addresses to be written to the flash in */ /* one operation must be within the same flash */ /* page. A flash page begins at addresses */ /* evenly divisible by 0x20. */ UINT16 *src = source_of_data; /* address of source data */ UINT16 *dst = destination_of_data; /* flash destination address */ UINT16 wc = words_to_program -1; /* word count (minus 1) */ *( (UINT16 *)base_addr + 0x555 ) = 0x00AA; /* write unlock cycle 1 */ *( (UINT16 *)base_addr + 0x2AA ) = 0x0055; /* write unlock cycle 2 */ *( (UINT16 *)sector_address ) = 0x0025; /* write write buffer load command */ *( (UINT16 *)sector_address ) = wc; /* write word count (minus 1) */ loop: *dst = *src; /* ALL dst MUST BE SAME PAGE */ /* write source data to destination */ dst++; /* increment destination pointer */ src++; /* increment source pointer */ if (wc == 0) goto confirm /* done when word count equals zero */ wc--; /* decrement word count */ goto loop; /* do it again */ confirm: *( (UINT16 *)sector_address ) = 0x0029; /* write confirm command */ /* poll for completion */
/* Example: Write Buffer Abort Reset */ *( (UINT16 *)addr + 0x555 ) = 0x00AA; *( (UINT16 *)addr + 0x2AA ) = 0x0055; *( (UINT16 *)addr + 0x555 ) = 0x00F0;
/* write unlock cycle 1 /* write unlock cycle 2 /* write buffer abort reset
*/ */ */
December 3, 2005 S29WS-N_m0_I0
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Preliminary
Write Unlock Cycles: Address 555h, Data AAh Address 2AAh, Data 55h
Unlock Cycle 1 Unlock Cycle 2
Issue Write Buffer Load Command: Address 555h, Data 25h
Load Word Count to Program Program Data to Address: SA = wc
wc = number of words - 1
Yes wc = 0?
Confirm command: SA = 0x29h
No Write Next Word, Decrement wc: PA data , wc = wc - 1 Wait 4 s (Recommended)
Perform Polling Algorithm
(see Write Operation Status flowchart)
Yes
Write Buffer Abort? No
Polling Status = Done? No No
Yes
FAIL. Issue reset command to return to read array mode.
Error?
Yes
RESET. Issue Write Buffer Abort Reset Command
PASS. Device is in read mode.
Figure 12.4. 6HFWRU (UDVH
Write Buffer Programming Operation
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42
S29WS-N_m0_I0 December 3, 2005
Preliminary
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Software Functions and Sample Code
Table 12.16. Sector Erase
//' )XQFWLRQ OOGB6HFWRU(UDVH&PG
Cycle
Description
Operation
Byte Address
Word Address
Data

8QORFN 8QORFN 6HWXS &RPPDQG 8QORFN 8QORFN 6HFWRU (UDVH &RPPDQG
:ULWH :ULWH :ULWH :ULWH :ULWH :ULWH
%DVH $$$K %DVH K %DVH $$$K %DVH $$$K %DVH K 6HFWRU $GGUHVV
%DVH K %DVH $$K %DVH K %DVH K %DVH $$K 6HFWRU $GGUHVV
$$K K K $$K K K
8QOLPLWHG DGGLWLRQDO VHFWRUV PD\ EH VHOHFWHG IRU HUDVH FRPPDQGV PXVW EH ZULWWHQ ZLWKLQ W6($
7KH IROORZLQJ LV D & VRXUFH FRGH H[DPSOH RI XVLQJ WKH VHFWRU HUDVH IXQFWLRQ 5HIHU WR WKH 6SDQVLRQ /RZ /HYHO 'ULYHU 8VHUV *XLGH DYDLODEOH RQ ZZZDPGFRP DQG ZZZIXMLWVXFRP IRU JHQHUDO LQ IRUPDWLRQ RQ 6SDQVLRQ )ODVK PHPRU\ VRIWZDUH GHYHORSPHQW JXLGHOLQHV
/* Example: Sector Erase Command *( (UINT16 *)base_addr + 0x555 *( (UINT16 *)base_addr + 0x2AA *( (UINT16 *)base_addr + 0x555 *( (UINT16 *)base_addr + 0x555 *( (UINT16 *)base_addr + 0x2AA *( (UINT16 *)sector_address ) */ )= )= )= )= )= = 0x00AA; 0x0055; 0x0080; 0x00AA; 0x0055; 0x0030; /* /* /* /* /* /* write write write write write write unlock cycle 1 */ unlock cycle 2 */ setup command */ additional unlock cycle 1 */ additional unlock cycle 2 */ sector erase command */
December 3, 2005 S29WS-N_m0_I0
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Preliminary
Write Unlock Cycles: Address 555h, Data AAh Address 2AAh, Data 55h
Unlock Cycle 1 Unlock Cycle 2
Write Sector Erase Cycles: Address 555h, Data 80h Address 555h, Data AAh Address 2AAh, Data 55h Sector Address, Data 30h
Command Cycle 1 Command Cycle 2 Command Cycle 3 Specify first sector for erasure
No
Select Additional Sectors? Yes Write Additional Sector Addresses
* Each additional cycle must be written within tSEA timeout * Timeout resets after each additional cycle is written * The host system may monitor DQ3 or wait tSEA to ensure acceptance of erase commands
No
Poll DQ3. DQ3 = 1? Yes
Yes
Last Sector Selected? No
* No limit on number of sectors * Commands other than Erase Suspend or selecting additional sectors for erasure during timeout reset device to reading array data
Wait 4 s (Recommended) Perform Write Operation Status Algorithm VHH )LJXUH
Status may be obtained by reading DQ7, DQ6 and/or DQ2.
Yes
Done?
No DQ5 = 1? Yes No Error condition (Exceeded Timing Limits)
PASS. Device returns to reading array.
FAIL. Write reset command to return to reading array.
1RWHV

6HH 7DEOH IRU HUDVH FRPPDQG VHTXHQFH 6HH WKH VHFWLRQ RQ '4 IRU LQIRUPDWLRQ RQ WKH VHFWRU HUDVH WLPHRXW
Figure 12.5.
Sector Erase Operation
44
S29WS-N_m0_I0 December 3, 2005
Preliminary
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Software Functions and Sample Code
Table 12.17.
//' )XQFWLRQ
Chip Erase
OOGB&KLS(UDVH&PG
Cycle
Description
Operation
Byte Address
Word Address
Data

8QORFN 8QORFN 6HWXS &RPPDQG 8QORFN 8QORFN &KLS (UDVH &RPPDQG
:ULWH :ULWH :ULWH :ULWH :ULWH :ULWH
%DVH $$$K %DVH K %DVH $$$K %DVH $$$K %DVH K %DVH $$$K
%DVH K %DVH $$K %DVH K %DVH K %DVH $$K %DVH K
$$K K K $$K K K
7KH IROORZLQJ LV D & VRXUFH FRGH H[DPSOH RI XVLQJ WKH FKLS HUDVH IXQFWLRQ 5HIHU WR WKH 6SDQVLRQ /RZ /HYHO 'ULYHU 8VHUV *XLGH DYDLODEOH RQ ZZZDPGFRP DQG ZZZIXMLWVXFRP IRU JHQHUDO LQ IRUPDWLRQ RQ 6SDQVLRQ )ODVK PHPRU\ VRIWZDUH GHYHORSPHQW JXLGHOLQHV
/* Example: Chip Erase Command */ /* Note: Cannot be suspended */ *( (UINT16 *)base_addr + 0x555 ) *( (UINT16 *)base_addr + 0x2AA ) *( (UINT16 *)base_addr + 0x555 ) *( (UINT16 *)base_addr + 0x555 ) *( (UINT16 *)base_addr + 0x2AA ) *( (UINT16 *)base_addr + 0x000 )
= = = = = =
0x00AA; 0x0055; 0x0080; 0x00AA; 0x0055; 0x0010;
/* /* /* /* /* /*
write write write write write write
unlock cycle 1 */ unlock cycle 2 */ setup command */ additional unlock cycle 1 */ additional unlock cycle 2 */ chip erase command */
(UDVH 6XVSHQG(UDVH 5HVXPH &RPPDQGV
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December 3, 2005 S29WS-N_m0_I0
45
Preliminary
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Software Functions and Sample Code
Table 12.18. Erase Suspend
//' )XQFWLRQ OOGB(UDVH6XVSHQG&PG
Cycle
Operation
Byte Address
Word Address
Data
:ULWH
%DQN $GGUHVV
%DQN $GGUHVV
%K
7KH IROORZLQJ LV D & VRXUFH FRGH H[DPSOH RI XVLQJ WKH HUDVH VXVSHQG IXQFWLRQ 5HIHU WR WKH 6SDQ VLRQ /RZ /HYHO 'ULYHU 8VHUV *XLGH DYDLODEOH RQ ZZZDPGFRP DQG ZZZIXMLWVXFRP IRU JHQHUDO LQIRUPDWLRQ RQ 6SDQVLRQ )ODVK PHPRU\ VRIWZDUH GHYHORSPHQW JXLGHOLQHV
/* Example: Erase suspend command */ *( (UINT16 *)bank_addr + 0x000 ) = 0x00B0; /* write suspend command */
Table 12.19.
//' )XQFWLRQ
Erase Resume
OOGB(UDVH5HVXPH&PG
Cycle
Operation
Byte Address
Word Address
Data
:ULWH
%DQN $GGUHVV
%DQN $GGUHVV
K
7KH IROORZLQJ LV D & VRXUFH FRGH H[DPSOH RI XVLQJ WKH HUDVH UHVXPH IXQFWLRQ 5HIHU WR WKH 6SDQ VLRQ /RZ /HYHO 'ULYHU 8VHUV *XLGH DYDLODEOH RQ ZZZDPGFRP DQG ZZZIXMLWVXFRP IRU JHQHUDO LQIRUPDWLRQ RQ 6SDQVLRQ )ODVK PHPRU\ VRIWZDUH GHYHORSPHQW JXLGHOLQHV
/* Example: Erase resume command */ *( (UINT16 *)bank_addr + 0x000 ) = 0x0030; /* write resume command /* The flash needs adequate time in the resume state */ */
46
S29WS-N_m0_I0 December 3, 2005
Preliminary
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WFDUHV ZKHQ ZULWLQJ WKH 3URJUDP 6XVSHQG FRPPDQG $IWHU WKH SURJUDPPLQJ RSHUDWLRQ KDV EHHQ VXVSHQGHG WKH V\VWHP FDQ UHDG DUUD\ GDWD IURP DQ\ QRQVXVSHQGHG VHFWRU 7KH 3URJUDP 6XVSHQG FRPPDQG PD\ DOVR EH LVVXHG GXULQJ D SURJUDP PLQJ RSHUDWLRQ ZKLOH DQ HUDVH LV VXVSHQGHG ,Q WKLV FDVH GDWD PD\ EH UHDG IURP DQ\ DGGUHVVHV QRW LQ (UDVH 6XVSHQG RU 3URJUDP 6XVSHQG ,I D UHDG LV QHHGHG IURP WKH 6HFXUHG 6LOLFRQ 6HFWRU DUHD WKHQ XVHU PXVW XVH WKH SURSHU FRPPDQG VHTXHQFHV WR HQWHU DQG H[LW WKLV UHJLRQ 7KH V\VWHP PD\ DOVR ZULWH WKH $XWRVHOHFW FRPPDQG VHTXHQFH ZKHQ WKH GHYLFH LV LQ 3URJUDP 6XVSHQG PRGH 7KH GHYLFH DOORZV UHDGLQJ $XWRVHOHFW FRGHV LQ WKH VXVSHQGHG VHFWRUV VLQFH WKH FRGHV DUH QRW VWRUHG LQ WKH PHPRU\ DUUD\ :KHQ WKH GHYLFH H[LWV WKH $XWRVHOHFW PRGH WKH GHYLFH UHYHUWV WR 3URJUDP 6XVSHQG PRGH DQG LV UHDG\ IRU DQRWKHU YDOLG RSHUDWLRQ 6HH $XWRVHOHFW &RPPDQG 6HTXHQFH IRU PRUH LQIRUPDWLRQ $IWHU WKH 3URJUDP 5HVXPH FRPPDQG LV ZULWWHQ WKH GHYLFH UHYHUWV WR SURJUDPPLQJ 7KH V\VWHP FDQ GHWHUPLQH WKH VWDWXV RI WKH SURJUDP RSHUDWLRQ XVLQJ WKH '4 RU '4 VWDWXV ELWV MXVW DV LQ WKH VWDQGDUG SURJUDP RSHUDWLRQ 6HH :ULWH 2SHUDWLRQ 6WDWXV IRU PRUH LQIRUPDWLRQ 7KH V\VWHP PXVW ZULWH WKH 3URJUDP 5HVXPH FRPPDQG DGGUHVV ELWV DUH GRQ
W FDUH WR H[LW WKH 3URJUDP 6XVSHQG PRGH DQG FRQWLQXH WKH SURJUDPPLQJ RSHUDWLRQ )XUWKHU ZULWHV RI WKH 3URJUDP 5HVXPH FRPPDQG DUH LJQRUHG $QRWKHU 3URJUDP 6XVSHQG FRPPDQG FDQ EH ZULWWHQ DIWHU WKH GH YLFH KDV UHVXPHG SURJUDPPLQJ
Software Functions and Sample Code
Table 12.20.
//' )XQFWLRQ
Program Suspend
OOGB3URJUDP6XVSHQG&PG
Cycle
Operation
Byte Address
Word Address
Data
:ULWH
%DQN $GGUHVV
%DQN $GGUHVV
%K
7KH IROORZLQJ LV D & VRXUFH FRGH H[DPSOH RI XVLQJ WKH SURJUDP VXVSHQG IXQFWLRQ 5HIHU WR WKH 6SDQVLRQ /RZ /HYHO 'ULYHU 8VHUV *XLGH DYDLODEOH RQ ZZZDPGFRP DQG ZZZIXMLWVXFRP IRU JHQHUDO LQIRUPDWLRQ RQ 6SDQVLRQ )ODVK PHPRU\ VRIWZDUH GHYHORSPHQW JXLGHOLQHV
/* Example: Program suspend command */ *( (UINT16 *)base_addr + 0x000 ) = 0x00B0; /* write suspend command */
Table 12.21. Program Resume
//' )XQFWLRQ OOGB3URJUDP5HVXPH&PG
Cycle
Operation
Byte Address
Word Address
Data
:ULWH
%DQN $GGUHVV
%DQN $GGUHVV
K
7KH IROORZLQJ LV D & VRXUFH FRGH H[DPSOH RI XVLQJ WKH SURJUDP UHVXPH IXQFWLRQ 5HIHU WR WKH 6SDQVLRQ /RZ /HYHO 'ULYHU 8VHUV *XLGH DYDLODEOH RQ ZZZDPGFRP DQG ZZZIXMLWVXFRP IRU JHQHUDO LQIRUPDWLRQ RQ 6SDQVLRQ )ODVK PHPRU\ VRIWZDUH GHYHORSPHQW JXLGHOLQHV
/* Example: Program resume command */ *( (UINT16 *)base_addr + 0x000 ) = 0x0030; /* write resume command */
December 3, 2005 S29WS-N_m0_I0
47
Preliminary
$FFHOHUDWHG 3URJUDP&KLS (UDVH
$FFHOHUDWHG VLQJOH ZRUG SURJUDPPLQJ ZULWH EXIIHU SURJUDPPLQJ VHFWRU HUDVH DQG FKLS HUDVH RSHUDWLRQV DUH HQDEOHG WKURXJK WKH $&& IXQFWLRQ 7KLV PHWKRG LV IDVWHU WKDQ WKH VWDQGDUG FKLS SURJUDP DQG HUDVH FRPPDQG VHTXHQFHV 7KH DFFHOHUDWHG FKLS SURJUDP DQG HUDVH IXQFWLRQV PXVW QRW EH XVHG PRUH WKDQ WLPHV SHU VHFWRU ,Q DGGLWLRQ DFFHOHUDWHG FKLS SURJUDP DQG HUDVH VKRXOG EH SHUIRUPHG DW URRP WHPSHUDWXUH & & ,I WKH V\VWHP DVVHUWV 9++ RQ WKLV LQSXW WKH GHYLFH DXWRPDWLFDOO\ HQWHUV WKH DIRUHPHQWLRQHG 8Q ORFN %\SDVV PRGH DQG XVHV WKH KLJKHU YROWDJH RQ WKH LQSXW WR UHGXFH WKH WLPH UHTXLUHG IRU SURJUDP DQG HUDVH RSHUDWLRQV 7KH V\VWHP FDQ WKHQ XVH WKH :ULWH %XIIHU /RDG FRPPDQG VH TXHQFH SURYLGHG E\ WKH 8QORFN %\SDVV PRGH 1RWH WKDW LI D :ULWHWR%XIIHU$ERUW 5HVHW LV UHTXLUHG ZKLOH LQ 8QORFN %\SDVV PRGH WKH IXOO F\FOH 5(6(7 FRPPDQG VHTXHQFH PXVW EH XVHG WR UHVHW WKH GHYLFH 5HPRYLQJ 9++ IURP WKH $&& LQSXW XSRQ FRPSOHWLRQ RI WKH HPEHGGHG SUR JUDP RU HUDVH RSHUDWLRQ UHWXUQV WKH GHYLFH WR QRUPDO RSHUDWLRQ 6HFWRUV PXVW EH XQORFNHG SULRU WR UDLVLQJ $&& WR 9++ 7KH $&& SLQ PXVW QRW EH DW 9++ IRU RSHUDWLRQV RWKHU WKDQ DFFHOHUDWHG SURJUDPPLQJ DQG DF FHOHUDWHG FKLS HUDVH RU GHYLFH GDPDJH PD\ UHVXOW 7KH $&& SLQ PXVW QRW EH OHIW IORDWLQJ RU XQFRQQHFWHG LQFRQVLVWHQW EHKDYLRU RI WKH GHYLFH PD\ UHVXOW
$&& ORFNV DOO VHFWRU LI VHW WR 9,/ $&& VKRXOG EH VHW WR 9,+ IRU DOO RWKHU FRQGLWLRQV
8QORFN %\SDVV
7KH GHYLFH IHDWXUHV DQ 8QORFN %\SDVV PRGH WR IDFLOLWDWH IDVWHU ZRUG SURJUDPPLQJ 2QFH WKH GH YLFH HQWHUV WKH 8QORFN %\SDVV PRGH RQO\ WZR ZULWH F\FOHV DUH UHTXLUHG WR SURJUDP GDWD LQVWHDG RI WKH QRUPDO IRXU F\FOHV 7KLV PRGH GLVSHQVHV ZLWK WKH LQLWLDO WZR XQORFN F\FOHV UHTXLUHG LQ WKH VWDQGDUG SURJUDP FRP PDQG VHTXHQFH UHVXOWLQJ LQ IDVWHU WRWDO SURJUDPPLQJ WLPH 7KH &RPPDQG 'HILQLWLRQ 6XPPDU\ VHFWLRQ VKRZV WKH UHTXLUHPHQWV IRU WKH XQORFN E\SDVV FRPPDQG VHTXHQFHV 'XULQJ WKH XQORFN E\SDVV PRGH RQO\ WKH 5HDG 8QORFN %\SDVV 3URJUDP DQG 8QORFN %\SDVV 5HVHW FRPPDQGV DUH YDOLG 7R H[LW WKH XQORFN E\SDVV PRGH WKH V\VWHP PXVW LVVXH WKH WZRF\FOH XQ ORFN E\SDVV UHVHW FRPPDQG VHTXHQFH 7KH ILUVW F\FOH PXVW FRQWDLQ WKH EDQN DGGUHVV DQG WKH GDWD K 7KH VHFRQG F\FOH QHHG RQO\ FRQWDLQ WKH GDWD K 7KH EDQN WKHQ UHWXUQV WR WKH UHDG PRGH
Software Functions and Sample Code
7KH IROORZLQJ DUH & VRXUFH FRGH H[DPSOHV RI XVLQJ WKH XQORFN E\SDVV HQWU\ SURJUDP DQG H[LW IXQFWLRQV 5HIHU WR WKH 6SDQVLRQ /RZ /HYHO 'ULYHU 8VHUV *XLGH DYDLODEOH VRRQ RQ ZZZDPGFRP DQG ZZZIXMLWVXFRP IRU JHQHUDO LQIRUPDWLRQ RQ 6SDQVLRQ )ODVK PHPRU\ VRIWZDUH GHYHORSPHQW JXLGHOLQHV
Table 12.22.
//' )XQFWLRQ
Unlock Bypass Entry
OOGB8QORFN%\SDVV(QWU\&PG
Cycle
Description
Operation
Byte Address
Word Address
Data

8QORFN 8QORFN (QWU\ &RPPDQG
:ULWH :ULWH :ULWH
%DVH $$$K %DVH K %DVH $$$K
%DVH K %DVH $$K %DVH K
$$K K K
48
S29WS-N_m0_I0 December 3, 2005
Preliminary
/* Example: Unlock Bypass Entry Command */ *( (UINT16 *)bank_addr + 0x555 ) = 0x00AA; /* write unlock *( (UINT16 *)bank_addr + 0x2AA ) = 0x0055; /* write unlock *( (UINT16 *)bank_addr + 0x555 ) = 0x0020; /* write unlock /* At this point, programming only takes two write cycles. /* Once you enter Unlock Bypass Mode, do a series of like /* operations (programming or sector erase) and then exit /* Unlock Bypass Mode before beginning a different type of /* operations.
cycle 1 cycle 2 bypass command */ */ */ */ */
*/ */ */
Table 12.23. Unlock Bypass Program
//' )XQFWLRQ OOGB8QORFN%\SDVV3URJUDP&PG
Cycle
Description
Operation
Byte Address
Word Address
Data

3URJUDP 6HWXS &RPPDQG 3URJUDP &RPPDQG
:ULWH :ULWH
%DVH [[[K 3URJUDP $GGUHVV
%DVH [[[K 3URJUDP $GGUHVV
$K 3URJUDP 'DWD
/* Example: Unlock Bypass Program Command */ /* Do while in Unlock Bypass Entry Mode! */ *( (UINT16 *)bank_addr + 0x555 ) = 0x00A0; *( (UINT16 *)pa ) = data; /* Poll until done or error. */ /* If done and more to program, */ /* do above two cycles again. */
/* write program setup command /* write data to be programmed
*/ */
Table 12.24. Unlock Bypass Reset
//' )XQFWLRQ OOGB8QORFN%\SDVV5HVHW&PG
Cycle
Description
Operation
Byte Address
Word Address
Data

5HVHW &\FOH 5HVHW &\FOH
:ULWH :ULWH
%DVH [[[K %DVH [[[K
%DVH [[[K %DVH [[[K
K K
/* Example: Unlock Bypass Exit Command */ *( (UINT16 *)base_addr + 0x000 ) = 0x0090; *( (UINT16 *)base_addr + 0x000 ) = 0x0000;
:ULWH 2SHUDWLRQ 6WDWXV
7KH GHYLFH SURYLGHV VHYHUDO ELWV WR GHWHUPLQH WKH VWDWXV RI D SURJUDP RU HUDVH RSHUDWLRQ 7KH IROORZLQJ VXEVHFWLRQV GHVFULEH WKH IXQFWLRQ RI '4 '4 '4 '4 '4 DQG '4
'4 'DWD 3ROOLQJ 7KH 'DWD 3ROOLQJ ELW '4 LQGLFDWHV WR WKH KRVW V\VWHP ZKHWKHU DQ (P EHGGHG 3URJUDP RU (UDVH DOJRULWKP LV LQ SURJUHVV RU FRPSOHWHG RU ZKHWKHU D EDQN LV LQ (UDVH 6XVSHQG 'DWD 3ROOLQJ LV YDOLG DIWHU WKH ULVLQJ HGJH RI WKH ILQDO :( SXOVH LQ WKH FRPPDQG VH TXHQFH 1RWH WKDW WKH 'DWD 3ROOLQJ LV YDOLG RQO\ IRU WKH ODVW ZRUG EHLQJ SURJUDPPHG LQ WKH ZULWHEXIIHUSDJH GXULQJ :ULWH %XIIHU 3URJUDPPLQJ 5HDGLQJ 'DWD 3ROOLQJ VWDWXV RQ DQ\ ZRUG RWKHU WKDQ WKH ODVW ZRUG WR EH SURJUDPPHG LQ WKH ZULWHEXIIHUSDJH UHWXUQV IDOVH VWDWXV LQIRUPDWLRQ
'XULQJ WKH (PEHGGHG 3URJUDP DOJRULWKP WKH GHYLFH RXWSXWV RQ '4 WKH FRPSOHPHQW RI WKH GDWXP SURJUDPPHG WR '4 7KLV '4 VWDWXV DOVR DSSOLHV WR SURJUDPPLQJ GXULQJ (UDVH 6XVSHQG :KHQ WKH (PEHGGHG 3URJUDP DOJRULWKP LV FRPSOHWH WKH GHYLFH RXWSXWV WKH GDWXP SURJUDPPHG WR '4 7KH V\VWHP PXVW SURYLGH WKH SURJUDP DGGUHVV WR UHDG YDOLG VWDWXV LQIRUPDWLRQ RQ '4 ,I D SURJUDP DGGUHVV IDOOV ZLWKLQ D SURWHFWHG VHFWRU 'DWD SROOLQJ RQ '4 LV DFWLYH IRU DSSUR[L PDWHO\ W363 WKHQ WKDW EDQN UHWXUQV WR WKH UHDG PRGH 'XULQJ WKH (PEHGGHG (UDVH $OJRULWKP 'DWD SROOLQJ SURGXFHV D RQ '4 :KHQ WKH (PEHG GHG (UDVH DOJRULWKP LV FRPSOHWH RU LI WKH EDQN HQWHUV WKH (UDVH 6XVSHQG PRGH 'DWD 3ROOLQJ SURGXFHV D RQ '4 7KH V\VWHP PXVW SURYLGH DQ DGGUHVV ZLWKLQ DQ\ RI WKH VHFWRUV VHOHFWHG IRU HUDVXUH WR UHDG YDOLG VWDWXV LQIRUPDWLRQ RQ '4
December 3, 2005 S29WS-N_m0_I0
49
Preliminary
$IWHU DQ HUDVH FRPPDQG VHTXHQFH LV ZULWWHQ LI DOO VHFWRUV VHOHFWHG IRU HUDVLQJ DUH SURWHFWHG 'DWD 3ROOLQJ RQ '4 LV DFWLYH IRU DSSUR[LPDWHO\ W$63 WKHQ WKH EDQN UHWXUQV WR WKH UHDG PRGH ,I QRW DOO VHOHFWHG VHFWRUV DUH SURWHFWHG WKH (PEHGGHG (UDVH DOJRULWKP HUDVHV WKH XQSURWHFWHG VHFWRUV DQG LJQRUHV WKH VHOHFWHG VHFWRUV WKDW DUH SURWHFWHG +RZHYHU LI WKH V\VWHP UHDGV '4 DW DQ DGGUHVV ZLWKLQ D SURWHFWHG VHFWRU WKH VWDWXV PD\ QRW EH YDOLG -XVW SULRU WR WKH FRPSOHWLRQ RI DQ (PEHGGHG 3URJUDP RU (UDVH RSHUDWLRQ '4 PD\ FKDQJH DV\Q FKURQRXVO\ ZLWK '4'4 ZKLOH 2XWSXW (QDEOH 2( LV DVVHUWHG ORZ 7KDW LV WKH GHYLFH PD\ FKDQJH IURP SURYLGLQJ VWDWXV LQIRUPDWLRQ WR YDOLG GDWD RQ '4 'HSHQGLQJ RQ ZKHQ WKH V\VWHP VDPSOHV WKH '4 RXWSXW LW PD\ UHDG WKH VWDWXV RU YDOLG GDWD (YHQ LI WKH GHYLFH KDV FRPSOHWHG WKH SURJUDP RU HUDVH RSHUDWLRQ DQG '4 KDV YDOLG GDWD WKH GDWD RXWSXWV RQ '4'4 PD\ EH VWLOO LQYDOLG 9DOLG GDWD RQ '4' DSSHDUV RQ VXFFHVVLYH UHDG F\FOHV 6HH WKH IROORZLQJ IRU PRUH LQIRUPDWLRQ 7DEOH :ULWH 2SHUDWLRQ 6WDWXV VKRZV WKH RXWSXWV IRU 'DWD 3ROOLQJ RQ '4 )LJXUH :ULWH 2SHUDWLRQ 6WDWXV )ORZFKDUW VKRZV WKH 'DWD 3ROO LQJ DOJRULWKP DQG )LJXUH 'DWD 3ROOLQJ 7LPLQJV 'XULQJ (PEHGGHG $OJRULWKP VKRZV WKH 'DWD 3ROOLQJ WLPLQJ GLDJUDP
50
S29WS-N_m0_I0 December 3, 2005
Preliminary
START
Read 1
(Note 6) DQ7=valid data? NO
YES
Erase Operation Complete
Read 1 DQ5=1? NO
YES
Read 2
YES Read3= valid data? NO
YES
Write Buffer Programming?
Read 2
Read 3 Program Operation Failed YES
Programming Operation?
NO Read 3 Device BUSY, Re-Poll
NO (Note 3) (Note 1) DQ6 toggling? YES TIMEOUT (Note 1) DQ6 toggling? NO (Note 2) Device BUSY, Re-Poll Read 2 DQ2 toggling? NO YES DEVICE ERROR (Note 5)
(Note 4) Read3 DQ1=1?
YES
NO
NO
YES
Device BUSY, Re-Poll Erase Operation Complete Device in Erase/Suspend Mode
Read 3
Read3 DQ1=1 AND DQ7 Valid Data?
YES
Write Buffer Operation Failed
NO Notes: 1) DQ6 is toggling if Read2 DQ6 does not equal Read3 DQ6. 2) DQ2 is toggling if Read2 DQ2 does not equal Read3 DQ2. 3) May be due to an attempt to program a 0 to 1. Use the RESET command to exit operation. 4) Write buffer error if DQ1 of last read =1. 5) Invalid state, use RESET command to exit operation. 6) Valid data is the data that is intended to be programmed or all 1's for an erase operation. 7) Data polling algorithm valid for all operations except advanced sector protection.
Device BUSY, Re-Poll
Figure 12.6.
Write Operation Status Flowchart
December 3, 2005 S29WS-N_m0_I0
51
Preliminary
'4 7RJJOH %LW , 7RJJOH %LW , RQ '4 LQGLFDWHV ZKHWKHU DQ (PEHGGHG 3URJUDP RU (UDVH DOJR ULWKP LV LQ SURJUHVV RU FRPSOHWH RU ZKHWKHU WKH GHYLFH KDV HQWHUHG WKH (UDVH 6XVSHQG PRGH 7RJJOH %LW , PD\ EH UHDG DW DQ\ DGGUHVV LQ WKH VDPH EDQN DQG LV YDOLG DIWHU WKH ULVLQJ HGJH RI WKH ILQDO :( SXOVH LQ WKH FRPPDQG VHTXHQFH SULRU WR WKH SURJUDP RU HUDVH RSHUDWLRQ DQG GXULQJ WKH VHFWRU HUDVH WLPHRXW
'XULQJ DQ (PEHGGHG 3URJUDP RU (UDVH DOJRULWKP RSHUDWLRQ VXFFHVVLYH UHDG F\FOHV WR DQ\ DG GUHVV FDXVH '4 WR WRJJOH :KHQ WKH RSHUDWLRQ LV FRPSOHWH '4 VWRSV WRJJOLQJ $IWHU DQ HUDVH FRPPDQG VHTXHQFH LV ZULWWHQ LI DOO VHFWRUV VHOHFWHG IRU HUDVLQJ DUH SURWHFWHG '4 WRJJOHV IRU DSSUR[LPDWHO\ W$63 >DOO VHFWRUV SURWHFWHG WRJJOH WLPH@ WKHQ UHWXUQV WR UHDGLQJ DUUD\ GDWD ,I QRW DOO VHOHFWHG VHFWRUV DUH SURWHFWHG WKH (PEHGGHG (UDVH DOJRULWKP HUDVHV WKH XQSURWHFWHG VHFWRUV DQG LJQRUHV WKH VHOHFWHG VHFWRUV WKDW DUH SURWHFWHG 7KH V\VWHP FDQ XVH '4 DQG '4 WRJHWKHU WR GHWHUPLQH ZKHWKHU D VHFWRU LV DFWLYHO\ HUDVLQJ RU LV HUDVHVXVSHQGHG :KHQ WKH GHYLFH LV DFWLYHO\ HUDVLQJ WKDW LV WKH (PEHGGHG (UDVH DOJRULWKP LV LQ SURJUHVV '4 WRJJOHV :KHQ WKH GHYLFH HQWHUV WKH (UDVH 6XVSHQG PRGH '4 VWRSV WRJ JOLQJ +RZHYHU WKH V\VWHP PXVW DOVR XVH '4 WR GHWHUPLQH ZKLFK VHFWRUV DUH HUDVLQJ RU HUDVH VXVSHQGHG $OWHUQDWLYHO\ WKH V\VWHP FDQ XVH '4 VHH WKH VXEVHFWLRQ RQ '4 'DWD 3ROOLQJ ,I D SURJUDP DGGUHVV IDOOV ZLWKLQ D SURWHFWHG VHFWRU '4 WRJJOHV IRU DSSUR[LPDWHO\ W3$3 DIWHU WKH SURJUDP FRPPDQG VHTXHQFH LV ZULWWHQ WKHQ UHWXUQV WR UHDGLQJ DUUD\ GDWD '4 DOVR WRJJOHV GXULQJ WKH HUDVHVXVSHQGSURJUDP PRGH DQG VWRSV WRJJOLQJ RQFH WKH (PEHG GHG 3URJUDP $OJRULWKP LV FRPSOHWH 6HH WKH IROORZLQJ IRU DGGLWLRQDO LQIRUPDWLRQ )LJXUH :ULWH 2SHUDWLRQ 6WDWXV )ORZFKDUW )LJ XUH 7RJJOH %LW 7LPLQJV 'XULQJ (PEHGGHG $OJRULWKP DQG 7DEOHV DQG 7RJJOH %LW , RQ '4 UHTXLUHV HLWKHU 2( FKDQJH LQ VWDWH RU &( WR EH GHDVVHUWHG DQG UHDVVHUWHG WR VKRZ WKH
'4 7RJJOH %LW ,, 7KH 7RJJOH %LW ,, RQ '4 ZKHQ XVHG ZLWK '4 LQGLFDWHV ZKHWKHU D SDU WLFXODU VHFWRU LV DFWLYHO\ HUDVLQJ WKDW LV WKH (PEHGGHG (UDVH DOJRULWKP LV LQ SURJUHVV RU ZKHWKHU WKDW VHFWRU LV HUDVHVXVSHQGHG 7RJJOH %LW ,, LV YDOLG DIWHU WKH ULVLQJ HGJH RI WKH ILQDO :( SXOVH LQ WKH FRPPDQG VHTXHQFH '4 WRJJOHV ZKHQ WKH V\VWHP UHDGV DW DGGUHVVHV ZLWKLQ WKRVH VHFWRUV WKDW KDYH EHHQ VHOHFWHG IRU HUDVXUH %XW '4 FDQQRW GLVWLQJXLVK ZKHWKHU WKH VHFWRU LV DFWLYHO\ HUDVLQJ RU LV HUDVHVXVSHQGHG '4 E\ FRPSDULVRQ LQGLFDWHV ZKHWKHU WKH GHYLFH LV DFWLYHO\ HUDVLQJ RU LV LQ (UDVH 6XVSHQG EXW FDQQRW GLVWLQJXLVK ZKLFK VHFWRUV DUH VHOHFWHG IRU HUDVXUH 7KXV ERWK VWDWXV ELWV DUH UHTXLUHG IRU VHFWRU DQG PRGH LQIRUPDWLRQ 5HIHU WR 7DEOH WR FRPSDUH RXWSXWV IRU '4 DQG '4 6HH WKH IROORZLQJ IRU DGGLWLRQDO LQIRUPDWLRQ )LJXUH WKH '4 7RJJOH %LW , VHFWLRQ DQG )LJXUHV
52
S29WS-N_m0_I0 December 3, 2005
Preliminary
Table 12.25.
If device is
DQ6 and DQ2 Indications
then DQ6 and DQ2
and the system reads
SURJUDPPLQJ
DW DQ\ DGGUHVV DW DQ DGGUHVV ZLWKLQ D VHFWRU VHOHFWHG IRU HUDVXUH DW DQ DGGUHVV ZLWKLQ VHFWRUV QRW VHOHFWHG IRU HUDVXUH DW DQ DGGUHVV ZLWKLQ D VHFWRU VHOHFWHG IRU HUDVXUH
WRJJOHV WRJJOHV WRJJOHV GRHV QRW WRJJOH
GRHV QRW WRJJOH DOVR WRJJOHV GRHV QRW WRJJOH WRJJOHV UHWXUQV DUUD\ GDWD 7KH V\VWHP FDQ UHDG IURP DQ\ VHFWRU QRW VHOHFWHG IRU HUDVXUH LV QRW DSSOLFDEOH
DFWLYHO\ HUDVLQJ
HUDVH VXVSHQGHG
DW DQ DGGUHVV ZLWKLQ VHFWRUV QRW VHOHFWHG IRU HUDVXUH DW DQ\ DGGUHVV
UHWXUQV DUUD\ GDWD
SURJUDPPLQJ LQ HUDVH VXVSHQG
WRJJOHV
5HDGLQJ 7RJJOH %LWV '4'4 :KHQHYHU WKH V\VWHP LQLWLDOO\ EHJLQV UHDGLQJ WRJJOH ELW VWDWXV LW PXVW UHDG '4'4 DW OHDVW WZLFH LQ D URZ WR GHWHUPLQH ZKHWKHU D WRJJOH ELW LV WRJJOLQJ 7\S LFDOO\ WKH V\VWHP ZRXOG QRWH DQG VWRUH WKH YDOXH RI WKH WRJJOH ELW DIWHU WKH ILUVW UHDG $IWHU WKH VHFRQG UHDG WKH V\VWHP ZRXOG FRPSDUH WKH QHZ YDOXH RI WKH WRJJOH ELW ZLWK WKH ILUVW ,I WKH WRJ JOH ELW LV QRW WRJJOLQJ WKH GHYLFH KDV FRPSOHWHG WKH SURJUDP RU HUDVHV RSHUDWLRQ 7KH V\VWHP FDQ UHDG DUUD\ GDWD RQ '4'4 RQ WKH IROORZLQJ UHDG F\FOH +RZHYHU LI DIWHU WKH LQLWLDO WZR UHDG F\FOHV WKH V\VWHP GHWHUPLQHV WKDW WKH WRJJOH ELW LV VWLOO WRJJOLQJ WKH V\VWHP DOVR VKRXOG QRWH ZKHWKHU WKH YDOXH RI '4 LV KLJK VHH WKH VHFWLRQ RQ '4 ,I LW LV WKH V\VWHP VKRXOG WKHQ GHWHUPLQH DJDLQ ZKHWKHU WKH WRJJOH ELW LV WRJJOLQJ VLQFH WKH WRJJOH ELW PD\ KDYH VWRSSHG WRJ JOLQJ MXVW DV '4 ZHQW KLJK ,I WKH WRJJOH ELW LV QR ORQJHU WRJJOLQJ WKH GHYLFH KDV VXFFHVVIXOO\ FRPSOHWHG WKH SURJUDP RU HUDVHV RSHUDWLRQ ,I LW LV VWLOO WRJJOLQJ WKH GHYLFH GLG QRW FRPSOHWH WKH RSHUDWLRQ VXFFHVVIXOO\ DQG WKH V\VWHP PXVW ZULWH WKH UHVHW FRPPDQG WR UHWXUQ WR UHDGLQJ DUUD\ GDWD 7KH UHPDLQLQJ VFHQDULR LV WKDW WKH V\VWHP LQLWLDOO\ GHWHUPLQHV WKDW WKH WRJJOH ELW LV WRJJOLQJ DQG '4 KDV QRW JRQH KLJK 7KH V\VWHP PD\ FRQWLQXH WR PRQLWRU WKH WRJJOH ELW DQG '4 WKURXJK VXFFHVVLYH UHDG F\FOHV GHWHUPLQLQJ WKH VWDWXV DV GHVFULEHG LQ WKH SUHYLRXV SDUDJUDSK $OWHUQD WLYHO\ LW PD\ FKRRVH WR SHUIRUP RWKHU V\VWHP WDVNV ,Q WKLV FDVH WKH V\VWHP PXVW VWDUW DW WKH EHJLQQLQJ RI WKH DOJRULWKP ZKHQ LW UHWXUQV WR GHWHUPLQH WKH VWDWXV RI WKH RSHUDWLRQ 5HIHU WR )LJ XUH IRU PRUH GHWDLOV
1RWH :KHQ YHULI\LQJ WKH VWDWXV RI D ZULWH RSHUDWLRQ HPEHGGHG SURJUDPHUDVH RI D PHPRU\ EDQN '4 DQG '4 WRJJOH EHWZHHQ KLJK DQG ORZ VWDWHV LQ D VHULHV RI FRQVHFXWLYH DQG FRQ WLJXRXV VWDWXV UHDG F\FOHV ,Q RUGHU IRU WKLV WRJJOLQJ EHKDYLRU WR EH SURSHUO\ REVHUYHG WKH FRQVHFXWLYH VWDWXV ELW UHDGV PXVW QRW EH LQWHUOHDYHG ZLWK UHDG DFFHVVHV WR RWKHU PHPRU\ EDQNV ,I LW LV QRW SRVVLEOH WR WHPSRUDULO\ SUHYHQW UHDGV WR RWKHU PHPRU\ EDQNV WKHQ LW LV UHFRPPHQGHG WR XVH WKH '4 VWDWXV ELW DV WKH DOWHUQDWLYH PHWKRG RI GHWHUPLQLQJ WKH DFWLYH RU LQDFWLYH VWDWXV RI WKH ZULWH RSHUDWLRQ 'DWD SROOLQJ SURYLGHV HUURQHRXV UHVXOWV GXULQJ HUDVH VXVSHQG RSHUDWLRQ XVLQJ '4 RU '4 IRU DQ\ DGGUHVV FKDQJHV DIWHU &( DVVHUDWLRQ RU ZLWKRXW $9' SXOVLQJ ORZ 7+H XVHU LV UH TXLUHG WR SXOVH $9' IROORZLQJ DQ DGGUHVV FKDQJH RU DVVHUW &( DIWHU DGGUHVV LV VWDEOH GXU LQJ VWDWXV SROOLQJ 6HH )LJXUH WKURXJK
December 3, 2005 S29WS-N_m0_I0
53
Preliminary
'4 ([FHHGHG 7LPLQJ /LPLWV '4 LQGLFDWHV ZKHWKHU WKH SURJUDP RU HUDVH WLPH KDV H[FHHGHG D VSHFLILHG LQWHUQDO SXOVH FRXQW OLPLW 8QGHU WKHVH FRQGLWLRQV '4 SURGXFHV D LQGLFDWLQJ WKDW WKH SURJUDP RU HUDVH F\FOH ZDV QRW VXFFHVVIXOO\ FRPSOHWHG 7KH GHYLFH PD\ RXWSXW D RQ '4 LI WKH V\VWHP WULHV WR SURJUDP D WR D ORFDWLRQ WKDW ZDV SUHYLRXVO\ SURJUDPPHG WR 2QO\ DQ HUDVH RSHUDWLRQ FDQ FKDQJH D EDFN WR D 8QGHU WKLV FRQGLWLRQ WKH GHYLFH KDOWV WKH RSHUDWLRQ DQG ZKHQ WKH WLPLQJ OLPLW KDV EHHQ H[FHHGHG '4 SURGXFHV D 8QGHU ERWK WKHVH FRQGLWLRQV WKH V\VWHP PXVW ZULWH WKH UHVHW FRPPDQG WR UHWXUQ WR WKH UHDG PRGH RU WR WKH HUDVHVXVSHQGUHDG PRGH LI D EDQN ZDV SUHYLRXVO\ LQ WKH HUDVHVXVSHQGSURJUDP PRGH '4 6HFWRU (UDVH 7LPHRXW 6WDWH ,QGLFDWRU $IWHU ZULWLQJ D VHFWRU HUDVH FRPPDQG VHTXHQFH
WKH V\VWHP PD\ UHDG '4 WR GHWHUPLQH ZKHWKHU RU QRW HUDVXUH KDV EHJXQ 7KH VHFWRU HUDVH WLPHU GRHV QRW DSSO\ WR WKH FKLS HUDVH FRPPDQG ,I DGGLWLRQDO VHFWRUV DUH VHOHFWHG IRU HUDVXUH WKH HQWLUH WLPHRXW DOVR DSSOLHV DIWHU HDFK DGGLWLRQDO VHFWRU HUDVH FRPPDQG :KHQ WKH WLPHRXW SHULRG LV FRPSOHWH '4 VZLWFKHV IURP D WR D ,I WKH WLPH EHWZHHQ DGGLWLRQDO VHFWRU HUDVH FRPPDQGV IURP WKH V\VWHP FDQ EH DVVXPHG WR EH OHVV WKDQ W6($ WKH V\VWHP QHHG QRW PRQLWRU '4 6HH 6HFWRU (UDVH &RPPDQG 6HTXHQFH IRU PRUH GHWDLOV $IWHU WKH VHFWRU HUDVH FRPPDQG LV ZULWWHQ WKH V\VWHP VKRXOG UHDG WKH VWDWXV RI '4 'DWD 3ROOLQJ RU '4 7RJJOH %LW , WR HQVXUH WKDW WKH GHYLFH KDV DFFHSWHG WKH FRPPDQG VHTXHQFH DQG WKHQ UHDG '4 ,I '4 LV WKH (PEHGGHG (UDVH DOJRULWKP KDV EHJXQ DOO IXUWKHU FRP PDQGV H[FHSW (UDVH 6XVSHQG DUH LJQRUHG XQWLO WKH HUDVH RSHUDWLRQ LV FRPSOHWH ,I '4 LV WKH GHYLFH DFFHSWV DGGLWLRQDO VHFWRU HUDVH FRPPDQGV 7R HQVXUH WKH FRPPDQG KDV EHHQ DF FHSWHG WKH V\VWHP VRIWZDUH VKRXOG FKHFN WKH VWDWXV RI '4 SULRU WR DQG IROORZLQJ HDFK VXE VHTXHQW VHFWRU HUDVH FRPPDQG ,I '4 LV KLJK RQ WKH VHFRQG VWDWXV FKHFN WKH ODVW FRPPDQG PLJKW QRW KDYH EHHQ DFFHSWHG 7DEOH VKRZV WKH VWDWXV RI '4 UHODWLYH WR WKH RWKHU VWDWXV ELWV
'4 :ULWH WR %XIIHU $ERUW '4 LQGLFDWHV ZKHWKHU D :ULWH WR %XIIHU RSHUDWLRQ ZDV DERUWHG
8QGHU WKHVH FRQGLWLRQV '4 SURGXFHV D 7KH V\VWHP PXVW LVVXH WKH :ULWH WR %XIIHU $ERUW 5HVHW FRPPDQG VHTXHQFH WR UHWXUQ WKH GHYLFH WR UHDGLQJ DUUD\ GDWD 6HH :ULWH %XIIHU 3URJUDP PLQJ 2SHUDWLRQ IRU PRUH GHWDLOV
54
S29WS-N_m0_I0 December 3, 2005
Preliminary
Table 12.26. Write Operation Status
Status DQ7 (Note 2) DQ6 DQ5 (Note 1) DQ3 DQ2 (Note 2) DQ1 (Note 4)
6WDQGDUG 0RGH 3URJUDP 6XVSHQG 0RGH 1RWH
(PEHGGHG 3URJUDP $OJRULWKP (PEHGGHG (UDVH $OJRULWKP 5HDGLQJ ZLWKLQ 3URJUDP 6XVSHQGHG 6HFWRU 5HDGLQJ ZLWKLQ 1RQ3URJUDP 6XVSHQGHG 6HFWRU (UDVH 6XVSHQGHG 6HFWRU 1RQ(UDVH 6XVSHQGHG 6HFWRU
'4 ,19$/,' 1RW $OORZHG 'DWD 'DWD '4 '4 '4 '4
7RJJOH 7RJJOH ,19$/,' 1RW $OORZHG 'DWD 1R WRJJOH 'DWD 7RJJOH 7RJJOH 7RJJOH 7RJJOH
,19$/,' 1RW $OORZHG 'DWD 'DWD
1$ ,19$/,' 1RW $OORZHG 'DWD 1$ 'DWD 1$ 1$ 1$ 1$
1R WRJJOH 7RJJOH ,19$/,' 1RW $OORZHG 'DWD 7RJJOH 'DWD 1$ 1$ 1$ 1$
1$ ,19$/,' 1RW $OORZHG 'DWD 1$ 'DWD 1$
(UDVH 6XVSHQG 0RGH 1RWH
(UDVH6XVSHQG 5HDG
(UDVH6XVSHQG3URJUDP :ULWH WR %XIIHU 1RWH %86< 6WDWH ([FHHGHG 7LPLQJ /LPLWV $%257 6WDWH
1RWHV

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December 3, 2005 S29WS-N_m0_I0
55
Preliminary
12.7
Simultaneous Read/Write
7KH VLPXOWDQHRXV UHDGZULWH IHDWXUH DOORZV WKH KRVW V\VWHP WR UHDG GDWD IURP RQH EDQN RI PHP RU\ ZKLOH SURJUDPPLQJ RU HUDVLQJ DQRWKHU EDQN RI PHPRU\ $Q HUDVH RSHUDWLRQ PD\ DOVR EH VXVSHQGHG WR UHDG IURP RU SURJUDP DQRWKHU ORFDWLRQ ZLWKLQ WKH VDPH EDQN H[FHSW WKH VHFWRU EHLQJ HUDVHG )LJXUH %DFNWR%DFN 5HDG:ULWH &\FOH 7LPLQJV VKRZV KRZ UHDG DQG ZULWH F\FOHV PD\ EH LQLWLDWHG IRU VLPXOWDQHRXV RSHUDWLRQ ZLWK ]HUR ODWHQF\ 5HIHU WR WKH '& &KDUDFWHU LVWLFV &026 &RPSDWLEOH WDEOH IRU UHDGZKLOHSURJUDP DQG UHDGZKLOHHUDVH FXUUHQW VSHFLILFDWLRQ
12.8
Writing Commands/Command Sequences
:KHQ WKH GHYLFH LV FRQILJXUHG IRU $V\QFKURQRXV UHDG RQO\ $V\QFKURQRXV ZULWH RSHUDWLRQV DUH DOORZHG DQG &/. LV LJQRUHG :KHQ LQ WKH 6\QFKURQRXV UHDG PRGH FRQILJXUDWLRQ WKH GHYLFH LV DEOH WR SHUIRUP ERWK $V\QFKURQRXV DQG 6\QFKURQRXV ZULWH RSHUDWLRQV &/. DQG $9' LQGXFHG DGGUHVV ODWFKHV DUH VXSSRUWHG LQ WKH 6\QFKURQRXV SURJUDPPLQJ PRGH 'XULQJ D V\QFKURQRXV ZULWH RSHUDWLRQ WR ZULWH D FRPPDQG RU FRPPDQG VHTXHQFH ZKLFK LQFOXGHV SURJUDPPLQJ GDWD WR WKH GHYLFH DQG HUDVLQJ VHFWRUV RI PHPRU\ WKH V\VWHP PXVW GULYH $9' DQG &( WR 9,/ DQG 2( WR 9,+ ZKHQ SURYLGLQJ DQ DGGUHVV WR WKH GHYLFH DQG GULYH :( DQG &( WR 9,/ DQG 2( WR 9,+ ZKHQ ZULWLQJ FRPPDQGV RU GDWD 'XULQJ DQ DV\QFKURQRXV ZULWH RSHUDWLRQ WKH V\VWHP PXVW GULYH &( DQG :( WR 9,/ DQG 2( WR 9,+ ZKHQ SURYLGLQJ DQ DGGUHVV FRPPDQG DQG GDWD $GGUHVVHV DUH ODWFKHG RQ WKH ODVW IDOOLQJ HGJH RI :( RU &( ZKLOH GDWD LV ODWFKHG RQ WKH VW ULVLQJ HGJH RI :( RU &( $Q HUDVH RSHUDWLRQ FDQ HUDVH RQH VHFWRU PXOWLSOH VHFWRUV RU WKH HQWLUH GHYLFH 7DEOHV LQGLFDWH WKH DGGUHVV VSDFH WKDW HDFK VHFWRU RFFXSLHV 7KH GHYLFH DGGUHVV VSDFH LV GLYLGHG LQWR VL[WHHQ EDQNV %DQNV WKURXJK FRQWDLQ RQO\ .ZRUG VHFWRUV ZKLOH %DQNV DQG FRQWDLQ ERWK .ZRUG ERRW VHFWRUV LQ DGGLWLRQ WR .ZRUG VHFWRUV $ EDQN DGGUHVV LV WKH VHW RI DGGUHVV ELWV UHTXLUHG WR XQLTXHO\ VHOHFW D EDQN 6LPLODUO\ D VHFWRU DGGUHVV LV WKH DGGUHVV ELWV UHTXLUHG WR XQLTXHO\ VHOHFW D VHFWRU ,&& LQ '& &KDUDFWHULVWLFV UHS UHVHQWV WKH DFWLYH FXUUHQW VSHFLILFDWLRQ IRU WKH ZULWH PRGH $& &KDUDFWHULVWLFV6\QFKURQRXV DQG $& &KDUDFWHULVWLFV$V\QFKURQRXV FRQWDLQ WLPLQJ VSHFLILFDWLRQ WDEOHV DQG WLPLQJ GLDJUDPV IRU ZULWH RSHUDWLRQV
12.9
Handshaking
7KH KDQGVKDNLQJ IHDWXUH DOORZV WKH KRVW V\VWHP WR GHWHFW ZKHQ GDWD LV UHDG\ WR EH UHDG E\ VLP SO\ PRQLWRULQJ WKH 5'< 5HDG\ SLQ ZKLFK LV D GHGLFDWHG RXWSXW DQG FRQWUROOHG E\ &( :KHQ WKH GHYLFH LV FRQILJXUHG WR RSHUDWH LQ V\QFKURQRXV PRGH DQG 2( LV ORZ DFWLYH WKH LQL WLDO ZRUG RI EXUVW GDWD EHFRPHV DYDLODEOH DIWHU HLWKHU WKH IDOOLQJ RU ULVLQJ HGJH RI WKH 5'< SLQ GHSHQGLQJ RQ WKH VHWWLQJ IRU ELW LQ WKH &RQILJXUDWLRQ 5HJLVWHU ,W LV UHFRPPHQGHG WKDW WKH KRVW V\VWHP VHW &5&5 LQ WKH &RQILJXUDWLRQ 5HJLVWHU WR WKH DSSURSULDWH QXPEHU RI ZDLW VWDWHV WR HQVXUH RSWLPDO EXUVW PRGH RSHUDWLRQ VHH 7DEOH &RQILJXUDWLRQ 5HJLVWHU %LW LQ WKH &RQILJXUDWLRQ 5HJLVWHU DOORZV WKH KRVW WR VSHFLI\ ZKHWKHU 5'< LV DFWLYH DW WKH VDPH WLPH WKDW GDWD LV UHDG\ RU RQH F\FOH EHIRUH GDWD LV UHDG\
56
S29WS-N_m0_I0 December 3, 2005
Preliminary
12.10 Hardware Reset
7KH 5(6(7 LQSXW SURYLGHV D KDUGZDUH PHWKRG RI UHVHWWLQJ WKH GHYLFH WR UHDGLQJ DUUD\ GDWD :KHQ 5(6(7 LV GULYHQ ORZ IRU DW OHDVW D SHULRG RI W53 WKH GHYLFH LPPHGLDWHO\ WHUPLQDWHV DQ\ RSHUDWLRQ LQ SURJUHVV WULVWDWHV DOO RXWSXWV UHVHWV WKH FRQILJXUDWLRQ UHJLVWHU DQG LJQRUHV DOO UHDG ZULWH FRPPDQGV IRU WKH GXUDWLRQ RI WKH 5(6(7 SXOVH 7KH GHYLFH DOVR UHVHWV WKH LQWHUQDO VWDWH PDFKLQH WR UHDGLQJ DUUD\ GDWD 7R HQVXUH GDWD LQWHJULW\ WKH RSHUDWLRQ WKDW ZDV LQWHUUXSWHG VKRXOG EH UHLQLWLDWHG RQFH WKH GHYLFH LV UHDG\ WR DFFHSW DQRWKHU FRPPDQG VHTXHQFH :KHQ 5(6(7 LV KHOG DW 966 WKH GHYLFH GUDZV &026 VWDQGE\ FXUUHQW ,&& ,I 5(6(7 DW 9,/ EXW QRW DW 966 WKH VWDQGE\ FXUUHQW LV JUHDWHU LV KHOG
5(6(7 PD\ EH WLHG WR WKH V\VWHP UHVHW FLUFXLWU\ ZKLFK HQDEOHV WKH V\VWHP WR UHDG WKH ERRWXS ILUPZDUH IURP WKH )ODVK PHPRU\ XSRQ D V\VWHP UHVHW 6HH )LJXUHV DQG IRU WLPLQJ GLDJUDPV
12.11 Software Reset
6RIWZDUH UHVHW LV SDUW RI WKH FRPPDQG VHW VHH 7DEOH WKDW DOVR UHWXUQV WKH GHYLFH WR DUUD\ UHDG PRGH DQG PXVW EH XVHG IRU WKH IROORZLQJ FRQGLWLRQV WR H[LW $XWRVHOHFW PRGH ZKHQ '4 JRHV KLJK GXULQJ ZULWH VWDWXV RSHUDWLRQ WKDW LQGLFDWHV SURJUDP RU HUDVH F\FOH ZDV QRW VXFFHVVIXOO\ FRPSOHWHG H[LW VHFWRU ORFNXQORFN RSHUDWLRQ WR UHWXUQ WR HUDVHVXVSHQGUHDG PRGH LI WKH GHYLFH ZDV SUHYLRXVO\ LQ (UDVH 6XVSHQG PRGH DIWHU DQ\ DERUWHG RSHUDWLRQV
Software Functions and Sample Code
Table 12.27.
//' )XQFWLRQ
Reset
Byte Address Word Address Data
OOGB5HVHW&PG
Cycle
Operation
5HVHW &RPPDQG
:ULWH
%DVH [[[K
%DVH [[[K
)K
1RWH %DVH
%DVH $GGUHVV
7KH IROORZLQJ LV D & VRXUFH FRGH H[DPSOH RI XVLQJ WKH UHVHW IXQFWLRQ 5HIHU WR WKH 6SDQVLRQ /RZ /HYHO 'ULYHU 8VHUV *XLGH DYDLODEOH RQ ZZZDPGFRP DQG ZZZIXMLWVXFRP IRU JHQHUDO LQIRUPD WLRQ RQ 6SDQVLRQ )ODVK PHPRU\ VRIWZDUH GHYHORSPHQW JXLGHOLQHV
/* Example: Reset (software reset of Flash state machine) */ *( (UINT16 *)base_addr + 0x000 ) = 0x00F0;
7KH IROORZLQJ DUH DGGLWLRQDO SRLQWV WR FRQVLGHU ZKHQ XVLQJ WKH UHVHW FRPPDQG 7KLV FRPPDQG UHVHWV WKH EDQNV WR WKH UHDG DQG DGGUHVV ELWV DUH LJQRUHG 5HVHW FRPPDQGV DUH LJQRUHG RQFH HUDVXUH KDV EHJXQ XQWLO WKH RSHUDWLRQ LV FRPSOHWH 2QFH SURJUDPPLQJ EHJLQV WKH GHYLFH LJQRUHV UHVHW FRPPDQGV XQWLO WKH RSHUDWLRQ LV FRP SOHWH 7KH UHVHW FRPPDQG PD\ EH ZULWWHQ EHWZHHQ WKH F\FOHV LQ D SURJUDP FRPPDQG VHTXHQFH EHIRUH SURJUDPPLQJ EHJLQV SULRU WR WKH WKLUG F\FOH 7KLV UHVHWV WKH EDQN WR ZKLFK WKH V\V WHP ZDV ZULWLQJ WR WKH UHDG PRGH
December 3, 2005 S29WS-N_m0_I0
57
Preliminary

,I WKH SURJUDP FRPPDQG VHTXHQFH LV ZULWWHQ WR D EDQN WKDW LV LQ WKH (UDVH 6XVSHQG PRGH ZULWLQJ WKH UHVHW FRPPDQG UHWXUQV WKDW EDQN WR WKH HUDVHVXVSHQGUHDG PRGH 7KH UHVHW FRPPDQG PD\ EH DOVR ZULWWHQ GXULQJ DQ $XWRVHOHFW FRPPDQG VHTXHQFH ,I D EDQN KDV HQWHUHG WKH $XWRVHOHFW PRGH ZKLOH LQ WKH (UDVH 6XVSHQG PRGH ZULWLQJ WKH UHVHW FRPPDQG UHWXUQV WKDW EDQN WR WKH HUDVHVXVSHQGUHDG PRGH ,I '4 JRHV KLJK GXULQJ D :ULWH %XIIHU 3URJUDPPLQJ RSHUDWLRQ WKH V\VWHP PXVW ZULWH WKH :ULWH WR %XIIHU $ERUW 5HVHW FRPPDQG VHTXHQFH WR 5(6(7 WKH GHYLFH WR UHDGLQJ DUUD\ GDWD 7KH VWDQGDUG 5(6(7 FRPPDQG GRHV QRW ZRUN GXULQJ WKLV FRQGLWLRQ 7R H[LW WKH XQORFN E\SDVV PRGH WKH V\VWHP PXVW LVVXH D WZRF\FOH XQORFN E\SDVV UHVHW FRP PDQG VHTXHQFH >VHH FRPPDQG WDEOH IRU GHWDLOV@
58
S29WS-N_m0_I0 December 3, 2005
Preliminary
13 Advanced Sector Protection/Unprotection
7KH $GYDQFHG 6HFWRU 3URWHFWLRQ8QSURWHFWLRQ IHDWXUH GLVDEOHV RU HQDEOHV SURJUDPPLQJ RU HUDVH RSHUDWLRQV LQ DQ\ RU DOO VHFWRUV DQG FDQ EH LPSOHPHQWHG WKURXJK VRIWZDUH DQGRU KDUGZDUH PHWKRGV ZKLFK DUH LQGHSHQGHQW RI HDFK RWKHU 7KLV VHFWLRQ GHVFULEHV WKH YDULRXV PHWKRGV RI SURWHFWLQJ GDWD VWRUHG LQ WKH PHPRU\ DUUD\ $Q RYHUYLHZ RI WKHVH PHWKRGV LQ VKRZQ LQ )LJXUH
Hardware Methods
Software Methods
Lock Register
(One Time Programmable)
ACC = VIL (All sectors locked)
Password Method
(DQ2)
Persistent Method
(DQ1)
(All boot sectors locked)
WP# = VIL
64-bit Password
(One Time Protect)
PPB Lock Bit1,2,3 0 = PPBs Locked 1 = PPBs Unlocked
1. Bit is volatile, and defaults to "1" on reset. 2. Programming to "0" locks all PPBs to their current state. 3. Once programmed to "0", requires hardware reset to unlock.
Memory Array
Sector 0 Sector 1 Sector 2
Persistent Protection Bit (PPB)4,5
PPB 0 PPB 1 PPB 2
Dynamic Protection Bit (DYB)6,7,8
DYB 0 DYB 1 DYB 2
Sector N-2 Sector N-1 Sector N3
3. N = Highest Address Sector.
PPB N-2 PPB N-1 PPB N
4. 0 = Sector Protected, 1 = Sector Unprotected. 5. PPBs programmed individually, but cleared collectively
DYB N-2 DYB N-1 DYB N
6. 0 = Sector Protected, 1 = Sector Unprotected. 7. Protect effective only if PPB Lock Bit is unlocked and corresponding PPB is "1" (unprotected). 8. Volatile Bits: defaults to user choice upon power-up (see ordering options).
Figure 13.1. Advanced Sector Protection/Unprotection
December 3, 2005 S29WS-N_m0_I0
59
Preliminary
13.1
Lock Register
$V VKLSSHG IURP WKH IDFWRU\ DOO GHYLFHV GHIDXOW WR WKH SHUVLVWHQW PRGH ZKHQ SRZHU LV DSSOLHG DQG DOO VHFWRUV DUH XQSURWHFWHG XQOHVV RWKHUZLVH FKRVHQ WKURXJK WKH '<% RUGHULQJ RSWLRQ 7KH GHYLFH SURJUDPPHU RU KRVW V\VWHP PXVW WKHQ FKRRVH ZKLFK VHFWRU SURWHFWLRQ PHWKRG WR XVH 3URJUDPPLQJ VHWWLQJ WR DQ\ RQH RI WKH IROORZLQJ WZR RQHWLPH SURJUDPPDEOH QRQYRODWLOH ELWV ORFNV WKH SDUW SHUPDQHQWO\ LQ WKDW PRGH /RFN 5HJLVWHU 3HUVLVWHQW 3URWHFWLRQ 0RGH /RFN %LW '4 /RFN 5HJLVWHU 3DVVZRUG 3URWHFWLRQ 0RGH /RFN %LW '4
Table 13.1
Device
6:61
Lock Register
DQ3
DQ15-05
DQ4
'<% /RFN %RRW %LW VHFWRUV SRZHU XS SURWHFWHG VHFWRUV SRZHU XS XQSURWHFWHG
DQ2
3DVVZRUG 3URWHFWLRQ 0RGH /RFN %LW
DQ1
3HUVLVWHQW 3URWHFWLRQ 0RGH /RFN %LW
DQ0
&XVWRPHU 6HF6L 6HFWRU 3URWHFWLRQ %LW
33% 2QH7LPH 3URJUDPPDEOH %LW $OO 33% HUDVH FRPPDQG GLVDEOHG $OO 33% (UDVH FRPPDQG HQDEOHG
6:61
8QGHILQHG
3DVVZRUG 3URWHFWLRQ 0RGH /RFN %LW
3HUVLVWHQW 3URWHFWLRQ 0RGH /RFN %LW
6HF6L 6HFWRU 3URWHFWLRQ %LW
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60
S29WS-N_m0_I0 December 3, 2005
Preliminary
$IWHU VHOHFWLQJ D VHFWRU SURWHFWLRQ PHWKRG HDFK VHFWRU FDQ RSHUDWH LQ DQ\ RI WKH IROORZLQJ WKUHH VWDWHV &RQVWDQWO\ ORFNHG 7KH VHOHFWHG VHFWRUV DUH SURWHFWHG DQG FDQ QRW EH UHSURJUDPPHG XQOHVV 33% ORFN ELW LV FOHDUHG YLD D SDVVZRUG KDUGZDUH UHVHW RU SRZHU F\FOH '\QDPLFDOO\ ORFNHG 7KH VHOHFWHG VHFWRUV DUH SURWHFWHG DQG FDQ EH DOWHUHG YLD VRIWZDUH FRPPDQGV 8QORFNHG 7KH VHFWRUV DUH XQSURWHFWHG DQG FDQ EH HUDVHG DQGRU SURJUDPPHG
7KHVH VWDWHV DUH FRQWUROOHG E\ WKH ELW W\SHV GHVFULEHG LQ 6HFWLRQV
13.2
Persistent Protection Bits
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7KH SURJUDPPLQJ VWDWH RI WKH 33% IRU D JLYHQ VHFWRU FDQ EH YHULILHG E\ ZULWLQJ D 33% 6WDWXV 5HDG &RPPDQG WR WKH GHYLFH DV GHVFULEHG E\ WKH IORZ FKDUW VKRZQ LQ )LJXUH
December 3, 2005 S29WS-N_m0_I0
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Preliminary
Enter PPB Command Set. Addr = BA
Program PPB Bit. Addr = SA
Read Byte Twice Addr = SA0
DQ6 = Toggle? Yes No
No
DQ5 = 1? Yes Read Byte Twice Addr = SA0 Wait 500 s
DQ6 = Toggle? Yes
No
Read Byte. Addr = SA
No
DQ0 = '1' (Erase) '0' (Pgm.)? Yes PASS
FAIL
Exit PPB Command Set
Figure 13.2.
PPB Program/Erase Algorithm
62
S29WS-N_m0_I0 December 3, 2005
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13.3
Dynamic Protection Bits
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13.4
Persistent Protection Bit Lock Bit
7KH 3HUVLVWHQW 3URWHFWLRQ %LW /RFN %LW LV D JOREDO YRODWLOH ELW IRU DOO VHFWRUV :KHQ VHW SUR JUDPPHG WR LW ORFNV DOO 33%V DQG ZKHQ FOHDUHG SURJUDPPHG WR DOORZV WKH 33%V WR EH FKDQJHG 7KHUH LV RQO\ RQH 33% /RFN %LW SHU GHYLFH 1RWHV 1R VRIWZDUH FRPPDQG VHTXHQFH XQORFNV WKLV ELW XQOHVV WKH GHYLFH LV LQ WKH SDVVZRUG SUR WHFWLRQ PRGH RQO\ D KDUGZDUH UHVHW RU D SRZHUXS FOHDUV WKLV ELW 7KH 33% /RFN %LW PXVW EH VHW SURJUDPPHG WR RQO\ DIWHU DOO 33%V DUH FRQILJXUHG WR WKH GHVLUHG VHWWLQJV
13.5
Password Protection Method
7KH 3DVVZRUG 3URWHFWLRQ 0HWKRG DOORZV DQ HYHQ KLJKHU OHYHO RI VHFXULW\ WKDQ WKH 3HUVLVWHQW 6HF WRU 3URWHFWLRQ 0RGH E\ UHTXLULQJ D ELW SDVVZRUG IRU XQORFNLQJ WKH GHYLFH 33% /RFN %LW ,Q DGGLWLRQ WR WKLV SDVVZRUG UHTXLUHPHQW DIWHU SRZHU XS DQG UHVHW WKH 33% /RFN %LW LV VHW WR PDLQWDLQ WKH SDVVZRUG PRGH RI RSHUDWLRQ 6XFFHVVIXO H[HFXWLRQ RI WKH 3DVVZRUG 8QORFN FRP PDQG E\ HQWHULQJ WKH HQWLUH SDVVZRUG FOHDUV WKH 33% /RFN %LW DOORZLQJ IRU VHFWRU 33%V PRGLILFDWLRQV
December 3, 2005 S29WS-N_m0_I0
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1RWHV 7KHUH LV QR VSHFLDO DGGUHVVLQJ RUGHU UHTXLUHG IRU SURJUDPPLQJ WKH SDVVZRUG 2QFH WKH 3DVV ZRUG LV ZULWWHQ DQG YHULILHG WKH 3DVVZRUG 0RGH /RFNLQJ %LW PXVW EH VHW LQ RUGHU WR SUHYHQW DFFHVV 7KH 3DVVZRUG 3URJUDP &RPPDQG LV RQO\ FDSDEOH RI SURJUDPPLQJ V 3URJUDPPLQJ D DIWHU D FHOO LV SURJUDPPHG DV D UHVXOWV LQ D WLPHRXW ZLWK WKH FHOO DV D 7KH SDVVZRUG LV DOO V ZKHQ VKLSSHG IURP WKH IDFWRU\ $OO ELW SDVVZRUG FRPELQDWLRQV DUH YDOLG DV D SDVVZRUG 7KHUH LV QR PHDQV WR YHULI\ ZKDW WKH SDVVZRUG LV DIWHU LW LV VHW 7KH 3DVVZRUG 0RGH /RFN %LW RQFH VHW SUHYHQWV UHDGLQJ WKH ELW SDVVZRUG RQ WKH GDWD EXV DQG IXUWKHU SDVVZRUG SURJUDPPLQJ 7KH 3DVVZRUG 0RGH /RFN %LW LV QRW HUDVDEOH 7KH ORZHU WZR DGGUHVV ELWV $$ DUH YDOLG GXULQJ WKH 3DVVZRUG 5HDG 3DVVZRUG 3URJUDP DQG 3DVVZRUG 8QORFN 7KH H[DFW SDVVZRUG PXVW EH HQWHUHG LQ RUGHU IRU WKH XQORFNLQJ IXQFWLRQ WR RFFXU

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64
S29WS-N_m0_I0 December 3, 2005
Preliminary
Write Unlock Cycles: Address 555h, Data AAh Address 2AAh, Data 55h
Unlock Cycle 1 Unlock Cycle 2
Write Enter Lock Register Command: Address 555h, Data 40h
Program Lock Register Data Address XXXh, Data A0h Address 77h*, Data PD
XXXh = Address don't care * Not on future devices Program Data (PD): See text for Lock Register definitions Caution: Lock register can only be progammed once.
Wait 4 s (Recommended)
Perform Polling Algorithm
(see Write Operation Status flowchart)
Yes
Done?
No DQ5 = 1? Yes No Error condition (Exceeded Timing Limits)
PASS. Write Lock Register Exit Command: Address XXXh, Data 90h Address XXXh, Data 00h Device returns to reading array.
FAIL. Write rest command to return to reading array.
Figure 13.3. Lock Register Program Algorithm
December 3, 2005 S29WS-N_m0_I0
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13.6
Advanced Sector Protection Software Examples
Table 13.2 Sector Protection Schemes
Unique Device PPB Lock Bit 0 = locked 1 = unlocked
$Q\ 6HFWRU $Q\ 6HFWRU $Q\ 6HFWRU $Q\ 6HFWRU $Q\ 6HFWRU $Q\ 6HFWRU $Q\ 6HFWRU $Q\ 6HFWRU
Sector PPB 0 = protected 1 = unprotected

Sector DYB 0 = protected 1 = unprotected
[ [ [ [
Sector Protection Status
3URWHFWHG WKURXJK 33% 3URWHFWHG WKURXJK 33% 8QSURWHFWHG 3URWHFWHG WKURXJK '<% 3URWHFWHG WKURXJK 33% 3URWHFWHG WKURXJK 33% 3URWHFWHG WKURXJK '<% 8QSURWHFWHG
7DEOH FRQWDLQV DOO SRVVLEOH FRPELQDWLRQV RI WKH '<% 33% DQG 33% /RFN %LW UHODWLQJ WR WKH VWDWXV RI WKH VHFWRU ,Q VXPPDU\ LI WKH 33% /RFN %LW LV ORFNHG VHW WR QR FKDQJHV WR WKH 33%V DUH DOORZHG 7KH 33% /RFN %LW FDQ RQO\ EH XQORFNHG UHVHW WR WKURXJK D KDUGZDUH UHVHW RU SRZHU F\FOH 6HH DOVR )LJXUH IRU DQ RYHUYLHZ RI WKH $GYDQFHG 6HFWRU 3URWHFWLRQ IHDWXUH
13.7
Hardware Data Protection Methods
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:3
0HWKRG
7KH :ULWH 3URWHFW IHDWXUH SURYLGHV D KDUGZDUH PHWKRG RI SURWHFWLQJ WKH IRXU RXWHUPRVW VHFWRUV 7KLV IXQFWLRQ LV SURYLGHG E\ WKH :3 SLQ DQG RYHUULGHV WKH SUHYLRXVO\ GLVFXVVHG 6HFWRU 3URWHF WLRQ8QSURWHFWLRQ PHWKRG ,I WKH V\VWHP DVVHUWV 9,/ RQ WKH :3 SLQ WKH GHYLFH GLVDEOHV SURJUDP DQG HUDVH IXQFWLRQV LQ WKH RXWHUPRVW ERRW VHFWRUV 7KH RXWHUPRVW ERRW VHFWRUV DUH WKH VHFWRUV FRQWDLQLQJ ERWK WKH ORZHU DQG XSSHU VHW RI VHFWRUV LQ D GXDOERRWFRQILJXUHG GHYLFH ,I WKH V\VWHP DVVHUWV 9,+ RQ WKH :3 SLQ WKH GHYLFH UHYHUWV WR ZKHWKHU WKH ERRW VHFWRUV ZHUH ODVW VHW WR EH SURWHFWHG RU XQSURWHFWHG 7KDW LV VHFWRU SURWHFWLRQ RU XQSURWHFWLRQ IRU WKHVH VHF WRUV GHSHQGV RQ ZKHWKHU WKH\ ZHUH ODVW SURWHFWHG RU XQSURWHFWHG 1RWH WKDW WKH :3 SLQ PXVW QRW EH OHIW IORDWLQJ RU XQFRQQHFWHG DV LQFRQVLVWHQW EHKDYLRU RI WKH GHYLFH PD\ UHVXOW 7KH :3 SLQ PXVW EH KHOG VWDEOH GXULQJ D FRPPDQG VHTXHQFH H[HFXWLRQ
$&& 0HWKRG
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66
S29WS-N_m0_I0 December 3, 2005
Preliminary
/RZ 9&& :ULWH ,QKLELW
:KHQ 9&& LV OHVV WKDQ 9/.2 WKH GHYLFH GRHV QRW DFFHSW DQ\ ZULWH F\FOHV 7KLV SURWHFWV GDWD GXU LQJ 9&& SRZHUXS DQG SRZHUGRZQ 7KH FRPPDQG UHJLVWHU DQG DOO LQWHUQDO SURJUDPHUDVH FLUFXLWV DUH GLVDEOHG DQG WKH GHYLFH UHVHWV WR UHDGLQJ DUUD\ GDWD 6XEVHTXHQW ZULWHV DUH LJQRUHG XQWLO 9&& LV JUHDWHU WKDQ 9/.2 7KH V\VWHP PXVW SURYLGH WKH SURSHU VLJQDOV WR WKH FRQWURO LQSXWV WR SUHYHQW XQLQWHQWLRQDO ZULWHV ZKHQ 9&& LV JUHDWHU WKDQ 9/.2
:ULWH 3XOVH *OLWFK 3URWHFWLRQ
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3RZHU8S :ULWH ,QKLELW
,I :( &( 5(6(7 9,/ DQG 2( 9,+ GXULQJ SRZHU XS WKH GHYLFH GRHV QRW DFFHSW FRPPDQGV RQ WKH ULVLQJ HGJH RI :( 7KH LQWHUQDO VWDWH PDFKLQH LV DXWRPDWLFDOO\ UHVHW WR WKH UHDG PRGH RQ SRZHUXS
December 3, 2005 S29WS-N_m0_I0
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14 Power Conservation Modes
14.1 Standby Mode
:KHQ WKH V\VWHP LV QRW UHDGLQJ RU ZULWLQJ WR WKH GHYLFH LW FDQ SODFH WKH GHYLFH LQ WKH VWDQGE\ PRGH ,Q WKLV PRGH FXUUHQW FRQVXPSWLRQ LV JUHDWO\ UHGXFHG DQG WKH RXWSXWV DUH SODFHG LQ WKH KLJK LPSHGDQFH VWDWH LQGHSHQGHQW RI WKH 2( LQSXW 7KH GHYLFH HQWHUV WKH &026 VWDQGE\ PRGH ZKHQ WKH &( DQG 5(6(7 LQSXWV DUH ERWK KHOG DW 9&& 9 7KH GHYLFH UHTXLUHV VWDQGDUG DFFHVV WLPH W&( IRU UHDG DFFHVV EHIRUH LW LV UHDG\ WR UHDG GDWD ,I WKH GHYLFH LV GHVHOHFWHG GXU LQJ HUDVXUH RU SURJUDPPLQJ WKH GHYLFH GUDZV DFWLYH FXUUHQW XQWLO WKH RSHUDWLRQ LV FRPSOHWHG ,&& LQ '& &KDUDFWHULVWLFV UHSUHVHQWV WKH VWDQGE\ FXUUHQW VSHFLILFDWLRQ
14.2
Automatic Sleep Mode
7KH DXWRPDWLF VOHHS PRGH PLQLPL]HV )ODVK GHYLFH HQHUJ\ FRQVXPSWLRQ ZKLOH LQ DV\QFKURQRXV PRGH WKH GHYLFH DXWRPDWLFDOO\ HQDEOHV WKLV PRGH ZKHQ DGGUHVVHV UHPDLQ VWDEOH IRU W$&& QV 7KH DXWRPDWLF VOHHS PRGH LV LQGHSHQGHQW RI WKH &( :( DQG 2( FRQWURO VLJQDOV 6WDQ GDUG DGGUHVV DFFHVV WLPLQJV SURYLGH QHZ GDWD ZKHQ DGGUHVVHV DUH FKDQJHG :KLOH LQ VOHHS PRGH RXWSXW GDWD LV ODWFKHG DQG DOZD\V DYDLODEOH WR WKH V\VWHP :KLOH LQ V\QFKURQRXV PRGH WKH DXWRPDWLF VOHHS PRGH LV GLVDEOHG 1RWH WKDW D QHZ EXUVW RSHUDWLRQ LV UHTXLUHG WR SURYLGH QHZ GDWD ,&& LQ '& &KDUDFWHULVWLFV &026 &RPSDWLEOH UHSUHVHQWV WKH DXWRPDWLF VOHHS PRGH FXU UHQW VSHFLILFDWLRQ
14.3
Hardware RESET# Input Operation
7KH 5(6(7 LQSXW SURYLGHV D KDUGZDUH PHWKRG RI UHVHWWLQJ WKH GHYLFH WR UHDGLQJ DUUD\ GDWD :KHQ 5(6(7 LV GULYHQ ORZ IRU DW OHDVW D SHULRG RI W53 WKH GHYLFH LPPHGLDWHO\ WHUPLQDWHV DQ\ RSHUDWLRQ LQ SURJUHVV WULVWDWHV DOO RXWSXWV UHVHWV WKH FRQILJXUDWLRQ UHJLVWHU DQG LJQRUHV DOO UHDG ZULWH FRPPDQGV IRU WKH GXUDWLRQ RI WKH 5(6(7 SXOVH 7KH GHYLFH DOVR UHVHWV WKH LQWHUQDO VWDWH PDFKLQH WR UHDGLQJ DUUD\ GDWD 7KH RSHUDWLRQ WKDW ZDV LQWHUUXSWHG VKRXOG EH UHLQLWLDWHG RQFH WKH GHYLFH LV UHDG\ WR DFFHSW DQRWKHU FRPPDQG VHTXHQFH WR HQVXUH GDWD LQWHJULW\ :KHQ 5(6(7 LV KHOG DW 966 9 WKH GHYLFH GUDZV &026 VWDQGE\ FXUUHQW ,&& ,I 5(6(7 LV KHOG DW 9,/ EXW QRW ZLWKLQ 966 9 WKH VWDQGE\ FXUUHQW LV JUHDWHU 5(6(7 PD\ EH WLHG WR WKH V\VWHP UHVHW FLUFXLWU\ DQG WKXV D V\VWHP UHVHW ZRXOG DOVR UHVHW WKH )ODVK PHPRU\ HQDEOLQJ WKH V\VWHP WR UHDG WKH ERRWXS ILUPZDUH IURP WKH )ODVK PHPRU\
14.4
Output Disable (OE#)
:KHQ WKH 2( LQSXW LV DW 9,+ RXWSXW IURP WKH GHYLFH LV GLVDEOHG 7KH RXWSXWV DUH SODFHG LQ WKH KLJK LPSHGDQFH VWDWH
68
S29WS-N_m0_I0 December 3, 2005
Preliminary
15 Secured Silicon Sector Flash Memory Region
7KH 6HFXUHG 6LOLFRQ 6HFWRU SURYLGHV DQ H[WUD )ODVK PHPRU\ UHJLRQ WKDW HQDEOHV SHUPDQHQW SDUW LGHQWLILFDWLRQ WKURXJK DQ (OHFWURQLF 6HULDO 1XPEHU (61 7KH 6HFXUHG 6LOLFRQ 6HFWRU LV ZRUGV LQ OHQJWK WKDW FRQVLVWV RI ZRUGV IRU IDFWRU\ GDWD DQG ZRUGV IRU FXVWRPHUVHFXUHG DUHDV $OO 6HFXUHG 6LOLFRQ UHDGV RXWVLGH RI WKH ZRUG DGGUHVV UDQJH UHWXUQV LQYDOLG GDWD 7KH )DFWRU\ ,QGLFDWRU %LW '4 DW $XWRVHOHFW DGGUHVV K LV XVHG WR LQGLFDWH ZKHWKHU RU QRW WKH )DFWRU\ 6HFXUHG 6LOLFRQ 6HFWRU LV ORFNHG ZKHQ VKLSSHG IURP WKH IDFWRU\ 7KH &XVWRPHU ,QGLFDWRU %LW '4 LV XVHG WR LQGLFDWH ZKHWKHU RU QRW WKH &XVWRPHU 6HFXUHG 6LOLFRQ 6HFWRU LV ORFNHG ZKHQ VKLSSHG IURP WKH IDFWRU\ 3OHDVH QRWH WKH IROORZLQJ JHQHUDO FRQGLWLRQV :KLOH 6HFXUHG 6LOLFRQ 6HFWRU DFFHVV LV HQDEOHG VLPXOWDQHRXV RSHUDWLRQV DUH DOORZHG H[FHSW IRU %DQN 2Q SRZHUXS RU IROORZLQJ D KDUGZDUH UHVHW WKH GHYLFH UHYHUWV WR VHQGLQJ FRPPDQGV WR WKH QRUPDO DGGUHVV VSDFH 5HDGV FDQ EH SHUIRUPHG LQ WKH $V\QFKURQRXV RU 6\QFKURQRXV PRGH %XUVW PRGH UHDGV ZLWKLQ 6HFXUHG 6LOLFRQ 6HFWRU ZUDS IURP DGGUHVV ))K EDFN WR DGGUHVV K 5HDGV RXWVLGH RI VHFWRU UHWXUQ PHPRU\ DUUD\ GDWD &RQWLQXRXV EXUVW UHDG SDVW WKH PD[LPXP DGGUHVV LV XQGHILQHG 6HFWRU LV UHPDSSHG IURP PHPRU\ DUUD\ WR 6HFXUHG 6LOLFRQ 6HFWRU DUUD\ 2QFH WKH 6HFXUHG 6LOLFRQ 6HFWRU (QWU\ &RPPDQG LV LVVXHG WKH 6HFXUHG 6LOLFRQ 6HFWRU ([LW FRPPDQG PXVW EH LVVXHG WR H[LW 6HFXUHG 6LOLFRQ 6HFWRU 0RGH 7KH 6HFXUHG 6LOLFRQ 6HFWRU LV QRW DFFHVVLEOH ZKHQ WKH GHYLFH LV H[HFXWLQJ DQ (PEHGGHG 3UR JUDP RU (PEHGGHG (UDVH DOJRULWKP
Table 15.1
Sector &XVWRPHU )DFWRU\
Secured Silicon Sector Addresses
Sector Size ZRUGV ZRUGV Address Range K))K K)K
15.1
Factory Secured Silicon Sector
7KH )DFWRU\ 6HFXUHG 6LOLFRQ 6HFWRU LV DOZD\V SURWHFWHG ZKHQ VKLSSHG IURP WKH IDFWRU\ DQG KDV WKH )DFWRU\ ,QGLFDWRU %LW '4 SHUPDQHQWO\ VHW WR D 7KLV SUHYHQWV FORQLQJ RI D IDFWRU\ ORFNHG SDUW DQG HQVXUHV WKH VHFXULW\ RI WKH (61 DQG FXVWRPHU FRGH RQFH WKH SURGXFW LV VKLSSHG WR WKH ILHOG 7KHVH GHYLFHV DUH DYDLODEOH SUH SURJUDPPHG ZLWK RQH RI WKH IROORZLQJ $ UDQGRP :RUG VHFXUH (61 RQO\ ZLWKLQ WKH )DFWRU\ 6HFXUHG 6LOLFRQ 6HFWRU &XVWRPHU FRGH ZLWKLQ WKH &XVWRPHU 6HFXUHG 6LOLFRQ 6HFWRU WKURXJK WKH 6SDQVLRQ70 SURJUDP PLQJ VHUYLFH %RWK D UDQGRP VHFXUH (61 DQG FXVWRPHU FRGH WKURXJK WKH 6SDQVLRQ SURJUDPPLQJ VHUYLFH
&XVWRPHUV PD\ RSW WR KDYH WKHLU FRGH SURJUDPPHG WKURXJK WKH 6SDQVLRQ SURJUDPPLQJ VHU YLFHV 6SDQVLRQ SURJUDPV WKH FXVWRPHU
V FRGH ZLWK RU ZLWKRXW WKH UDQGRP (61 7KH GHYLFHV DUH WKHQ VKLSSHG IURP WKH 6SDQVLRQ IDFWRU\ ZLWK WKH )DFWRU\ 6HFXUHG 6LOLFRQ 6HFWRU DQG &XVWRPHU 6HFXUHG 6LOLFRQ 6HFWRU SHUPDQHQWO\ ORFNHG &RQWDFW \RXU ORFDO UHSUHVHQWDWLYH IRU GHWDLOV RQ XVLQJ 6SDQVLRQ SURJUDPPLQJ VHUYLFHV
December 3, 2005 S29WS-N_m0_I0
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Preliminary
15.2
Customer Secured Silicon Sector
7KH &XVWRPHU 6HFXUHG 6LOLFRQ 6HFWRU LV W\SLFDOO\ VKLSSHG XQSURWHFWHG '4 VHW WR DOORZLQJ FXVWRPHUV WR XWLOL]H WKDW VHFWRU LQ DQ\ PDQQHU WKH\ FKRRVH ,I WKH VHFXULW\ IHDWXUH LV QRW UHTXLUHG WKH &XVWRPHU 6HFXUHG 6LOLFRQ 6HFWRU FDQ EH WUHDWHG DV DQ DGGLWLRQDO )ODVK PHPRU\ VSDFH 3OHDVH QRWH WKH IROORZLQJ 2QFH WKH &XVWRPHU 6HFXUHG 6LOLFRQ 6HFWRU DUHD LV SURWHFWHG WKH &XVWRPHU ,QGLFDWRU %LW LV SHUPDQHQWO\ VHW WR 7KH &XVWRPHU 6HFXUHG 6LOLFRQ 6HFWRU FDQ EH UHDG DQ\ QXPEHU RI WLPHV EXW FDQ EH SUR JUDPPHG DQG ORFNHG RQO\ RQFH 7KH &XVWRPHU 6HFXUHG 6LOLFRQ 6HFWRU ORFN PXVW EH XVHG ZLWK FDXWLRQ DV RQFH ORFNHG WKHUH LV QR SURFHGXUH DYDLODEOH IRU XQORFNLQJ WKH &XVWRPHU 6HFXUHG 6LOLFRQ 6HFWRU DUHD DQG QRQH RI WKH ELWV LQ WKH &XVWRPHU 6HFXUHG 6LOLFRQ 6HFWRU PHPRU\ VSDFH FDQ EH PRGLILHG LQ DQ\ ZD\ 7KH DFFHOHUDWHG SURJUDPPLQJ $&& DQG XQORFN E\SDVV IXQFWLRQV DUH QRW DYDLODEOH ZKHQ SURJUDPPLQJ WKH &XVWRPHU 6HFXUHG 6LOLFRQ 6HFWRU EXW UHDGLQJ LQ %DQNV WKURXJK LV DYDLODEOH 2QFH WKH &XVWRPHU 6HFXUHG 6LOLFRQ 6HFWRU LV ORFNHG DQG YHULILHG WKH V\VWHP PXVW ZULWH WKH ([LW 6HFXUHG 6LOLFRQ 6HFWRU 5HJLRQ FRPPDQG VHTXHQFH ZKLFK UHWXUQ WKH GHYLFH WR WKH PHP RU\ DUUD\ DW VHFWRU
15.3
Secured Silicon Sector Entry/Exit Command Sequences
7KH V\VWHP FDQ DFFHVV WKH 6HFXUHG 6LOLFRQ 6HFWRU UHJLRQ E\ LVVXLQJ WKH WKUHHF\FOH (QWHU 6H FXUHG 6LOLFRQ 6HFWRU FRPPDQG VHTXHQFH 7KH GHYLFH FRQWLQXHV WR DFFHVV WKH 6HFXUHG 6LOLFRQ 6HFWRU UHJLRQ XQWLO WKH V\VWHP LVVXHV WKH IRXUF\FOH ([LW 6HFXUHG 6LOLFRQ 6HFWRU FRPPDQG VHTXHQFH 6HH &RPPDQG 'HILQLWLRQ 7DEOH >6HFXUHG 6LOLFRQ 6HFWRU &RPPDQG 7DEOH $SSHQGL[ 7DEOH IRU DGGUHVV DQG GDWD UHTXLUHPHQWV IRU ERWK FRPPDQG VHTXHQFHV 7KH 6HFXUHG 6LOLFRQ 6HFWRU (QWU\ &RPPDQG DOORZV WKH IROORZLQJ FRPPDQGV WR EH H[HFXWHG 5HDG FXVWRPHU DQG IDFWRU\ 6HFXUHG 6LOLFRQ DUHDV 3URJUDP WKH FXVWRPHU 6HFXUHG 6LOLFRQ 6HFWRU
$IWHU WKH V\VWHP KDV ZULWWHQ WKH (QWHU 6HFXUHG 6LOLFRQ 6HFWRU FRPPDQG VHTXHQFH LW PD\ UHDG WKH 6HFXUHG 6LOLFRQ 6HFWRU E\ XVLQJ WKH DGGUHVVHV QRUPDOO\ RFFXSLHG E\ VHFWRU 6$ ZLWKLQ WKH PHPRU\ DUUD\ 7KLV PRGH RI RSHUDWLRQ FRQWLQXHV XQWLO WKH V\VWHP LVVXHV WKH ([LW 6HFXUHG 6LOLFRQ 6HFWRU FRPPDQG VHTXHQFH RU XQWLO SRZHU LV UHPRYHG IURP WKH GHYLFH
Software Functions and Sample Code
7KH IROORZLQJ DUH & IXQFWLRQV DQG VRXUFH FRGH H[DPSOHV RI XVLQJ WKH 6HFXUHG 6LOLFRQ 6HFWRU (QWU\ 3URJUDP DQG H[LW FRPPDQGV 5HIHU WR WKH 6SDQVLRQ /RZ /HYHO 'ULYHU 8VHUV *XLGH DYDLODEOH VRRQ RQ ZZZDPGFRP DQG ZZZIXMLWVXFRP IRU JHQHUDO LQIRUPDWLRQ RQ 6SDQVLRQ )ODVK PHPRU\ VRIWZDUH GHYHORSPHQW JXLGHOLQHV
70
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Table 15.2.
Cycle
Secured Silicon Sector Entry
OOGB6HF6L6HFWRU(QWU\&PG
//' )XQFWLRQ
Operation
Byte Address
Word Address
Data
8QORFN &\FOH 8QORFN &\FOH (QWU\ &\FOH
:ULWH :ULWH :ULWH
%DVH $$$K %DVH K %DVH $$$K
%DVH K %DVH $$K %DVH K
$$K K K
1RWH %DVH
%DVH $GGUHVV
/* Example: SecSi Sector *( (UINT16 *)base_addr *( (UINT16 *)base_addr *( (UINT16 *)base_addr
Entry Command */ + 0x555 ) = 0x00AA; + 0x2AA ) = 0x0055; + 0x555 ) = 0x0088;
/* write unlock cycle 1 /* write unlock cycle 2 /* write Secsi Sector Entry Cmd
*/ */ */
Table 15.3.
Cycle
Secured Silicon Sector Program
OOGB3URJUDP&PG
//' )XQFWLRQ
Operation
Byte Address
Word Address
Data
8QORFN &\FOH 8QORFN &\FOH 3URJUDP 6HWXS 3URJUDP
:ULWH :ULWH :ULWH :ULWH
%DVH $$$K %DVH K %DVH $$$K :RUG $GGUHVV
%DVH K %DVH $$K %DVH K :RUG $GGUHVV
$$K K $K 'DWD :RUG
1RWH %DVH
%DVH $GGUHVV
/* Once in the SecSi Sector mode, you program */ /* words using the programming algorithm. */
Table 15.4.
Cycle
Secured Silicon Sector Exit
OOGB6HF6L6HFWRU([LW&PG
//' )XQFWLRQ
Operation
Byte Address
Word Address
Data
8QORFN &\FOH 8QORFN &\FOH ([LW &\FOH
:ULWH :ULWH :ULWH
%DVH $$$K %DVH K %DVH $$$K
%DVH K %DVH $$K %DVH K
$$K K K
1RWH %DVH
%DVH $GGUHVV
Exit Command */ + 0x555 ) = 0x00AA; + 0x2AA ) = 0x0055; + 0x555 ) = 0x0090; + 0x000 ) = 0x0000; /* /* /* /* write write write write unlock cycle unlock cycle SecSi Sector SecSi Sector 1 2 Exit cycle 3 Exit cycle 4 */ */ */ */
/* Example: SecSi Sector *( (UINT16 *)base_addr *( (UINT16 *)base_addr *( (UINT16 *)base_addr *( (UINT16 *)base_addr
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Preliminary
16 Electrical Specifications
16.1 Absolute Maximum Ratings
6WRUDJH 7HPSHUDWXUH 3ODVWLF 3DFNDJHV & WR & $PELHQW 7HPSHUDWXUH ZLWK 3RZHU $SSOLHG & WR & 9ROWDJH ZLWK 5HVSHFW WR *URXQG $OO ,QSXWV DQG ,2V H[FHSW DV QRWHG EHORZ 1RWH 9 WR 9&& 9 9&& 1RWH 9 WR 9 $&& 1RWH 9 WR 9 2XWSXW 6KRUW &LUFXLW &XUUHQW 1RWH P$ 1RWHV 0LQLPXP '& YROWDJH RQ LQSXW RU ,2V LV 9 'XULQJ YROWDJH WUDQVLWLRQV LQSXWV RU ,2V PD\ XQGHUVKRRW 966 WR 9 IRU SHULRGV RI XS WR QV 6HH )LJXUH 0D[LPXP '& YROWDJH RQ LQSXW RU ,2V LV 9&& 9 'XULQJ YROWDJH WUDQVLWLRQV RXWSXWV PD\ RYHUVKRRW WR 9&& 9 IRU SHULRGV XS WR QV 6HH )LJXUH 0LQLPXP '& LQSXW YROWDJH RQ SLQ $&& LV 9 'XULQJ YROWDJH WUDQVLWLRQV $&& PD\ RYHUVKRRW 966 WR 9 IRU SHULRGV RI XS WR QV 6HH )LJXUH 0D[LPXP '& YROWDJH RQ SLQ $&& LV 9 ZKLFK PD\ RYHUVKRRW WR 9 IRU SHULRGV XS WR QV 1R PRUH WKDQ RQH RXWSXW PD\ EH VKRUWHG WR JURXQG DW D WLPH 'XUDWLRQ RI WKH VKRUW FLUFXLW VKRXOG QRW EH JUHDWHU WKDQ RQH VHFRQG 6WUHVVHV DERYH WKRVH OLVWHG XQGHU $EVROXWH 0D[LPXP 5DWLQJV PD\ FDXVH SHUPDQHQW GDPDJH WR WKH GHYLFH 7KLV LV D VWUHVV UDWLQJ RQO\ IXQFWLRQDO RSHUDWLRQ RI WKH GHYLFH DW WKHVH RU DQ\ RWKHU FRQGLWLRQV DERYH WKRVH LQGLFDWHG LQ WKH RSHUDWLRQDO VHFWLRQV RI WKLV GDWD VKHHW LV QRW LPSOLHG ([SRVXUH RI WKH GHYLFH WR DEVROXWH PD[LPXP UDWLQJ FRQGLWLRQV IRU H[WHQGHG SHULRGV PD\ DIIHFW GHYLFH UHOLDELOLW\

20 ns +0.8 V -0.5 V -2.0 V 20 ns
20 ns VCC +2.0 V VCC +0.5 V 1.0 V 20 ns
20 ns
20 ns
Figure 16.1. Maximum Negative Overshoot Waveform
Figure 16.2. Maximum Positive Overshoot Waveform
1RWH7KH FRQWHQW LQ WKLV GRFXPHQW LV $GYDQFH LQIRUPDWLRQ IRU WKH 6:61 &RQWHQW LQ WKLV GRFX PHQW LV 3UHOLPLQDU\ IRU WKH 6:1
72
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16.2
Operating Ranges
:LUHOHVV : 'HYLFHV
$PELHQW 7HPSHUDWXUH 7$ & WR &
6XSSO\ 9ROWDJHV
9&& 6XSSO\ 9ROWDJHV 9 WR 9 1RWHV 2SHUDWLQJ UDQJHV GHILQH WKRVH OLPLWV EHWZHHQ ZKLFK WKH IXQFWLRQDOLW\ RI WKH GHYLFH LV JXDUDQWHHG
16.3
Test Conditions
Device Under Test CL
Figure 16.3. Table 16.1
Test Condition
Test Setup
Test Specifications
All Speed Options Unit
2XWSXW /RDG &DSDFLWDQFH &/ LQFOXGLQJ MLJ FDSDFLWDQFH ,QSXW 5LVH DQG )DOO 7LPHV ,QSXW 3XOVH /HYHOV ,QSXW WLPLQJ PHDVXUHPHQW UHIHUHQFH OHYHOV 2XWSXW WLPLQJ PHDVXUHPHQW UHIHUHQFH OHYHOV
# 0+] # 0+] 9&& 9&& 9&&
S) QV 9 9 9
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Preliminary
16.4
Key to Switching Waveforms
Waveform Inputs Outputs
6WHDG\ &KDQJLQJ IURP + WR / &KDQJLQJ IURP / WR + 'RQW &DUH $Q\ &KDQJH 3HUPLWWHG 'RHV 1RW $SSO\ &KDQJLQJ 6WDWH 8QNQRZQ &HQWHU /LQH LV +LJK ,PSHGDQFH 6WDWH +LJK =
16.5
Switching Waveforms
All Inputs and Outputs VCC 0.0 V Input VCC/2 Measurement Level VCC/2 Output
Figure 16.4. Input Waveforms and Measurement Levels
16.6
VCC Power-up
Parameter Description Test Setup Speed Unit
W9&6
9&& 6HWXS 7LPH
0LQ
PV
1RWHV $OO 9&& VLJQDOV PXVW EH UDPSHG VLPXOWDQHRXVO\ WR HQVXUH FRUUHFW SRZHUXS 6:61 9&& UDPS UDWH LV ! 9 V DQG IRU 9&& UDPS UDWH RI 9 V D KDUGZDUH UHVHW LV UHTXLUHG
tVCS VCC
RESET#
Figure 16.5. VCC Power-up Diagram
74
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16.7
DC Characteristics (CMOS Compatible)
3DUDPHWHU ,/, ,/2 'HVFULSWLRQ 1RWHV ,QSXW /RDG &XUUHQW 2XWSXW /HDNDJH &XUUHQW 7HVW &RQGLWLRQV 1RWHV 9,1 9287 &( :( &( :( ,&&% 9&& $FWLYH EXUVW 5HDG &XUUHQW &( :( 9,/ 2( 9,+ 9,+ EXUVW OHQJWK 966 WR 9&& 9&& 966 WR 9&& 9&& 9,+ 9,/ 2( 9,+ EXUVW OHQJWK 9&&PD[ 9&&PD[ 0+] 0+] 0+] 9,/ 2( 9,+ 9,+ EXUVW OHQJWK 0+] 0+] 0+] 0+] 0+] 0+] 0+] 0+] 0+] 0+] 0+] 0+] 9,+ 9$&& 9&& 9$&& 9&& 9,/ 9,+ # 9,+ $&& 9,+ 9,/ 9,+ 9$&& 9&& 9&& 9&&
PLQ PLQ
0LQ
7\S
0D[
8QLW $ $ P$ P$ P$ P$ P$ P$ P$ P$ P$ P$ P$ P$ P$ P$ P$ $ P$ $ $ $ P$ $ P$ P$ P$ 9 9 9 9

9&&
&( 9,/ 2( 9,+ :( 9,+ EXUVW OHQJWK &RQWLQXRXV 9&& $FWLYH $V\QFKURQRXV 5HDG &XUUHQW
,&&
&( :( &( $&&
9,/ 2( 9,+ 9,/ 2( 9,+
9,+
,&& ,&& ,&& ,&& ,&& ,&& ,$&& 9,/ 9,+ 92/ 92+ 9++ 9/.2
9&& $FWLYH :ULWH &XUUHQW 9&& 6WDQGE\ &XUUHQW 9&& 5HVHW &XUUHQW 9&& $FWLYH &XUUHQW 5HDG :KLOH :ULWH 9&& 6OHHS &XUUHQW 9&& 3DJH 0RGH 5HDG &XUUHQW $FFHOHUDWHG 3URJUDP &XUUHQW ,QSXW /RZ 9ROWDJH ,QSXW +LJK 9ROWDJH 2XWSXW /RZ 9ROWDJH 2XWSXW +LJK 9ROWDJH 9ROWDJH IRU $FFHOHUDWHG 3URJUDP /RZ 9&& /RFNRXW 9ROWDJH
&( 5(6(7 9&& 9 5(6(7 9,/ &/.
&( 9,/ 2( 0+] &( 2( &( 9$&& 9&& 9&& ,2/ ,2+ 9,/ 2( 9,+ &( 9,/ 2( 9 9 9 $ 9&&
$ 9&&
9&&
9&&
9 9
1RWHV 0D[LPXP ,&& VSHFLILFDWLRQV DUH WHVWHG ZLWK 9&& &(
9&&PD[
PXVW EH VHW KLJK ZKHQ PHDVXULQJ WKH 5'< SLQ
7KH ,&& FXUUHQW OLVWHG LV W\SLFDOO\ OHVV WKDQ P$0+] ZLWK 2( DW 9,+ ,&& DFWLYH ZKLOH (PEHGGHG (UDVH RU (PEHGGHG 3URJUDP LV LQ SURJUHVV 'HYLFH HQWHUV DXWRPDWLF VOHHS PRGH ZKHQ DGGUHVVHV DUH VWDEOH IRU W$&& QV 7\SLFDO VOHHS PRGH FXUUHQW LV HTXDO WR ,&& 9,+ 9&& 9 DQG 9,/ ! 9 7RWDO FXUUHQW GXULQJ DFFHOHUDWHG SURJUDPPLQJ LV WKH VXP RI 9$&& DQG 9&& FXUUHQWV 9$&& 9++ RQ $&& LQSXW
December 3, 2005 S29WS-N_m0_I0
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Preliminary
16.8
AC Characteristics
&/. &KDUDFWHUL]DWLRQ
Parameter Description 54 MHz 66 MHz 80 MHz Unit
I&/. W&/. W&+ W&/ W&5 W&)
1RWH 1RW
&/. )UHTXHQF\ &/. 3HULRG &/. +LJK 7LPH &/. /RZ 7LPH &/. 5LVH 7LPH &/. )DOO 7LPH
WHVWHG
0D[ 0LQ 0LQ

0+] QV QV
0D[
QV
tCLK tCH tCL
CLK
tCR
tCF
Figure 16.6. CLK Characterization
76
S29WS-N_m0_I0 December 3, 2005
Preliminary
6\QFKURQRXV%XUVW 5HDG
Parameter JEDEC Standard Description 54 MHz 66 MHz 80 MHz Unit
W,$&& W%$&& W$&6 W$&+ W%'+ W&5 W2( W&(= W2(= W&(6 W5'<6 W5$&& W&$6 W$9& W$9' W$9'+ I&/.
/DWHQF\ %XUVW $FFHVV 7LPH 9DOLG &ORFN WR 2XWSXW 'HOD\ $GGUHVV 6HWXS 7LPH WR &/. 1RWH $GGUHVV +ROG 7LPH IURP &/. 1RWH 'DWD +ROG 7LPH IURP 1H[W &ORFN &\FOH &KLS (QDEOH WR 5'< 9DOLG 2XWSXW (QDEOH WR 2XWSXW 9DOLG &KLS (QDEOH WR +LJK = 1RWH 2XWSXW (QDEOH WR +LJK = 1RWH &( 6HWXS 7LPH WR &/.
0D[ 0D[ 0LQ 0LQ 0LQ 0D[ 0D[ 0D[ 0D[ 0LQ 0LQ 0D[ 0LQ 0LQ 0LQ 0LQ 0LQ

QV QV QV QV QV QV QV QV QV QV QV QV QV QV QV QV
0+]
5'< 6HWXS 7LPH WR &/. 5HDG\ $FFHVV 7LPH IURP &/. &( $9' $9' $9' 6HWXS 7LPH WR $9' /RZ WR &/. 3XOVH +ROG
0LQLPXP FORFN IUHTXHQF\
1RWHV $GGUHVVHV DUH ODWFKHG RQ WKH ILUVW ULVLQJ HGJH RI &/. 1RW WHVWHG
Table 16.2 Synchronous Wait State Requirements
0D[ )UHTXHQF\ 0+] )UHT 0+] 0+] )UHT 0+] 0+] )UHT 0+] 0+] )UHT 0+] 0+] )UHT 0+] 0+] )UHT 0+] :DLW 6WDWH 5HTXLUHPHQW
December 3, 2005 S29WS-N_m0_I0
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Preliminary
7LPLQJ 'LDJUDPV
5 cycles for initial access shown.
tCES CE# 1 CLK tAVC AVD# tACS Addresses
Aa
18.5 ns typ. (54 MHz)
tCEZ 6 7
2
3
4
5
tAVD tAVDH
tACH Data (n) tIACC OE# tOE RDY (n)
Hi-Z Da Da + 1
tBACC
Hi-Z Da + 2 Da + 3 Da + n
tBDH tRACC
tOEZ
Hi-Z
tCR
tRDYS
Hi-Z Da Da + 1 Da + 2 Da + 2 Da + n
Data (n + 1)
RDY (n + 1)
Hi-Z
Hi-Z
Data (n + 2)
Da Da + 1 Da + 1 Da + 1 Da + n
Hi-Z
RDY (n + 2)
Hi-Z
Hi-Z
Data (n + 3)
Da Da Da Da Da + n
Hi-Z
RDY (n + 3)
Hi-Z
Hi-Z
1RWHV )LJXUH VKRZV WRWDO QXPEHU RI ZDLW VWDWHV VHW WR ILYH F\FOHV 7KH WRWDO QXPEHU RI ZDLW VWDWHV FDQ EH SURJUDPPHG IURP WZR F\FOHV WR VHYHQ F\FOHV ,I DQ\ EXUVW DGGUHVV RFFXUV DW DGGUHVV DGGUHVV RU DGGUHVV DGGLWLRQDO FORFN GHOD\ F\FOHV DUH LQVHUWHG DQG DUH LQGLFDWHG E\ 5'< 7KH GHYLFH LV LQ V\QFKURQRXV PRGH
Figure 16.7.
CLK Synchronous Burst Mode Read
78
S29WS-N_m0_I0 December 3, 2005
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tCES CE# 1 CLK tAVC AVD# tACS Addresses
Ac
7 cycles for initial access shown.
2
tAVDH
3
4
5
6
7
tAVD
tACH Data tIACC OE# tCR RDY
Hi-Z DC DD
tBACC
DE
DF
D8
DB
tBDH tRACC
tOE
tRACC
tRDYS
1RWHV

)LJXUH VKRZV WRWDO QXPEHU RI ZDLW VWDWHV VHW WR VHYHQ F\FOHV 7KH WRWDO QXPEHU RI ZDLW VWDWHV FDQ EH SURJUDPPHG IURP WZR F\FOHV WR VHYHQ F\FOHV ,I DQ\ EXUVW DGGUHVV RFFXUV DW DGGUHVV DGGUHVV RU DGGUHVV DGGLWLRQDO FORFN GHOD\ F\FOHV DUH LQVHUWHG DQG DUH LQGLFDWHG E\ 5'< 7KH GHYLFH LV LQ V\QFKURQRXV PRGH ZLWK ZUDS DURXQG '') LQ GDWD ZDYHIRUP LQGLFDWH WKH RUGHU RI GDWD ZLWKLQ D JLYHQ ZRUG DGGUHVV UDQJH IURP ORZHVW WR KLJKHVW 6WDUWLQJ DGGUHVV LQ ILJXUH LV WKH WK DGGUHVV LQ UDQJH )
Figure 16.8.
tCES CE# 1 CLK tAVC AVD# tACS Addresses
Ac 7
8-word Linear Burst with Wrap Around
cycles for initial access shown.
2
3
4
5
6
7
tAVDH
tAVD
tACH Data tIACC OE# tCR RDY
Hi-Z DC DD
tBACC
DE
DF
D8
DB
tBDH
tOE
tRACC
tRACC
tRDYS
1RWHV

)LJXUH VKRZV WRWDO QXPEHU RI ZDLW VWDWHV VHW WR VHYHQ F\FOHV 7KH WRWDO QXPEHU RI ZDLW VWDWHV FDQ EH SURJUDPPHG IURP WZR F\FOHV WR VHYHQ F\FOHV &ORFN LV VHW IRU DFWLYH ULVLQJ HGJH ,I DQ\ EXUVW DGGUHVV RFFXUV DW DGGUHVV DGGUHVV RU DGGUHVV DGGLWLRQDO FORFN GHOD\ F\FOHV DUH LQVHUWHG DQG DUH LQGLFDWHG E\ 5'< 7KH GHYLFH LV LQ DV\QFKURQRXV PRGH ZLWK RXW ZUDS DURXQG '&' LQ GDWD ZDYHIRUP LQGLFDWH WKH RUGHU RI GDWD ZLWKLQ D JLYHQ ZRUG DGGUHVV UDQJH IURP ORZHVW WR KLJKHVW 6WDUWLQJ DGGUHVV LQ ILJXUH LV WKH VW DGGUHVV LQ UDQJH F
Figure 16.9.
8-word Linear Burst without Wrap Around
December 3, 2005 S29WS-N_m0_I0
79
Preliminary
tCES CE# ~ ~ ~ ~ 1 CLK tAVC AVD# tACS Addresses
Aa
6 wait cycles for initial access shown.
tCEZ 7
~ ~
5 ~ ~
6
tAVDH
tAVD
tACH Data tIACC OE# tCR RDY
Hi-Z Da Da+1
tBACC
Hi-Z Da+2 Da+3 Da + n
tBDH tRACC tOE
tOEZ
Hi-Z
tRDYS
1RWHV

)LJXUH DVVXPHV ZDLW VWDWHV IRU LQLWLDO DFFHVV DQG V\QFKURQRXV UHDG 7KH 6HW &RQILJXUDWLRQ 5HJLVWHU FRPPDQG VHTXHQFH KDV EHHQ ZULWWHQ ZLWK &5 GHYLFH RXWSXWV 5'< RQH F\FOH EHIRUH YDOLG GDWD
Figure 16.10.
Linear Burst with RDY Set One Cycle Before Data
$& &KDUDFWHULVWLFV$V\QFKURQRXV 5HDG
3DUDPHWHU -('(& 6WDQGDUG W&( W$&& W$9'3 W$$9'6 W$$9'+ W2( W2(+ W2(= W&$6 W3$&& W2+ $FFHVV 7LPH IURP &( $9' /RZ 7LPH 'HVFULSWLRQ /RZ 0D[ 0D[ 0LQ 0LQ 0LQ 0D[ 5HDG 2XWSXW (QDEOH +ROG 7LPH 2XWSXW (QDEOH WR +LJK = VHH 1RWH &( 6HWXS 7LPH WR $9' 7RJJOH DQG 'DWD 3ROOLQJ 0LQ 0LQ 0D[ 0LQ 0D[ 0LQ 0D[ 0+] 0+] 0+] 8QLW QV QV QV QV QV QV QV QV QV QV QV QV QV
$V\QFKURQRXV $FFHVV 7LPH $GGUHVV 6HWXS 7LPH WR 5LVLQJ (GJH RI $9' $GGUHVV +ROG 7LPH IURP 5LVLQJ (GJH RI $9' 2XWSXW (QDEOH WR 2XWSXW 9DOLG
3DJH $FFHVV 7LPH 2XWSXW +ROG 7LPH )URP $GGUHVVHV &( RU 2( ZKLFKHYHU RFFXUV ILUVW 1RWH &KLS (QDEOH WR 2XWSXW 7ULVWDWH
W&(=
1RWHV
1RW WHVWHG
W2(+
QV IRU 6:61
80
S29WS-N_m0_I0 December 3, 2005
Preliminary
CE# tOE tOEH WE# Data tACC Addresses tCAS AVD# tAVDP tAAVDS
1RWH 5$ 5HDG $GGUHVV 5' 5HDG 'DWD
OE#
tCE Valid RD
tOEZ
RA tAAVDH
Figure 16.11. Asynchronous Mode Read
A22-A2
~ ~
tCE
CE# ~ ~
tACC tCOEZ Optional tOE tPACC tOEZ tPACC
OE# ~ ~ ~ ~
WE#
~ ~
AVD#
~ ~
A1-A0
~ ~
~ ~
Same Page Address
A0
A1
A2
A3
tOH
tOEZ
tPACC
Data
D0
D1
D1
tOH
D2
tOH
D3
~ ~
Figure 16.12. Four-Word Page-Mode Operation
December 3, 2005 S29WS-N_m0_I0
81
Preliminary
+DUGZDUH 5HVHW 5(6(7
Parameter JEDEC Std. Description All Speed Options Unit
W53 W5+
1RWH 1RW
5(6(7
3XOVH :LGWK
0LQ 0LQ

V QV
5HVHW +LJK 7LPH %HIRUH 5HDG 6HH 1RWH
WHVWHG
CE#, OE# tRH RESET# tRP
Figure 16.13.
Reset Timings
82
S29WS-N_m0_I0 December 3, 2005
Preliminary
Parameter JEDEC
W$9$9 W$9:/ W:/$;
(UDVH3URJUDP 7LPLQJ
Description
:ULWH &\FOH 7LPH 1RWH $GGUHVV 6HWXS 7LPH 1RWHV $GGUHVV +ROG 7LPH 1RWHV $9' /RZ 7LPH 6\QFKURQRXV $V\QFKURQRXV 6\QFKURQRXV $V\QFKURQRXV 0LQ 0LQ 0LQ 0LQ 0LQ 0LQ 0LQ 0LQ 0LQ 0LQ 0LQ 0LQ 0LQ 0LQ 0LQ 0LQ 0LQ 0LQ 0LQ 0LQ 0D[ 0D[ 0D[ 0D[ 7\S 7\S
Standard
W:& W$6 W$+ W$9'3
54 MHz
66 MHz

80 MHz
Unit
QV QV QV QV QV QV QV QV QV QV QV QV QV QV V QV QV QV QV QV QV QV V V V V V
W'9:+ W:+'; W*+:/ W:+(+ W:/:+ W:+:/
W'6 W'+ W*+:/ W&$6 W&+ W:3 W:3+ W65: W9,' W9,'6
'DWD 6HWXS 7LPH 'DWD +ROG 7LPH 5HDG 5HFRYHU\ 7LPH %HIRUH :ULWH &( &( 6HWXS 7LPH WR $9' +ROG 7LPH
:ULWH 3XOVH :LGWK :ULWH 3XOVH :LGWK +LJK /DWHQF\ %HWZHHQ 5HDG DQG :ULWH 2SHUDWLRQV 9$&& 5LVH DQG )DOO 7LPH 9$&& 6HWXS 7LPH 'XULQJ $FFHOHUDWHG 3URJUDPPLQJ &( $9' $9' $9' $9' 6HWXS 7LPH WR :( 6HWXS 7LPH WR :( +ROG 7LPH WR :( 6HWXS 7LPH WR &/. +ROG 7LPH WR &/.
W(/:/
W&6 W$96: W$9+: W$96& W$9+& W&6: W:(3 W6($ W(6/ W36/ W$63 W363
&ORFN 6HWXS 7LPH WR :( 1RLVH 3XOVH 0DUJLQ RQ :( 6HFWRU (UDVH $FFHSW 7LPHRXW (UDVH 6XVSHQG /DWHQF\ 3URJUDP 6XVSHQG /DWHQF\ 7RJJOH 7LPH 'XULQJ (UDVH ZLWKLQ D 3URWHFWHG 6HFWRU 7RJJOH 7LPH 'XULQJ 3URJUDPPLQJ :LWKLQ D 3URWHFWHG 6HFWRU
1RWHV

1RW WHVWHG $V\QFKURQRXV UHDG PRGH DOORZV $V\QFKURQRXV SURJUDP RSHUDWLRQ RQO\ 6\QFKURQRXV UHDG PRGH DOORZV ERWK $V\QFKURQRXV DQG 6\QFKURQRXV SURJUDP RSHUDWLRQ ,Q DV\QFKURQRXV SURJUDP RSHUDWLRQ WLPLQJ DGGUHVVHV DUH ODWFKHG RQ WKH IDOOLQJ HGJH RI :( ,Q V\QFKURQRXV SURJUDP RSHUDWLRQ WLPLQJ DGGUHVVHV DUH ODWFKHG RQ WKH ULVLQJ HGJH RI &/. 6HH WKH (UDVH DQG 3URJUDPPLQJ 3HUIRUPDQFH VHFWLRQ IRU PRUH LQIRUPDWLRQ 'RHV QRW LQFOXGH WKH SUHSURJUDPPLQJ WLPH
December 3, 2005 S29WS-N_m0_I0
83
Preliminary
VIH
Erase Command Sequence (last two cycles)
Read Status Data
CLK
VIL
tAVDP AVD# tAS Addresses 2AAh tAH SA
555h for chip erase 10h for chip erase
VA
In Progress
VA
Data
55h
30h tDS tDH
Complete
CE#
OE# tWP WE# tCS tVCS VCC
tCH
tWHWH2 tWPH tWC
Figure 16.14. Chip/Sector Erase Operation Timings
84
S29WS-N_m0_I0 December 3, 2005
Preliminary
Program Command Sequence (last two cycles)
Read Status Data
VIH
CLK
VIL
tAVSW tAVDP tAVHW
AVD# tAS tAH Addresses 555h PA VA
In Progress
VA
Data tCAS CE#
A0h tDS tDH
PD
Complete
OE# tWP WE#
tCH
tWHWH1 tCS tWC tVCS VCC tWPH
1RWHV
3$
3URJUDP $GGUHVV 3'
3URJUDP 'DWD 9$
9DOLG $GGUHVV IRU UHDGLQJ VWDWXV ELWV
,Q SURJUHVV DQG FRPSOHWH UHIHU WR VWDWXV RI SURJUDP RSHUDWLRQ $$ IRU WKH :61 $$ IRU WKH :61 DUH GRQW FDUH GXULQJ FRPPDQG VHTXHQFH XQORFN F\FOHV &/. FDQ EH HLWKHU 9,/ RU 9,+ 7KH $V\QFKURQRXV SURJUDPPLQJ RSHUDWLRQ LV LQGHSHQGHQW RI WKH 6HW 'HYLFH 5HDG 0RGH ELW LQ WKH &RQILJXUDWLRQ 5HJLVWHU
Figure 16.15.
Program Operation Timing Using AVD#
December 3, 2005 S29WS-N_m0_I0
85
Preliminary
Program Command Sequence (last two cycles) tAVCH CLK tAS tAH tAVSC AVD# tAVDP Addresses 555h PA VA
Read Status Data
VA
In Progress
Data tCAS CE#
A0h
PD tDS tDH
Complete
OE#
tCSW tWP
tCH
WE# tWHWH1 tWPH tWC
tVCS VCC
1RWHV
3$
3URJUDP $GGUHVV 3'
3URJUDP 'DWD 9$
9DOLG $GGUHVV IRU UHDGLQJ VWDWXV ELWV
,Q SURJUHVV DQG FRPSOHWH UHIHU WR VWDWXV RI SURJUDP RSHUDWLRQ $$ IRU WKH :61 $$ IRU WKH :61 DUH GRQW FDUH GXULQJ FRPPDQG VHTXHQFH XQORFN F\FOHV $GGUHVVHV DUH ODWFKHG RQ WKH ILUVW ULVLQJ HGJH RI &/. (LWKHU &( RU $9' LV UHTXLUHG WR JR IURP ORZ WR KLJK LQ EHWZHHQ SURJUDPPLQJ FRPPDQG VHTXHQFHV 7KH 6\QFKURQRXV SURJUDPPLQJ RSHUDWLRQ LV GHSHQGHQW RI WKH 6HW 'HYLFH 5HDG 0RGH ELW LQ WKH &RQILJXUDWLRQ 5HJLVWHU 7KH &RQILJXUDWLRQ 5HJLVWHU PXVW EH VHW WR WKH 6\QFKURQRXV 5HDG 0RGH
Figure 16.16. Program Operation Timing Using CLK in Relationship to AVD#
86
S29WS-N_m0_I0 December 3, 2005
Preliminary
CE#
AVD# WE# Addresses Data Don't Care A0h
PA Don't Care PD Don't Care
OE# ACC
VID
tVIDS tVID
VIL or VIH
1RWH 8VH VHWXS DQG KROG WLPHV IURP FRQYHQWLRQDO SURJUDP RSHUDWLRQ
Figure 16.17. Accelerated Unlock Bypass Programming Timing
AVD# tCE CE# tCH OE# tOEH WE# tACC Addresses VA VA
High Z
tCEZ
tOE
tOEZ
High Z
Data
1RWHV

Status Data
Status Data
6WDWXV UHDGV LQ ILJXUH DUH VKRZQ DV DV\QFKURQRXV 9$ 9DOLG $GGUHVV 7ZR UHDG F\FOHV DUH UHTXLUHG WR GHWHUPLQH VWDWXV :KHQ WKH (PEHGGHG $OJRULWKP RSHUDWLRQ LV FRPSOHWH DQG 'DWD 3ROOLQJ RXWSXWV WUXH GDWD
Figure 16.18.
Data# Polling Timings (During Embedded Algorithm)
December 3, 2005 S29WS-N_m0_I0
87
Preliminary
AVD# tCE CE# tCH OE# tOEH WE# tACC Addresses VA VA
High Z
tCEZ
tOE
tOEZ
Data
High Z
Status Data
Status Data
1RWHV

6WDWXV UHDGV LQ ILJXUH DUH VKRZQ DV DV\QFKURQRXV 9$ 9DOLG $GGUHVV 7ZR UHDG F\FOHV DUH UHTXLUHG WR GHWHUPLQH VWDWXV :KHQ WKH (PEHGGHG $OJRULWKP RSHUDWLRQ LV FRPSOHWH WKH WRJJOH ELWV VWRS WRJJOLQJ
Figure 16.19. Toggle Bit Timings (During Embedded Algorithm)
CE#
CLK
AVD#
Addresses
VA
VA
OE#
tIACC tIACC Status Data Status Data
Data
RDY
1RWHV

7KH WLPLQJV DUH VLPLODU WR V\QFKURQRXV UHDG WLPLQJV 9$ 9DOLG $GGUHVV 7ZR UHDG F\FOHV DUH UHTXLUHG WR GHWHUPLQH VWDWXV :KHQ WKH (PEHGGHG $OJRULWKP RSHUDWLRQ LV FRPSOHWH WKH WRJJOH ELWV VWRS WRJJOLQJ 5'< LV DFWLYH ZLWK GDWD ' LQ WKH &RQILJXUDWLRQ 5HJLVWHU :KHQ ' LQ WKH &RQILJXUDWLRQ 5HJLVWHU 5'< LV DFWLYH RQH FORFN F\FOH EHIRUH GDWD
Figure 16.20. Synchronous Data Polling Timings/Toggle Bit Timings
88
S29WS-N_m0_I0 December 3, 2005
Preliminary
0ns ADDR CE# AVD# OE#
20ns
40ns
60ns
80ns
100ns
120ns
140ns
160ns
180ns
200ns
1RWH '4 GRHV QRW WRJJOH FRUUHFWO\ GXULQJ HUDVH VXVSHQG LI $9'
DGGUHVV
RU &(
DUH KHOG ORZ DIWHU YDOLG
Figure 16.21.
Conditions for Incorrect DQ2 Polling During Erase Suspend
0ns ADDR
CE# AVD# OE#
20ns
40ns
60ns
80ns
100ns
120ns
140ns
160ns
180ns
200ns
2
1RWH '4 SROOLQJ GXULQJ HUDVH VXVSHQG EHKDYHV QRUPDOO\ LI &(
HYHQ LI $9' GRHV QRW
SXOVHV ORZ DW RU DIWHU YDOLG $GGUHVV
Figure 16.22.
Correct DQ2 Polling during Erase Suspend #1
0ns ADDR
20ns
40ns
60ns
80ns
100ns
120ns
140ns
160ns
180ns
200ns
CE# AVD# OE#
1RWH '4 SROOLQJ GXULQJ HUDVH VXVSHQG EHKDYHV QRUPDOO\ LI $9' SXOVHV ORZ DW RU DIWHU YDOLG $GGUHVV
HYHQ LI &( GRHV QRW
Figure 16.23. Correct DQ2 Polling during Erase Suspend #2
0ns ADDR
CE# AVD# OE#
20ns
40ns
60ns
80ns
100ns
120ns
140ns
160ns
180ns
200ns
1RWH '4 SROOLQJ GXULQJ HUDVH VXVSHQG EHKDYHV QRUPDOO\ LI ERWK $9'
YDOLG $GGUHVV
DQG &(
SXOVH ORZ DW RU DIWHU
Figure 16.24.
Correct DQ2 Polling during Erase Suspend #3
December 3, 2005 S29WS-N_m0_I0
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Preliminary
Enter Embedded Erasing WE#
Erase Suspend Erase
Enter Erase Suspend Program Erase Suspend Program
Erase Resume Erase Suspend Read Erase Erase Complete
Erase Suspend Read
DQ6
DQ2
1RWH '4 WRJJOHV RQO\ ZKHQ UHDG DW DQ DGGUHVV ZLWKLQ DQ HUDVHVXVSHQGHG VHFWRU 7KH V\VWHP PD\ XVH 2( WR WRJJOH '4 DQG '4 RU &(
Figure 16.25. DQ2 vs. DQ6
Address boundary occurs every 128 words, beginning at address 00007Fh: (0000FFh, 00017Fh, etc.) Address 000000h is also a boundary crossing.
C124 CLK Address (hex) AVD# 7C (stays high)
C125 7D
C126 7E
C127 7F
C127 7F
C128 80
C129 81
C130 82
C131 83
tRACC RDY(1) tRACC RDY(2)
latency latency
tRACC
tRACC
Data
D124
D125
D126
D127
D128
D129
D130
OE#, CE#
(stays low)
1RWHV

5'< DFWLYH ZLWK GDWD ' LQ WKH &RQILJXUDWLRQ 5HJLVWHU 5'< DFWLYH RQH FORFN F\FOH EHIRUH GDWD ' LQ WKH &RQILJXUDWLRQ 5HJLVWHU &[[ LQGLFDWHV WKH FORFN WKDW WULJJHUV '[[ RQ WKH RXWSXWV IRU H[DPSOH & WULJJHUV ' )LJXUH VKRZV WKH GHYLFH QRW FURVVLQJ D EDQN LQ WKH SURFHVV RI SHUIRUPLQJ DQ HUDVH RU SURJUDP 5'< GRHV QRW JR ORZ DQG QR DGGLWLRQDO ZDLW VWDWHV DUH UHTXLUHG IRU :6
Figure 16.26. Latency with Boundary Crossing when Frequency > 66 MHz
90
S29WS-N_m0_I0 December 3, 2005
Preliminary
Address boundary occurs every 128 words, beginning at address 00007Fh: (0000FFh, 00017Fh, etc.) Address 000000h is also a boundary crossing.
C124 CLK Address (hex) AVD# 7C (stays high)
C125 7D
C126 7E
C127 7F
C127 7F
tRACC RDY(1) tRACC RDY(2)
latency latency
tRACC
tRACC
Data
D124
D125
D126
D127
Read Status
OE#, CE#
1RWHV

(stays low)
5'< DFWLYH ZLWK GDWD ' LQ WKH &RQILJXUDWLRQ 5HJLVWHU 5'< DFWLYH RQH FORFN F\FOH EHIRUH GDWD ' LQ WKH &RQILJXUDWLRQ 5HJLVWHU &[[ LQGLFDWHV WKH FORFN WKDW WULJJHUV '[[ RQ WKH RXWSXWV IRU H[DPSOH & WULJJHUV ' )LJXUH VKRZV WKH GHYLFH FURVVLQJ D EDQN LQ WKH SURFHVV RI SHUIRUPLQJ DQ HUDVH RU SURJUDP 5'< GRHV QRW JR ORZ DQG QR DGGLWLRQDO ZDLW VWDWHV DUH UHTXLUHG IRU :6
Figure 16.27. Latency with Boundary Crossing into Program/Erase Bank
December 3, 2005 S29WS-N_m0_I0
91
Preliminary
Data
D0
D1
AVD#
Rising edge of next clock cycle following last wait state triggers next burst data total number of clock cycles following addresses being latched
OE# 1 CLK 0 1 2 3
4
5
6
7
2
3
4
5
number of clock cycles programmed
:DLW 6WDWH &RQILJXUDWLRQ 5HJLVWHU 6HWXS ' ' ' 5HVHUYHG ' ' ' 5HVHUYHG ' ' ' SURJUDPPHG WRWDO ' ' ' SURJUDPPHG WRWDO ' ' ' SURJUDPPHG WRWDO 1RWH )LJXUH DVVXPHV DGGUHVV ' LV QRW DW DQ DGGUHVV ERXQGDU\ DQG ZDLW VWDWH LV VHW WR
Figure 16.28.
Example of Wait States Insertion
92
S29WS-N_m0_I0 December 3, 2005
Preliminary
Last Cycle in Program or Sector Erase Command Sequence
Read status (at least two cycles) in same bank and/or array data from other bank
Begin another write or program command sequence
tWrite Cycle
tRead Cycle
tRead Cycle
tWrite Cycle
CE#
OE# tOE tOEH WE# tWPH tWP tDS
PD/30h
tGHWL
tACC tDH
RD
tOEZ tOEH
RD AAh
Data
tSR/W Addresses
PA/SA RA RA 555h
tAS AVD# tAH 1RWH %UHDNSRLQWV LQ ZDYHIRUPV LQGLFDWH WKDW V\VWHP PD\ DOWHUQDWHO\ UHDG DUUD\ GDWD IURP WKH QRQEXV\ EDQN ZKLOH FKHFNLQJ WKH VWDWXV RI WKH SURJUDP RU HUDVH RSHUDWLRQ LQ WKH EXV\ EDQN 7KH V\VWHP VKRXOG UHDG VWDWXV WZLFH WR HQVXUH YDOLG LQIRUPDWLRQ
Figure 16.29.
Back-to-Back Read/Write Cycle Timings
December 3, 2005 S29WS-N_m0_I0
93
Preliminary
(UDVH DQG 3URJUDPPLQJ 3HUIRUPDQFH
Parameter Typ (Note 1) Max (Note 2) Unit Comments
6HFWRU (UDVH 7LPH
.ZRUG .ZRUG
9&& 9&& 9&&
:61 :61 :61 :61 :61 :61 :61 :61
:61 :61 :61 :61 :61 :61 :61 :61
V ([FOXGHV K SURJUDPPLQJ SULRU WR HUDVXUH 1RWH
&KLS (UDVH 7LPH $&& 6LQJOH :RUG 3URJUDPPLQJ 7LPH 1RWH (IIHFWLYH :RUG 3URJUDPPLQJ 7LPH XWLOL]LQJ 3URJUDP :ULWH %XIIHU 7RWDO :RUG %XIIHU 3URJUDPPLQJ 7LPH 9&& $&& 9&& $&& 9&& $&& 9&& &KLS 3URJUDPPLQJ 7LPH 1RWH $&&
V
V
V
V
V
([FOXGHV V\VWHP OHYHO RYHUKHDG 1RWH
1RWHV 7\SLFDO SURJUDP DQG HUDVH WLPHV DVVXPH WKH IROORZLQJ FRQGLWLRQV & 9 9&& F\FOHV FKHFNHUERDUG GDWD SDWWHUQ 8QGHU ZRUVW FDVH FRQGLWLRQV RI & 9&& 9 F\FOHV 7\SLFDO FKLS SURJUDPPLQJ WLPH LV FRQVLGHUDEO\ OHVV WKDQ WKH PD[LPXP FKLS SURJUDPPLQJ WLPH OLVWHG DQG LV EDVHG RQ XWLOL]LQJ WKH :ULWH %XIIHU ,Q WKH SUHSURJUDPPLQJ VWHS RI WKH (PEHGGHG (UDVH DOJRULWKP DOO ZRUGV DUH SURJUDPPHG WR K EHIRUH HUDVXUH 6\VWHPOHYHO RYHUKHDG LV WKH WLPH UHTXLUHG WR H[HFXWH WKH WZR RU IRXUEXVF\FOH VHTXHQFH IRU WKH SURJUDP FRPPDQG 6HH WKH $SSHQGL[ IRU IXUWKHU LQIRUPDWLRQ RQ FRPPDQG GHILQLWLRQV 5HIHU WR $SSOLFDWLRQ 1RWH (UDVH 6XVSHQG5HVXPH 7LPLQJ IRU PRUH GHWDLOV :RUG SURJUDPPLQJ VSHFLILFDWLRQ LV EDVHG XSRQ D VLQJOH ZRUG SURJUDPPLQJ RSHUDWLRQ QRW XWLOL]LQJ WKH ZULWH EXIIHU
94
S29WS-N_m0_I0 December 3, 2005
Preliminary
%*$ %DOO &DSDFLWDQFH
Parameter Symbol
Parameter Description
Test Setup
Typ.
Max
Unit
&,1 &287 &,1
,QSXW &DSDFLWDQFH 2XWSXW &DSDFLWDQFH &RQWURO 3LQ &DSDFLWDQFH
WHVWHG & I 0+]
9,1 9287 9,1

S) S) S)
1RWHV 6DPSOHG QRW 7HVW FRQGLWLRQV 7$
December 3, 2005 S29WS-N_m0_I0
95
Preliminary
17 Appendix
7KLV VHFWLRQ FRQWDLQV LQIRUPDWLRQ UHODWLQJ WR VRIWZDUH FRQWURO RU LQWHUIDFLQJ ZLWK WKH )ODVK GHYLFH )RU DGGLWLRQDO LQIRUPDWLRQ DQG DVVLVWDQFH UHJDUGLQJ VRIWZDUH VHH WKH $GGLWLRQDO 5HVRXUFHV VHF WLRQ RQ SDJH RU H[SORUH WKH :HE DW ZZZDPGFRP DQG ZZZIXMLWVXFRP
96
S29WS-N_m0_I0 December 3, 2005
Preliminary
Table 17.1
&\FOHV &RPPDQG 6HTXHQFH 1RWHV $V\QFKURQRXV 5HDG 5HVHW 0DQXIDFWXUHU ,' 'HYLFH ,' ,QGLFDWRU %LWV )LUVW $GGU 'DWD 5$ 5' ;;; ) $$ $$ 6$ %$ %$ >%$@ ;;; ;;; ;;; 6$ $$ $$ $$ $$ $$ $$ % $$ $$ $$ $ $$ $$ 'DWD $$
Memory Array Commands
6HFRQG $GGU 'DWD %XV &\FOHV 1RWHV 7KLUG )RXUWK $GGU 'DWD $GGU 'DWD )LIWK $GGU 'DWD 6L[WK $GGU 'DWD
$XWR VHOHFW

$$ $$ $$ $$ $$ $$ $$ $$

>%$@ >%$@ >%$@ 3$
$ )
>%$@; >%$@; >%$@; 3$ 3$
( 'DWD 3' :&
%$;(
'DWD
%$;)
8QORFN %\SDVV 0RGH
3URJUDP :ULWH WR %XIIHU 3URJUDP %XIIHU WR )ODVK :ULWH WR %XIIHU $ERUW 5HVHW &KLS (UDVH 6HFWRU (UDVH (UDVH3URJUDP 6XVSHQG (UDVH3URJUDP 5HVXPH 6HW &RQILJXUDWLRQ 5HJLVWHU 5HDG &RQILJXUDWLRQ 5HJLVWHU &), 4XHU\ (QWU\ 3URJUDP &), 5HVHW (QWU\ 3URJUDP 5HDG ([LW
3$
3'
:%/
3'

$$ $$
$$ $$

6$

$$ $$ $$ 3$ ;;; $$ $$ $$
3'

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; ;
&5 &5
6HFXUHG 6LOLFRQ 6HFWRU

$
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December 3, 2005 S29WS-N_m0_I0
97
Preliminary
Table 17.2. Sector Protection Commands
&RPPDQG 6HTXHQFH 1RWHV &RPPDQG 6HW (QWU\ /RFN 3URJUDP 5HJLVWHU 5HDG %LWV &RPPDQG 6HW ([LW &RPPDQG 6HW (QWU\ 3URJUDP >@ 3DVVZRUG 5HDG 3URWHFWLRQ 8QORFN &RPPDQG 6HW ([LW &RPPDQG 6HW (QWU\ 33% 3URJUDP 1RQ9RODWLOH 6HFWRU $OO 33% (UDVH 3URWHFWLRQ 33% 33% 6WDWXV 5HDG &RPPDQG 6HW ([LW *OREDO &RPPDQG 6HW (QWU\ 9RODWLOH 6HFWRU 33% /RFN %LW 6HW 3URWHFWLRQ 33% /RFN %LW 6WDWXV 5HDG )UHH]H &RPPDQG 6HW ([LW 33% /RFN 9RODWLOH 6HFWRU 3URWHFWLRQ '<% &RPPDQG 6HW (QWU\ '<% 6HW '<% &OHDU '<% 6WDWXV 5HDG &RPPDQG 6HW ([LW )LUVW $GGU 'DWD $$ ;; $ GDWD ;; $$ ;; $ 3:' ;; $$ ;; $ ;; 6$ 5' ;; $$ ;; $ %$ 5' ;; ;; ;; 6$ ;; $$ $ $ 5' 6HFRQG $GGU 'DWD $$ GDWD %XV &\FOHV 1RWHV 7KLUG )RXUWK )LIWK $GGU 'DWD $GGU 'DWD $GGU 'DWD &\FOHV 6L[WK $GGU 'DWD 6HYHQWK $GGU 'DWD

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%$ %DQN $GGUHVV :61 $$ :61 $$ 3:'3:' 3DVVZRUG 'DWD 3'3' SUHVHQW IRXU ELW FRPELQDWLRQV WKDW UHSUHVHQW WKH ELW 3DVVZRUG 3:$ 3DVVZRUG $GGUHVV $GGUHVV ELWV $ DQG $ DUH XVHG WR VHOHFW HDFK ELW SRUWLRQ RI WKH ELW HQWLW\ 3:' 3DVVZRUG 'DWD 5' 5' 5' '4 '4 RU '4 SURWHFWLRQ LQGLFDWRU ELW ,I SURWHFWHG '4 '4 RU '4 ,I XQSURWHFWHG '4 '4 '4 (QWLUH WZR EXVF\FOH VHTXHQFH PXVW EH HQWHUHG IRU HDFK SRUWLRQ RI WKH SDVVZRUG )XOO DGGUHVV UDQJH LV UHTXLUHG IRU UHDGLQJ SDVVZRUG 6HH )LJXUH IRU GHWDLOV $OO 33% (UDVH FRPPDQG SUHSURJUDPV DOO 33%V EHIRUH HUDVXUH WR SUHYHQW RYHUHUDVXUH 7KH VHFRQG F\FOH DGGUHVV IRU WKH ORFN UHJLVWHU SURJUDP RSHUDWLRQ LV IRU 6:61 KRZHYHU IRU :61 WKLV DGGUHVV LV
98
S29WS-N_m0_I0 December 3, 2005
Preliminary
17.1
Common Flash Memory Interface
7KH &RPPRQ )ODVK ,QWHUIDFH &), VSHFLILFDWLRQ RXWOLQHV GHYLFH DQG KRVW V\VWHP VRIWZDUH LQWHU URJDWLRQ KDQGVKDNH ZKLFK DOORZV VSHFLILF YHQGRUVSHFLILHG VRIWZDUH DOJRULWKPV WR EH XVHG IRU HQWLUH IDPLOLHV RI GHYLFHV 6RIWZDUH VXSSRUW FDQ WKHQ EH GHYLFHLQGHSHQGHQW -('(& ,'LQGHSHQ GHQW DQG IRUZDUG DQG EDFNZDUGFRPSDWLEOH IRU WKH VSHFLILHG IODVK GHYLFH IDPLOLHV )ODVK YHQGRUV FDQ VWDQGDUGL]H WKHLU H[LVWLQJ LQWHUIDFHV IRU ORQJWHUP FRPSDWLELOLW\ 7KLV GHYLFH HQWHUV WKH &), 4XHU\ PRGH ZKHQ WKH V\VWHP ZULWHV WKH &), 4XHU\ FRPPDQG K WR DGGUHVV %$K DQ\ WLPH WKH GHYLFH LV UHDG\ WR UHDG DUUD\ GDWD 7KH V\VWHP FDQ UHDG &), LQIRUPDWLRQ DW WKH DGGUHVVHV JLYHQ LQ 7DEOHV ZLWKLQ WKDW EDQN $OO UHDGV RXWVLGH RI WKH &), DGGUHVV UDQJH ZLWKLQ WKH EDQN UHWXUQV QRQYDOLG GDWD 5HDGV IURP RWKHU EDQNV DUH DO ORZHG ZULWHV DUH QRW 7R WHUPLQDWH UHDGLQJ &), GDWD WKH V\VWHP PXVW ZULWH WKH UHVHW FRPPDQG 7KH IROORZLQJ LV D & VRXUFH FRGH H[DPSOH RI XVLQJ WKH &), (QWU\ DQG ([LW IXQFWLRQV 5HIHU WR WKH 6SDQVLRQ /RZ /HYHO 'ULYHU 8VHUV *XLGH DYDLODEOH RQ ZZZDPGFRP DQG ZZZIXMLWVXFRP IRU JHQHUDO LQIRUPDWLRQ RQ 6SDQVLRQ )ODVK PHPRU\ VRIWZDUH GHYHORSPHQW JXLGHOLQHV
/* Example: CFI Entry command */ *( (UINT16 *)bank_addr + 0x555 ) = 0x0098; /* Example: CFI Exit command */ *( (UINT16 *)bank_addr + 0x000 ) = 0x00F0; /* write CFI entry command */
/* write cfi exit command
*/
)RU IXUWKHU LQIRUPDWLRQ SOHDVH UHIHU WR WKH &), 6SHFLILFDWLRQ VHH -('(& SXEOLFDWLRQV -(3$ DQG -(6'DQG &), 3XEOLFDWLRQ 3OHDVH FRQWDFW \RXU VDOHV RIILFH IRU FRSLHV RI WKHVH GRFXPHQWV
Table 17.3.
Addresses
K K K K K K K K K K $K
CFI Query Identification String
Description
4XHU\ 8QLTXH $6&,, VWULQJ 45< 3ULPDU\ 2(0 &RPPDQG 6HW $GGUHVV IRU 3ULPDU\ ([WHQGHG 7DEOH $OWHUQDWH 2(0 &RPPDQG 6HW K QRQH H[LVWV QRQH H[LVWV
Data
K K K K K K K K K K K
$GGUHVV IRU $OWHUQDWH 2(0 ([WHQGHG 7DEOH K
Table 17.4.
Addresses
%K &K 'K (K )K K K K K K K K
System Interface String
Description
Data
K K K K K K $K K K K K K 9&& 0LQ ZULWHHUDVH '' YROW '' PLOOLYROW 9&& 0D[ ZULWHHUDVH '' YROW '' PLOOLYROW 933 0LQ YROWDJH K 933 0D[ YROWDJH K
QR 933 SLQ SUHVHQW QR 933 SLQ SUHVHQW QRW VXSSRUWHG
7\SLFDO WLPHRXW SHU VLQJOH E\WHZRUG ZULWH I V 7\SLFDO WLPHRXW IRU 0LQ VL]H EXIIHU ZULWH I V K 7\SLFDO WLPHRXW SHU LQGLYLGXDO EORFN HUDVH I PV 7\SLFDO WLPHRXW IRU IXOO FKLS HUDVH I PV K 0D[ WLPHRXW IRU EXIIHU ZULWH IAWLPHV W\SLFDO 0D[ WLPHRXW SHU LQGLYLGXDO EORFN HUDVH I WLPHV W\SLFDO 0D[ WLPHRXW IRU IXOO FKLS HUDVH I WLPHV W\SLFDO K QRW VXSSRUWHG QRW VXSSRUWHG 0D[ WLPHRXW IRU E\WHZRUG ZULWH IAWLPHV W\SLFDO
December 3, 2005 S29WS-N_m0_I0
99
Preliminary
Table 17.5.
Addresses
K K K $K %K &K 'K (K )K K K K K K K K K K K $K %K &K
Device Geometry Definition
Description
Data
K :61 K :61 K K K K K K K K K )'K :61 'K :61 K K K K K K K K K K K
'HYLFH 6L]H
E\WH
I
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1XPEHU RI (UDVH %ORFN 5HJLRQV ZLWKLQ GHYLFH (UDVH %ORFN 5HJLRQ ,QIRUPDWLRQ
(UDVH %ORFN 5HJLRQ ,QIRUPDWLRQ
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(UDVH %ORFN 5HJLRQ ,QIRUPDWLRQ
100
S29WS-N_m0_I0 December 3, 2005
Preliminary
Table 17.6.
Addresses
K K K K K
Primary Vendor-Specific Extended Query
Description
Data
K K K K K
4XHU\XQLTXH $6&,, VWULQJ 35, 0DMRU YHUVLRQ QXPEHU $6&,, 0LQRU YHUVLRQ QXPEHU $6&,, $GGUHVV 6HQVLWLYH 8QORFN %LWV 5HTXLUHG 1RW 5HTXLUHG 6LOLFRQ 7HFKQRORJ\ %LWV P 7R 5HDG :ULWH (UDVH 6XVSHQG 1RW 6XSSRUWHG 6HFWRU 3URWHFW 1RW 6XSSRUWHG ;
K
K
K
K
7R 5HDG 2QO\
K
K
1XPEHU RI VHFWRUV LQ SHU JURXS
K
K
6HFWRU 7HPSRUDU\ 8QSURWHFW 1RW 6XSSRUWHG 6XSSRUWHG 6HFWRU 3URWHFW8QSURWHFW VFKHPH $GYDQFHG 6HFWRU 3URWHFWLRQ 6LPXOWDQHRXV 2SHUDWLRQ 1XPEHU RI 6HFWRUV LQ DOO EDQNV H[FHSW ERRW EDQN %XUVW 0RGH 7\SH 1RW 6XSSRUWHG 3DJH 0RGH 7\SH 1RW 6XSSRUWHG 3DJH K K K 6XSSRUWHG :RUG 3DJH :RUG 3DJH :RUG
K
K )K :61 %K :61 K
$K
%K
&K
K
'K
K
$&& $FFHOHUDWLRQ 6XSSO\ 0LQLPXP 1RW 6XSSRUWHG '' 9ROW '' P9 1RW 6XSSRUWHG '' 9ROW '' P9 'XDO %RRW 'HYLFH QRW VXSSRUWHG $&& $FFHOHUDWLRQ 6XSSO\ 0D[LPXP 7RS%RWWRP %RRW 6HFWRU )ODJ 3URJUDP 6XVSHQG K 8QORFN %\SDVV 1RW 6XSSRUWHG 6XSSRUWHG 6HFXUHG 6LOLFRQ 6HFWRU &XVWRPHU 273 $UHD 6L]H IAE\WHV +DUGZDUH 5HVHW /RZ 7LPHRXW GXULQJ DQ HPEHGGHG DOJRULWKP WR UHDG PRGH 0D[LPXP IAQV +DUGZDUH 5HVHW /RZ 7LPHRXW QRW GXULQJ DQ HPEHGGHG DOJRULWKP WR UHDG PRGH 0D[LPXP IAQV (UDVH 6XVSHQG 7LPHRXW 0D[LPXP IAQV 3URJUDP 6XVSHQG 7LPHRXW 0D[LPXP IAQV %DQN 2UJDQL]DWLRQ ; 1XPEHU RI EDQNV 1XPEHU RI VHFWRUV LQ EDQN 1XPEHU RI VHFWRUV LQ EDQN
(K
K
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K K K K K
K K K K K K
K K K K K :61 %K :61 K :61 K :61
%DQN 5HJLRQ ,QIRUPDWLRQ ; %DQN 5HJLRQ ,QIRUPDWLRQ ;
December 3, 2005 S29WS-N_m0_I0
101
Preliminary
Table 17.6.
Addresses
$K %K &K 'K (K )K K K K K K K K K
Primary Vendor-Specific Extended Query (Continued)
Description
Data
K :61 K :61 K :61 K :61 K :61 K :61 K :61 K :61 K :61 K :61 K :61 K :61 K :61 K :61 K :61 K :61 K :61 K :61 K :61 K :61 K :61 K :61 K :61 K :61 K :61 K :61 K :61 %K :61
%DQN 5HJLRQ ,QIRUPDWLRQ ; %DQN 5HJLRQ ,QIRUPDWLRQ ; %DQN 5HJLRQ ,QIRUPDWLRQ ; %DQN 5HJLRQ ,QIRUPDWLRQ ; %DQN 5HJLRQ ,QIRUPDWLRQ ; %DQN 5HJLRQ ,QIRUPDWLRQ ; %DQN 5HJLRQ ,QIRUPDWLRQ ; %DQN 5HJLRQ ,QIRUPDWLRQ ; %DQN 5HJLRQ ,QIRUPDWLRQ ; %DQN 5HJLRQ ,QIRUPDWLRQ ; %DQN 5HJLRQ ,QIRUPDWLRQ ; %DQN 5HJLRQ ,QIRUPDWLRQ ; %DQN 5HJLRQ ,QIRUPDWLRQ ; %DQN 5HJLRQ ,QIRUPDWLRQ ;
1XPEHU RI VHFWRUV LQ EDQN 1XPEHU RI VHFWRUV LQ EDQN 1XPEHU RI VHFWRUV LQ EDQN 1XPEHU RI VHFWRUV LQ EDQN 1XPEHU RI VHFWRUV LQ EDQN 1XPEHU RI VHFWRUV LQ EDQN 1XPEHU RI VHFWRUV LQ EDQN 1XPEHU RI VHFWRUV LQ EDQN 1XPEHU RI VHFWRUV LQ EDQN 1XPEHU RI VHFWRUV LQ EDQN 1XPEHU RI VHFWRUV LQ EDQN 1XPEHU RI VHFWRUV LQ EDQN 1XPEHU RI VHFWRUV LQ EDQN 1XPEHU RI VHFWRUV LQ EDQN
102
S29WS-N_m0_I0 December 3, 2005
Preliminary
18 Revisions
Revision F (October 29, 2004)
'DWD VKHHW FRPSOHWHO\ UHYLVHG &KDQJHG DUUDQJHPHQW RI VHFWLRQV HGLWHG H[SODQDWRU\ WH[W DGGHG IORZFKDUWV 7KLV GRFXPHQW VXSHUVHGHV 5HYLVLRQ ( LVVXHG $XJXVW RQO\ WKH FKDQJHV VSHFLILHG IRU 5HYLVLRQ ) LQ WKLV VHFWLRQ DIIHFW WKH GRFXPHQW RU GHYLFH $OO RWKHU GHYLFH VSHFLILFDWLRQV UHPDLQ WKH VDPH DV SUHVHQWHG LQ 5HYLVLRQ ( 'HOHWHG SURGXFW VHOHFWRU JXLGH 6\QFKURQRXV%XUVW 5HDG 'HOHWHG W$$6 DQG W$$+ IURP WDEOH 0RGLILHG 1RWH 7DEOH 6\VWHP ,QWHUIDFH 6WULQJ &KDQJHG GDWD DW DGGUHVV K IURP K WR K
Revision G (January 27, 2005)
*OREDO 8SGDWHG W,$&& W%$&& W2( &), DGGUHVV $K DQG WKH &RQILJXUDWLRQ 5HJLVWHU $GGHG )LJXUH 33% 3URJUDP(UDVH $OJRULWKP
Revision H (July 8, 2005)
$OO UHIHUHQFHV WR 9,2 FKDQJHG WR 9&& 5HPRYHG DOO UHIHUHQFHV WR WKH 6:61 &KDQJHG &5 WR 5HVHUYHG ,W LV SUHSURJUDPPHG DW WKH IDFWRU\ 8SGDWHG W$63 W363 ,&& ,&& ,&& ,&& VSHFLILFDWLRQV 5HPRYHG W$2( DQG DGGHG I0,1 VSHFLILFDWLRQV 8SGDWHG DGGUHVV ODWHQF\ WDEOHV
Revision I (December 3, 2005)
$GGHG 3DJH 0RGH 5HDG LQIRUPDWLRQ 5HYLVHG W5$&& IURP WR QV DQG W$9' IURP WR QV ,QFRUSRUDWHG VSHFLILFDWLRQ EXOOHWLQ
V FKDQJHV FODULILFDWLRQV DQG HUUDWD $GGHG WKH 0ELW 0+] 231 DQG UHYLVHG IURP $GYDQFHG WR 3UHOLPLQDU\ 6SHFLILFDWLRQV
December 3, 2005 S29WS-N_m0_I0
103
Mobile SDRAM Type 1
128 Mbit (8M x 16Bit) SDRAM
PRELIMINARY
Features
7HPSHUDWXUH FRPSHQVDWHG VHOI UHIUHVK 7&65 )XOO\ V\QFKURQRXV DOO VLJQDOV UHJLVWHUHG RQ SRVLWLYH HGJH RI V\VWHP FORFN ,QWHUQDO SLSHOLQHG RSHUDWLRQ FROXPQ DGGUHVV FDQ EH FKDQJHG HYHU\ FORFN F\FOH ,QWHUQDO EDQNV IRU KLGLQJ URZ DFFHVV SUHFKDUJH 3URJUDPPDEOH EXUVW OHQJWKV RU IXOO SDJH $XWR 3UHFKDUJH LQFOXGHV FRQFXUUHQW DXWR SUHFKDUJH DQG $XWR 5HIUHVK 0RGHV 6HOI 5HIUHVK 0RGH VWDQGDUG DQG ORZ SRZHU PV F\FOH UHIUHVK /977/FRPSDWLEOH LQSXWV DQG RXWSXWV /RZ YROWDJH SRZHU VXSSO\ 3DUWLDO DUUD\ VHOI UHIUHVK SRZHUVDYLQJ PRGH 'HHS SRZHUGRZQ PRGH 3URJUDPPDEOH RXWSXW GULYH VWUHQJWK 2SHUDWLQJ WHPSHUDWXUH UDQJH
([WHQGHG & WR &
9''9''4 9 9
Speed Options
6SHHG *UDGH &ORFN )UHTXHQF\ 0+] 0+] 0+] 0+] $FFHVV 7LPH &/ QV QV &/ QV QV 6HWXS 7LPH QV QV QV QV +ROG 7LPH QV QV QV QV
Address Table
8M x 16
&RQILJXUDWLRQ 5HIUHVK &RXQW 5RZ $GGUHVVLQJ %DQN $GGUHVVLQJ &ROXPQ $GGUHVVLQJ
0 [ [ EDQNV . . $$ %$ %$ $$
Publication Number SDRAM_01
Revision A
Amendment 3
Issue Date November 8, 2005
Preliminary
19 General Description
7KH 0E 6'5$0 LV D KLJKVSHHG &026 G\QDPLF UDQGRPDFFHVV PHPRU\ FRQ WDLQLQJ ELWV ,W LV LQWHUQDOO\ FRQILJXUHG DV D TXDG EDQN '5$0 ZLWK D V\QFKURQRXV LQWHUIDFH DOO VLJQDOV DUH UHJLVWHUHG RQ WKH SRVLWLYH HGJH RI WKH FORFN VLJQDO &/. (DFK RI WKH [V ELW EDQNV LV RUJDQL]HG DV URZV E\ FROXPQV E\ ELWV 5HDG DQG ZULWH DFFHVVHV WR WKH 6'5$0 DUH EXUVW RULHQWHG DFFHVVHV VWDUW DW D VHOHFWHG ORFDWLRQ DQG FRQWLQXH IRU D SURJUDPPHG QXPEHU RI ORFDWLRQV LQ D SUR JUDPPHG VHTXHQFH $FFHVVHV EHJLQ ZLWK WKH UHJLVWUDWLRQ RI DQ $FWLYH FRPPDQG ZKLFK LV WKHQ IROORZHG E\ D 5HDG RU :ULWH FRPPDQG 7KH DGGUHVV ELWV UHJLVWHUHG FRLQFLGHQW ZLWK WKH $FWLYH FRPPDQG DUH XVHG WR VHOHFW WKH EDQN DQG URZ WR EH DFFHVVHG %$ %$ VHOHFW WKH EDQN $$VHOHFW WKH URZ 7KH DGGUHVV ELWV UHJLVWHUHG FRLQFLGHQW ZLWK WKH 5HDG RU :ULWH FRPPDQG DUH XVHG WR VHOHFW WKH VWDUWLQJ FROXPQ ORFDWLRQ IRU WKH EXUVW DFFHVV 7KH 6'5$0 SURYLGHV IRU SURJUDPPDEOH UHDG RU ZULWH EXUVW OHQJWKV RI RU ORFDWLRQV RU WKH IXOO SDJH ZLWK D EXUVW WHUPLQDWH RSWLRQ $Q DXWR SUHFKDUJH IXQFWLRQ PD\ EH HQDEOHG WR SURYLGH D VHOIWLPHG URZ SUHFKDUJH WKDW LV LQLWLDWHG DW WKH HQG RI WKH EXUVW VHTXHQFH 7KH 0E 6'5$0 XVHV DQ LQWHUQDO SLSHOLQHG DUFKLWHFWXUH WR DFKLHYH KLJKVSHHG RSHUDWLRQ 7KLV DUFKLWHFWXUH LV FRPSDWLEOH ZLWK WKH Q UXOH RI SUHIHWFK DUFKLWHF WXUHV EXW LW DOVR DOORZV WKH FROXPQ DGGUHVV WR EH FKDQJHG RQ HYHU\ FORFN F\FOH WR DFKLHYH D KLJK VSHHG IXOO\ UDQGRP DFFHVV 3UHFKDUJLQJ RQH EDQN ZKLOH DFFHVV LQJ RQH RI WKH RWKHU WKUHH EDQNV ZLOO KLGH WKH SUHFKDUJH F\FOHV DQG SURYLGH VHDPOHVV KLJKVSHHG UDQGRPDFFHVV RSHUDWLRQ 7KH 0E 6'5$0 LV GHVLJQHG WR RSHUDWH LQ 9 ORZSRZHU PHPRU\ V\VWHPV $Q DXWR UHIUHVK PRGH LV SURYLGHG DORQJ ZLWK D SRZHUVDYLQJ 'HHS 3RZHU'RZQ 0RGH $OO LQSXWV DQG RXWSXWV DUH /977/FRPSDWLEOH 6'5$0V RIIHU VXEVWDQWLDO DGYDQFHV LQ '5$0 RSHUDWLQJ SHUIRUPDQFH LQFOXGLQJ WKH DELOLW\ WR V\QFKURQRXVO\ EXUVW GDWD DW D KLJK GDWD UDWH ZLWK DXWRPDWLF FROXPQ DGGUHVV JHQHUDWLRQ WKH DELOLW\ WR LQWHUOHDYH EHWZHHQ LQWHUQDO EDQNV LQ RUGHU WR KLGH SUHFKDUJH WLPH DQG WKH FDSDELOLW\ WR UDQGRPO\ FKDQJH FROXPQ DGGUHVVHV RQ HDFK FORFN F\FOH GXULQJ D EXUVW DFFHVV
November 8, 2005 SDRAM_01_A3
Mobile SDRAM Type 1
105
Preliminary
20 Functional Block Diagram
BA1 0 0 1 1
CONTROL LOGIC BANK2 BANK3
CKE CLK CS# WE# CAS# RAS#
BA0 0 1 0 1
Bank 0 1 2 3
COMMAND DECODE
BANK1
MODE REGISTER 12
REFRESH 12 COUNTER
ROWADDRESS MUX
12
12
BANK0 ROWADDRESS 4096 LATCH & DECODER
BANK0 MEMORY ARRAY (4,096 x 512 x 16)
2
2
DQML, DQMH
SENSE AMPLIFIERS 16 4096
DATA OUTPUT REGISTER
2 A0-A11, BA0, BA1 ADDRESS REGISTER BANK CONTROL LOGIC
14
I/O GATING DQM MASK LOGIC READ DATA LATCH WRITE DRIVERS 512 (x16) COLUMN DECODER 16
16
DQ0DQ15
2
DATA INPUT REGISTER
8
COLUMNADDRESS COUNTER/ LATCH
9
Figure 20.1
Block Diagram
106
Mobile SDRAM Type 1
SDRAM_01_A3 November 8, 2005
Preliminary
21 Pin Descriptions
Symbol Type Description
&/.
,QSXW
&ORFN &/. LV GULYHQ E\ WKH V\VWHP FORFN $OO 6'5$0 LQSXW VLJQDOV DUH VDPSOHG RQ WKH SRVLWLYH HGJH RI &/. &/. DOVR LQFUHPHQWV WKH LQWHUQDO EXUVW FRXQWHU DQG FRQWUROV WKH RXWSXW UHJLVWHUV &ORFN (QDEOH &.( DFWLYDWHV +LJK DQG GHDFWLYDWHV /RZ WKH &/. VLJQDO 'HDFWLYDWLQJ WKH FORFN SURYLGHV 3UHFKDUJH 3RZHU'RZQ DQG 6HOI 5HIUHVK RSHUDWLRQ DOO EDQNV LGOH $FWLYH 3RZHU'RZQ URZ DFWLYH LQ DQ\ EDQN 'HHS 3RZHU 'RZQ DOO EDQNV LGOH RU &ORFN 6XVSHQG RSHUDWLRQ EXUVW DFFHVV LQ SURJUHVV &.( LV V\QFKURQRXV H[FHSW DIWHU WKH GHYLFH HQWHUV SRZHUGRZQ DQG VHOI UHIUHVK PRGHV ZKHUH &.( EHFRPHV DV\QFKURQRXV XQWLO DIWHU H[LWLQJ WKH VDPH PRGH 7KH LQSXW EXIIHUV LQFOXGLQJ &/. DUH GLVDEOHG GXULQJ SRZHUGRZQ DQG VHOI UHIUHVK PRGHV SURYLGLQJ ORZ VWDQGE\ SRZHU &.( PD\ EH WLHG +LJK &KLS 6HOHFW &6 HQDEOHV UHJLVWHUHG /RZ DQG GLVDEOHV UHJLVWHUHG +LJK WKH FRPPDQG GHFRGHU $OO FRPPDQGV DUH PDVNHG ZKHQ &6 LV UHJLVWHUHG +LJK &6 SURYLGHV IRU H[WHUQDO EDQN VHOHFWLRQ RQ V\VWHPV ZLWK PXOWLSOH EDQNV &6 LV FRQVLGHUHG SDUW RI WKH FRPPDQG FRGH &RPPDQG ,QSXWV &$6 5$6 DQG :( DORQJ ZLWK &6 GHILQH WKH FRPPDQG EHLQJ HQWHUHG ,QSXW2XWSXW 0DVN '40 LV VDPSOHG +LJK DQG LV DQ LQSXW PDVN VLJQDO IRU ZULWH DFFHVVHV DQG DQ RXWSXW HQDEOH VLJQDO IRU UHDG DFFHVVHV ,QSXW GDWD LV PDVNHG GXULQJ D :ULWH F\FOH 7KH RXWSXW EXIIHUV DUH SODFHG LQ D +LJK= VWDWH WZRFORFN ODWHQF\ ZKHQ GXULQJ D 5HDG F\FOH /'40 FRUUHVSRQGV WR '4'4 8'40 FRUUHVSRQGV WR '4'4 /'40 DQG 8'40 DUH FRQVLGHUHG VDPH VWDWH ZKHQ UHIHUHQFHG DV '40 %DQN $GGUHVV ,QSXWV %$ DQG %$ GHILQH WR ZKLFK EDQN WKH $FWLYH 5HDG :ULWH RU 3UHFKDUJH FRPPDQG LV EHLQJ DSSOLHG 7KHVH SLQV DOVR VHOHFW EHWZHHQ WKH PRGH UHJLVWHU DQG WKH H[WHQGHG PRGH UHJLVWHU $GGUHVV ,QSXWV $$ DUH VDPSOHG GXULQJ WKH $FWLYH FRPPDQG URZ DGGUHVV $$ DQG 5HDG:ULWH FRPPDQG FROXPQDGGUHVV $$ ZLWK $ GHILQLQJ DXWR SUHFKDUJH WR VHOHFW RQH ORFDWLRQ RXW RI WKH PHPRU\ DUUD\ LQ WKH UHVSHFWLYH EDQN $ LV VDPSOHG GXULQJ D 3UHFKDUJH FRPPDQG WR GHWHUPLQH LI DOO EDQNV DUH WR EH SUHFKDUJHG $ +LJK RU EDQN VHOHFWHG E\ %$ %$ /RZ 7KH DGGUHVV LQSXWV DOVR SURYLGH WKH RSFRGH GXULQJ D /RDG 0RGH 5HJLVWHU FRPPDQG 'DWD ,QSXW2XWSXW 'DWD EXV ,QWHUQDOO\ 1RW &RQQHFWHG 7KHVH FRXOG EH OHIW XQFRQQHFWHG EXW LW LV UHFRPPHQGHG WKH\ EH FRQQHFWHG RU 966 * LV D QR FRQQHFW IRU WKLV SDUW EXW PD\ EH XVHG DV $ LQ IXWXUH GHVLJQV '4 3RZHU 3URYLGH LVRODWHG SRZHU WR '4V IRU LPSURYHG QRLVH LPPXQLW\ '4 *URXQG 3URYLGH LVRODWHG JURXQG WR '4V IRU LPSURYHG QRLVH LPPXQLW\ &RUH 3RZHU 6XSSO\ *URXQG
&.(
,QSXW
&6 &$6 5$6 :(
,QSXW
,QSXW
/'40 8'40
,QSXW
%$ %$
,QSXW
$$
,QSXW
'4'4 1& 9''4 9664 9'' 966
,2 6XSSO\ 6XSSO\ 6XSSO\ 6XSSO\
22 Functional Description
,Q JHQHUDO WKH 0E 6'5$0V 0 [ [ EDQNV DUH TXDGEDQN '5$0V WKDW RSHUDWH DW 9 DQG LQFOXGH D V\QFKURQRXV LQWHUIDFH DOO VLJQDOV DUH UHJLVWHUHG RQ WKH SRVLWLYH HGJH RI WKH FORFN VLJQDO &/. (DFK EDQN [ ELW LV RU JDQL]HG DV URZV E\ FROXPQV E\ ELWV 5HDG DQG ZULWH DFFHVVHV WR WKH 6'5$0 DUH EXUVW RULHQWHG DFFHVVHV VWDUW DW D VHOHFWHG ORFDWLRQ DQG FRQWLQXH IRU D SURJUDPPHG QXPEHU RI ORFDWLRQV LQ D SUR JUDPPHG VHTXHQFH $FFHVVHV EHJLQ ZLWK WKH UHJLVWUDWLRQ RI DQ $FWLYH FRPPDQG
November 8, 2005 SDRAM_01_A3
Mobile SDRAM Type 1
107
Preliminary
ZKLFK LV WKHQ IROORZHG E\ D 5HDG RU :ULWH FRPPDQG 7KH DGGUHVV ELWV UHJLVWHUHG FRLQFLGHQW ZLWK WKH $FWLYH FRPPDQG DUH XVHG WR VHOHFW WKH EDQN DQG URZ WR EH DFFHVVHG %$ DQG %$ VHOHFW WKH EDQN $$ VHOHFW WKH URZ 7KH DGGUHVV ELWV $$ UHJLVWHUHG FRLQFLGHQW ZLWK WKH 5HDG RU :ULWH FRPPDQG DUH XVHG WR VHOHFW WKH VWDUWLQJ FROXPQ ORFDWLRQ IRU WKH EXUVW DFFHVV 3ULRU WR QRUPDO RSHUDWLRQ WKH 6'5$0 PXVW EH LQLWLDOL]HG 7KH IROORZLQJ VHFWLRQV SURYLGH GHWDLOHG LQIRUPDWLRQ FRYHULQJ GHYLFH LQLWLDOL]DWLRQ UHJLVWHU GHILQLWLRQ FRPPDQG GHVFULSWLRQV DQG GHYLFH RSHUDWLRQ
23 Initialization
6'5$0V PXVW EH SRZHUHG XS DQG LQLWLDOL]HG LQ D SUHGHILQHG PDQQHU 2SHUDWLRQDO SURFHGXUHV RWKHU WKDQ WKRVH VSHFLILHG PD\ UHVXOW LQ XQGHILQHG RSHUDWLRQ 3RZHU VKRXOG EH DSSOLHG WR 9'' DQG 9''4 VLPXOWDQHRXVO\ 7KLV WLPH GHOD\ VKRXOG QRW H[FHHG PV 2QFH WKH SRZHU LV DSSOLHG WR 9'' DQG 9''4 DQG WKH FORFN LV VWDEOH VWDEOH FORFN LV GHILQHG DV D VLJQDO F\FOLQJ ZLWKLQ WLPLQJ FRQVWUDLQWV VSHFLILHG IRU WKH FORFN SLQ WKH 6'5$0 UHTXLUHV D V GHOD\ SULRU WR LVVXLQJ DQ\ FRPPDQG RWKHU WKDQ D &RPPDQG ,QKLELW RU 123 6WDUWLQJ DW VRPH SRLQW GXULQJ WKLV V SHULRG DQG FRQWLQXLQJ DW OHDVW WKURXJK WKH HQG RI WKLV SHULRG &RPPDQG ,QKLELW RU 123 FRPPDQGV VKRXOG EH DSSOLHG 2QFH WKH V GHOD\ KDV EHHQ VDWLVILHG ZLWK DW OHDVW RQH &RPPDQG ,QKLELW RU 123 FRPPDQG KDYLQJ EHHQ DSSOLHG D 3UHFKDUJH FRPPDQG VKRXOG EH DSSOLHG $OO EDQNV PXVW WKHQ EH SUHFKDUJHG WKHUHE\ SODFLQJ WKH GHYLFH LQ WKH DOO EDQNV LGOH VWDWH 2QFH LQ WKH LGOH VWDWH WZR $XWR UHIUHVK F\FOHV PXVW EH SHUIRUPHG $IWHU WKH $XWR UHIUHVK F\FOHV DUH FRPSOHWH WKH 6'5$0 LV UHDG\ IRU PRGH UHJLVWHU SURJUDPPLQJ %HFDXVH WKH PRGH UHJLVWHU ZLOO SRZHU XS LQ DQ XQNQRZQ VWDWH LW VKRXOG EH ORDGHG SULRU WR DSSO\LQJ DQ\ RSHUDWLRQDO FRPPDQG
24 Mode Register Definition
,Q RUGHU WR DFKLHYH ORZ SRZHU FRQVXPSWLRQ WKHUH DUH WZR PRGH UHJLVWHUV LQ WKH 0RELOH FRPSRQHQW 0RGH 5HJLVWHU DQG ([WHQGHG 0RGH 5HJLVWHU 7KH PRGH UHJLV WHU LV LOOXVWUDWHG LQ )LJXUH 0RGH 5HJLVWHU 'HILQLWLRQ RQ SDJH WKH H[WHQGHG PRGH UHJLVWHU LV LOOXVWUDWHG LQ )LJXUH 7KH PRGH UHJLVWHU GHILQHV WKH VSHFLILF PRGH RI RSHUDWLRQ RI WKH 6'5$0 LQFOXGLQJ EXUVW OHQJWK EXUVW W\SH &$6 ODWHQF\ RSHUDWLQJ PRGH DQG ZULWH EXUVW PRGH 7KH PRGH UHJLVWHU LV SURJUDPPHG YLD WKH /RDG 0RGH 5HJLVWHU FRPPDQG DQG ZLOO UH WDLQ WKH VWRUHG LQIRUPDWLRQ XQWLO LW LV SURJUDPPHG DJDLQ RU WKH GHYLFH ORVHV SRZHU 0RGH UHJLVWHU ELWV 00 VSHFLI\ WKH EXUVW OHQJWK 0 VSHFLILHV WKH W\SH RI EXUVW VHTXHQWLDO RU LQWHUOHDYHG 00 VSHFLI\ WKH &$6 ODWHQF\ 0 DQG 0 VSHFLI\ WKH RSHUDWLQJ PRGH 0 VSHFLILHV WKH ZULWH EXUVW PRGH DQG 0 DQG 0 VKRXOG EH VHW WR ]HUR 0 DQG 0 VKRXOG EH VHW WR ]HUR WR SUHYHQW H[WHQGHG PRGH UHJLVWHU 7KH PRGH UHJLVWHU PXVW EH ORDGHG ZKHQ DOO EDQNV DUH LGOH DQG WKH FRQWUROOHU PXVW ZDLW WKH VSHFLILHG WLPH EHIRUH LQLWLDWLQJ WKH VXEVHTXHQW RSHUDWLRQ 9LRODWLQJ HLWKHU RI WKHVH UHTXLUHPHQWV ZLOO UHVXOW LQ XQVSHFLILHG RSHUDWLRQ
108
Mobile SDRAM Type 1
SDRAM_01_A3 November 8, 2005
Preliminary
25 Burst Length
5HDG DQG ZULWH DFFHVVHV WR WKH 6'5$0 DUH EXUVW RULHQWHG ZLWK WKH EXUVW OHQJWK EHLQJ SURJUDPPDEOH DV VKRZQ LQ )LJXUH 0RGH 5HJLVWHU 'HILQLWLRQ VHFWLRQ RQ SDJH 7KH EXUVW OHQJWK GHWHUPLQHV WKH PD[LPXP QXPEHU RI FROXPQ OR FDWLRQV WKDW FDQ EH DFFHVVHG IRU D JLYHQ 5HDG RU :ULWH FRPPDQG %XUVW OHQJWKV RI RU ORFDWLRQV DUH DYDLODEOH IRU ERWK WKH VHTXHQWLDO DQG WKH LQWHUOHDYHG EXUVW W\SHV DQG D IXOOSDJH EXUVW LV DYDLODEOH IRU WKH VHTXHQWLDO W\SH 7KH IXOO SDJH EXUVW LV XVHG LQ FRQMXQFWLRQ ZLWK WKH %XUVW 7HUPLQDWH FRPPDQG WR JHQHUDWH DUELWUDU\ EXUVW OHQJWKV 5HVHUYHG VWDWHV VKRXOG QRW EH XVHG DV XQNQRZQ RSHUDWLRQ RU LQFRPSDWLELOLW\ ZLWK IXWXUH YHUVLRQV PD\ UHVXOW :KHQ D 5HDG RU :ULWH FRPPDQG LV LVVXHG D EORFN RI FROXPQV HTXDO WR WKH EXUVW OHQJWK LV HIIHFWLYHO\ VHOHFWHG $OO DFFHVVHV IRU WKDW EXUVW WDNH SODFH ZLWKLQ WKLV EORFN PHDQLQJ WKDW WKH EXUVW ZLOO ZUDS ZLWKLQ WKH EORFN LI D ERXQGDU\ LV UHDFKHG 7KH EORFN LV XQLTXHO\ VHOHFWHG E\ $$ ZKHQ WKH EXUVW OHQJWK LV VHW WR WZR E\ $$ ZKHQ WKH EXUVW OHQJWK LV VHW WR IRXU DQG E\ $$ ZKHQ WKH EXUVW OHQJWK LV VHW WR HLJKW
November 8, 2005 SDRAM_01_A3
Mobile SDRAM Type 1
109
Preliminary
Table 25.1
%XUVW /HQJWK 6WDUWLQJ &ROXPQ $GGUHVV $ $ $ )XOO 3DJH \ Q $ $ $
Burst Definition
2UGHU RI $FFHVVHV :LWKLQ $ %XUVW 7\SH 6HTXHQWLDO &Q &Q &Q &Q &Q &Q &Q 7\SH ,QWHUOHDYHG 1RW 6XSSRUWHG
$$ ORFDWLRQ \
1RWHV )RU IXOOSDJH DFFHVVHV \
)RU D EXUVW OHQJWK RI WZR $$ VHOHFW WKH EORFNRIWZR EXUVW $ VHOHFWV WKH VWDUWLQJ FROXPQ ZLWKLQ WKH EORFN )RU D EXUVW OHQJWK RI IRXU $$ VHOHFW WKH EORFNRIIRXU EXUVW $$ VHOHFW WKH VWDUWLQJ FROXPQ ZLWKLQ WKH EORFN )RU D EXUVW OHQJWK RI HLJKW $$ VHOHFW WKH EORFNRIHLJKW EXUVW $$ VHOHFW WKH VWDUWLQJ FROXPQ ZLWKLQ WKH EORFN )RU D IXOOSDJH EXUVW WKH IXOO URZ LV VHOHFWHG DQG $$ VHOHFW WKH VWDUWLQJ FROXPQ :KHQHYHU D ERXQGDU\ RI WKH EORFN LV UHDFKHG ZLWKLQ D JLYHQ VHTXHQFH DERYH WKH IROORZLQJ DFFHVV ZUDSV ZLWKLQ WKH EORFN )RU D EXUVW OHQJWK RI RQH $$ VHOHFW WKH XQLTXH FROXPQ WR EH DFFHVVHG DQG PRGH UHJLVWHU ELW 0 LV LJQRUHG
110
Mobile SDRAM Type 1
SDRAM_01_A3 November 8, 2005
Preliminary
BA1 BA0 A11 A10
A9
A8
A7
A6
A5
A4
A3
A2
A1
A0
Address Bus
M13 M12 M11 M10 M9 M8 13 12 11 10 9 WB 8
M7 M6 7 6
M5 5
M4 4
M3 3 BT
M2 2
M1 1
M0 0 Mode Register (Mx)
Reserved** Reserved*
Op Mode
CAS Latency
Burst Length
*Should program M10 = "0, 0" to ensure compatibility with future devices.
Burst Length M2 M1 M0 0 0 0 0 0 0 1 1 0 0 1 1 0 1 0 1 0 1 0 1 M3 = 0 1 2 4 8 Reserved Reserved Reserved Full Page M3 = 1 1 2 4 8 Reserved Reserved Reserved Reserved
** BA1, BA0 = "0, 0" to prevent Extended Mode Register.
1 1 1 1
M3 0 1
Burst Type Sequential Interleaved
M6 M5 M4 0 0 0 0 1 1 1 1 0 0 1 1 0 0 1 1 0 1 0 1 0 1 0 1
CAS Latency Reserved 1 2 3 Reserved Reserved Reserved Reserved
M8 0 -
M7 0 -
M6-M0 Defined -
Operating Mode Standard Operation All other states reserved
M9 0 1
Write Burst Mode Programmed Burst Length Single Location Access
Figure 25.1
Mode Register Definition
7KH UHPDLQLQJ OHDVW VLJQLILFDQW DGGUHVV ELWV LV DUH XVHG WR VHOHFW WKH VWDUWLQJ ORFDWLRQ ZLWKLQ WKH EORFN )XOOSDJH EXUVWV ZUDS ZLWKLQ WKH SDJH LI WKH ERXQGDU\ LV UHDFKHG
26 Burst Type
$FFHVVHV ZLWKLQ D JLYHQ EXUVW PD\ EH SURJUDPPHG WR EH HLWKHU VHTXHQWLDO RU LQ WHUOHDYHG WKLV LV UHIHUUHG WR DV WKH EXUVW W\SH DQG LV VHOHFWHG YLD ELW 0 7KH RUGHULQJ RI DFFHVVHV ZLWKLQ D EXUVW LV GHWHUPLQHG E\ WKH EXUVW OHQJWK WKH EXUVW W\SH DQG WKH VWDUWLQJ FROXPQ DGGUHVV DV VKRZQ LQ 7DEOH
27 CAS Latency
7KH &$6 ODWHQF\ LV WKH GHOD\ LQ FORFN F\FOHV EHWZHHQ WKH UHJLVWUDWLRQ RI D 5HDG FRPPDQG DQG WKH DYDLODELOLW\ RI WKH ILUVW SLHFH RI RXWSXW GDWD 7KH ODWHQF\ FDQ EH VHW WR RQH WZR RU WKUHH FORFNV
November 8, 2005 SDRAM_01_A3
Mobile SDRAM Type 1
111
Preliminary
,I D 5HDG FRPPDQG LV UHJLVWHUHG DW FORFN HGJH Q DQG WKH ODWHQF\ LV P FORFNV WKH GDWD ZLOO EH DYDLODEOH E\ FORFN HGJH Q P 7KH '4V ZLOO VWDUW GULYLQJ DV D UHVXOW RI WKH FORFN HGJH RQH F\FOH HDUOLHU Q P DQG SURYLGHG WKDW WKH UHOHYDQW DFFHVV WLPHV DUH PHW WKH GDWD ZLOO EH YDOLG E\ FORFN HGJH Q P )RU H[DPSOH DVVXPLQJ WKDW WKH FORFN F\FOH WLPH LV VXFK WKDW DOO UHOHYDQW DFFHVV WLPHV DUH PHW LI D UHDG FRPPDQG LV UHJLVWHUHG DW 7 DQG WKH ODWHQF\ LV SURJUDPPHG WR WZR FORFNV WKH '4V ZLOO VWDUW GULYLQJ DIWHU 7 DQG WKH GDWD ZLOO EH YDOLG E\ 7 DV VKRZQ LQ )LJXUH &$6 /DWHQF\ 7DEOH &$6 /DWHQF\ LQGLFDWHV WKH RSHU DWLQJ IUHTXHQFLHV DW ZKLFK HDFK &$6 ODWHQF\ VHWWLQJ FDQ EH XVHG 5HVHUYHG VWDWHV VKRXOG QRW EH XVHG DV XQNQRZQ RSHUDWLRQ RU LQFRPSDWLELOLW\ ZLWK IXWXUH YHUVLRQV PD\ UHVXOW
T0 CLK COMMAND READ NOP tLZ DQ tAC CAS Latency = 2 NOP tOH DOUT T1 T2 T3
T0 CLK COMMAND READ
T1
T2
T3
T4
NOP
NOP tLZ
NOP tOH DOUT
DQ tAC CAS Latency = 3
DON'T CARE UNDEFINED
Figure 27.1 CAS Latency Table 27.1
Speed
CAS Latency
Allowable Operating Frequency MHz CAS Latency = 2 CAS Latency = 3

28 Operating Mode
7KH QRUPDO RSHUDWLQJ PRGH LV VHOHFWHG E\ VHWWLQJ 0 DQG 0 WR ]HUR WKH RWKHU FRPELQDWLRQV RI YDOXHV IRU 0 DQG 0 DUH UHVHUYHG IRU IXWXUH XVH DQGRU WHVW PRGHV 7KH SURJUDPPHG EXUVW OHQJWK DSSOLHV WR ERWK UHDG DQG ZULWH EXUVWV 7HVW PRGHV DQG UHVHUYHG VWDWHV VKRXOG QRW EH XVHG EHFDXVH XQNQRZQ RSHUDWLRQ RU LQFRPSDWLELOLW\ ZLWK IXWXUH YHUVLRQV PD\ UHVXOW
112
Mobile SDRAM Type 1
SDRAM_01_A3 November 8, 2005
Preliminary
29 Write Burst Mode
:KHQ 0 WKH EXUVW OHQJWK SURJUDPPHG YLD 00 DSSOLHV WR ERWK 5HDG DQG :ULWH EXUVWV ZKHQ 0 WKH SURJUDPPHG EXUVW OHQJWK DSSOLHV WR 5HDG EXUVWV EXW ZULWH DFFHVVHV DUH VLQJOHORFDWLRQ QRQEXUVW DFFHVVHV
30 Extended Mode Register
7KH ([WHQGHG 0RGH 5HJLVWHU FRQWUROV WKH IXQFWLRQV EH\RQG WKRVH FRQWUROOHG E\ WKH 0RGH 5HJLVWHU 7KHVH DGGLWLRQDO IXQFWLRQV DUH VSHFLDO IHDWXUHV RI WKH 0RELOH GHYLFH 7KH\ LQFOXGH 7HPSHUDWXUH &RPSHQVDWHG 6HOI 5HIUHVK 7&65 &RQWURO 3DUWLDO $UUD\ 6HOI 5HIUHVK 3$65 DQG 2XWSXW 'ULYH 6WUHQJWK 1RW SURJUDPPLQJ WKH ([WHQGHG 0RGH 5HJLVWHU XSRQ LQLWLDOL]DWLRQ ZLOO UHVXOW LQ GHIDXOW VHWWLQJV IRU WKH /RZ 3RZHU IHDWXUHV 7KH ([WHQGHG 0RGH ZLOO GHIDXOW WR WKH & VHWWLQJ IRU 7&65 IXOO GULYH VWUHQJWK DQG IXOO DUUD\ UHIUHVK 7KH ([WHQGHG 0RGH 5HJLVWHU LV SURJUDPPHG YLD WKH 0RGH 5HJLVWHU 6HW FRPPDQG %$ %$ DQG UHWDLQV WKH VWRUHG LQIRUPDWLRQ XQWLO LW LV SURJUDPPHG DJDLQ RU WKH GHYLFH ORVHV SRZHU 7KH ([WHQGHG 0RGH 5HJLVWHU PXVW EH SURJUDPPHG ZLWK ( WKURXJK ( VHW WR ,W PXVW EH ORDGHG ZKHQ DOO EDQNV DUH LGOH DQG QR EXUVWV DUH LQ SURJUHVV DQG WKH FRQWUROOHU PXVW ZDLW WKH VSHFLILHG WLPH EHIRUH LQLWLDWLQJ DQ\ VXEVHTXHQW RS HUDWLRQ 9LRODWLQJ HLWKHU RI WKHVH UHTXLUHPHQWV UHVXOWV LQ XQVSHFLILHG RSHUDWLRQ 2QFH WKH YDOXHV DUH HQWHUHG WKH ([WHQGHG 0RGH 5HJLVWHU VHWWLQJV ZLOO EH UHWDLQHG HYHQ DIWHU H[LWLQJ 'HHS 3RZHU'RZQ
31 Temperature Compensated Self Refresh
7HPSHUDWXUH &RPSHQVDWHG 6HOI 5HIUHVK 7&65 DOORZV WKH FRQWUROOHU WR SURJUDP WKH 5HIUHVK LQWHUYDO GXULQJ 6HOI 5HIUHVK PRGH DFFRUGLQJ WR WKH FDVH WHPSHUDWXUH RI WKH 0RELOH GHYLFH 7KLV DOORZV JUHDW SRZHU VDYLQJV GXULQJ 6HOI 5HIUHVK GXULQJ PRVW RSHUDWLQJ WHPSHUDWXUH UDQJHV 2QO\ GXULQJ H[WUHPH WHPSHUDWXUHV ZRXOG WKH FRQWUROOHU KDYH WR VHOHFW WKH PD[LPXP 7&65 OHYHO 7KLV ZRXOG JXDUDQWHH GDWD GXULQJ 6HOI 5HIUHVK (YHU\ FHOO LQ WKH 6'5$0 UHTXLUHV UHIUHVKLQJ GXH WR WKH FDSDFLWRU ORVLQJ LWV FKDUJH RYHU WLPH 7KH UHIUHVK UDWH LV GHSHQGHQW RQ WHPSHUDWXUH $W KLJKHU WHPSHUDWXUHV D FDSDFLWRU ORVHV FKDUJH TXLFNHU WKDQ DW ORZHU WHPSHUDWXUHV UHTXLULQJ WKH FHOOV WR EH UHIUHVKHG PRUH RIWHQ +LVWRULFDOO\ GXULQJ 6HOI 5HIUHVK WKH UHIUHVK UDWH KDV EHHQ VHW WR DFFRPPRGDWH WKH ZRUVW FDVH RU KLJKHVW WHPSHUDWXUH UDQJH H[SHFWHG 7KXV GXULQJ DPELHQW WHPSHUDWXUHV WKH SRZHU FRQVXPHG GXULQJ UHIUHVK ZDV XQ QHFHVVDULO\ KLJK EHFDXVH WKH UHIUHVK UDWH ZDV VHW WR DFFRPPRGDWH WKH KLJKHU WHPSHUDWXUHV $GMXVWLQJ WKH UHIUHVK UDWH E\ VHWWLQJ ( DQG ( DOORZV WKH 6'5$0 WR DFFRPPRGDWH PRUH VSHFLILF WHPSHUDWXUH UHJLRQV GXULQJ 6HOI 5HIUHVK 7KHUH DUH IRXU WHPSHUDWXUH VHWWLQJV ZKLFK ZLOO YDU\ WKH 6HOI 5HIUHVK FXUUHQW DFFRUGLQJ WR WKH VHOHFWHG WHPSHUDWXUH 7KLV VHOHFWDEOH UHIUHVK UDWH ZLOO VDYH SRZHU ZKHQ WKH 6'5$0 LV RSHUDWLQJ DW QRUPDO WHPSHUDWXUHV
32 Partial Array Self Refresh
)RU IXUWKHU SRZHU VDYLQJV GXULQJ 6HOI 5HIUHVK WKH 3DUWLDO $UUD\ 6HOI 5HIUHVK 3$65 IHDWXUH DOORZV WKH FRQWUROOHU WR VHOHFW WKH DPRXQW RI PHPRU\ WKDW ZLOO EH UHIUHVKHG GXULQJ 6HOI 5HIUHVK 7KH UHIUHVK RSWLRQV DUH DOO EDQNV EDQNV
November 8, 2005 SDRAM_01_A3
Mobile SDRAM Type 1
113
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33 Driver Strength
%LWV ( DQG ( RI WKH H[WHQGHG PRGH UHJLVWHU FDQ EH XVHG WR VHOHFW WKH GULYHU VWUHQJWK RI WKH '4 RXWSXWV 7KLV YDOXH VKRXOG EH VHW DFFRUGLQJ WR WKH DSSOLFDWLRQ UHTXLUHPHQWV )XOO GULYH VWUHQJWK ZDV FDUULHG RYHU IURP VWDQGDUG 6'5$0 DQG LV VXLWDEOH WR GULYH KLJKHU ORDG V\VWHPV )XOO GULYH VWUHQJWK LV QRW UHFRPPHQGHG IRU ORDGV XQGHU S) +DOI GULYH VWUHQJWK LV LQWHQGHG IRU PXOWLGURS V\VWHPV ZLWK YDU LRXV ORDGV 7KLV GULYH RSWLRQ LV QRW UHFRPPHQGHG IRU ORDGV XQGHU S) 4XDUWHU GULYH VWUHQJWK LV LQWHQGHG IRU OLJKWHU ORDGV RU SRLQWWRSRLQW V\VWHPV
BA1 BA0 A11 A10 A9 A8 A7 A6 A5 A4 A3 A2 A1 A0
Address Bus
E13 E12 E11 E10 E9 E8 E7 E6 E5 E4 E3 E2 E1 E0 13 12 11 10 9 8 7 6
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5
4
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21 PASR
0
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Extended Mode Register (Ex)
E6 E5 Driver Strength 0 0 Full Strength 0 1 Half Strength 1 0 Quarter Strength 1 1 Reserved
3
E4 1 0 0 1
E3 Maximum Case Temp 1 0 1 0 85C 3 70C 45C
15C
E2 0 0 0 0 1 1 1 1
E1 0 0 1 1 0 0 1 1
E0 0 1 0 1 0 1 0 1
Self Refresh Coverage
Four Banks 3 Two Banks (Bank 0,1) One Bank (Bank 0) RFU RFU 1/2 Bank (Bank 0) 4 1/4 Bank (Bank 0) 5 RFU
Figure 33.1
Extended Mode Register
1RWHV ( DQG ( %$ DQG %$ PXVW EH WR VHOHFW WKH H[WHQGHG PRGH UHJLVWHU YV WKH EDVH PRGH UHJLVWHU 5)8 5HVHUYHG IRU IXWXUH XVH 'HIDXOW (05 YDOXHV DUH IXOO DUUD\ IRU 3$65 )XOO 'ULYH 6WUHQJWK DQG IRU 7&65 ( ( (
114
Mobile SDRAM Type 1
SDRAM_01_A3 November 8, 2005
Preliminary
34 Commands
7DEOH SURYLGHV D TXLFN UHIHUHQFH RI DYDLODEOH FRPPDQGV 7KLV LV IROORZHG E\ D ZULWWHQ GHVFULSWLRQ RI HDFK FRPPDQG 7KUHH DGGLWLRQDO 7UXWK 7DEOHV DSSHDU IRO ORZLQJ WKH 2SHUDWLRQ VHFWLRQ WKHVH WDEOHV SURYLGH FXUUHQW VWDWHQH[W VWDWH LQIRUPDWLRQ
Table 34.1
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Truth Table 1 - Commands and DQM Operation
+ / / / / / / / / ; ; ; + / + + + / / / ; ; ; + + / / + + / / ; ; ; + + + / / / + / ; ; ; ; ; /+ /+ ; ; ; ; / + ; ; %DQN 5RZ %DQN&RO %DQN&RO ; %DQN $ ; 2S&RGH ; ; ; ; ; ; 9DOLG ; ; ; ; $FWLYH +LJK=
1DPH )XQFWLRQ
$FWLYH 6HOHFW EDQN DQG DFWLYDWH URZ 5HDG 6HOHFW EDQN DQG FROXPQ DQG VWDUW 5HDG EXUVW :ULWH 6HOHFW EDQN DQG FROXPQ DQG VWDUW :ULWH EXUVW %XUVW 7HUPLQDWH RU 'HHS 3RZHU 'RZQ (QWHU GHHS SRZHU GRZQ PRGH 3UHFKDUJH 'HDFWLYDWH URZ LQ EDQN RU EDQNV $XWR 5HIUHVK RU 6HOI 5HIUHVK (QWHU VHOI UHIUHVK PRGH /RDG 0RGH 5HJLVWHU/RDG ([WHQGHG 0RGH 5HJLVWHU :ULWH (QDEOH2XWSXW (QDEOH :ULWH ,QKLELW2XWSXW +LJK=
1RWHV &.( LV +LJK IRU DOO FRPPDQGV VKRZQ H[FHSW 6HOI 5HIUHVK DQG 'HHS 3RZHU 'RZQ $$ GHILQH RSFRGH ZULWWHQ WR PRGH UHJLVWHU $$ SURYLGH URZ DGGUHVV DQG %$ %$ GHWHUPLQH ZKLFK EDQN LV PDGH DFWLYH $$ SURYLGH FROXPQ DGGUHVV $ +LJK HQDEOHV WKH DXWR SUHFKDUJH IHDWXUH QRQ SHUVLVWHQW ZKLOH $ /RZ GLVDEOHV WKH DXWR SUHFKDUJH IHDWXUH %$ %$ GHWHU PLQH ZKLFK EDQN LV EHLQJ UHDG IURP RU ZULWWHQ WR $ /RZ %$ %$ GHWHUPLQH WKH EDQN EHLQJ SUHFKDUJHG $ +LJK $OO EDQNV SUHFKDUJHG DQG %$ %$ DUH 'RQW &DUH 7KLV FRPPDQG LV $XWR 5HIUHVK LI &.( LV +LJK 6HOI 5HIUHVK LI &.( LV /RZ ,QWHUQDO UHIUHVK FRXQWHU FRQWUROV URZ DGGUHVVLQJ DOO LQSXWV DQG ,2V DUH 'RQW &DUH H[FHSW IRU &.( $FWLYDWHV RU GHDFWLYDWHV WKH '4V GXULQJ :ULWHV ]HURFORFN GHOD\ DQG 5HDGV WZR FORFN GHOD\ '40/ FRQWUROV '4 '40+ FRQWUROV '4 7KLV FRPPDQG LV %XUVW 7HUPLQDWH ZKHQ &.( LV KLJK DQG 'HHS 3RZHU 'RZQ ZKHQ &.( LV ORZ 7KH SXUSRVH RI WKH %XUVW 7HUPLQDWH FRPPDQG LV WR VWRS D GDWD EXUVW WKXV WKH FRPPDQG FRXOG FRLQFLGH ZLWK GDWD RQ WKH EXV +RZHYHU WKH '4V FROXPQ UHDGV D GRQW FDUH VWDWH WR LOOXVWUDWH WKDW WKH %XUVW 7HUPLQDWH FRPPDQG FDQ RFFXU ZKHQ WKHUH LV QR GDWD SUHVHQW
35 Command Inhibit
7KH &RPPDQG ,QKLELW IXQFWLRQ SUHYHQWV QHZ FRPPDQGV IURP EHLQJ H[HFXWHG E\ WKH 6'5$0 UHJDUGOHVV RI ZKHWKHU WKH &/. VLJQDO LV HQDEOHG 7KH 6'5$0 LV HI IHFWLYHO\ GHVHOHFWHG 2SHUDWLRQV DOUHDG\ LQ SURJUHVV DUH QRW DIIHFWHG
36 No Operation (NOP)
7KH 1R 2SHUDWLRQ 123 FRPPDQG LV XVHG WR SHUIRUP D 123 WR DQ 6'5$0 ZKLFK LV VHOHFWHG &6 LV /RZ 7KLV SUHYHQWV XQZDQWHG FRPPDQGV IURP EHLQJ UHJLV WHUHG GXULQJ LGOH RU ZDLW VWDWHV 2SHUDWLRQV DOUHDG\ LQ SURJUHVV DUH QRW DIIHFWHG
November 8, 2005 SDRAM_01_A3
Mobile SDRAM Type 1
115
Preliminary
37 Load Mode Register
7KH PRGH UHJLVWHU LV ORDGHG YLD LQSXWV $$ %$ %$ 6HH PRGH UHJLVWHU KHDGLQJ LQ WKH 5HJLVWHU 'HILQLWLRQ VHFWLRQ 7KH /RDG 0RGH 5HJLVWHU DQG /RDG ([ WHQGHG 0RGH 5HJLVWHU FRPPDQGV FDQ RQO\ EH LVVXHG ZKHQ DOO EDQNV DUH LGOH DQG D VXEVHTXHQW H[HFXWDEOH FRPPDQG FDQQRW EH LVVXHG XQWLO W05' LV PHW 7KH YDOXHV RI WKH PRGH UHJLVWHU DQG H[WHQGHG PRGH UHJLVWHU ZLOO EH UHWDLQHG HYHQ ZKHQ H[LWLQJ GHHS SRZHUGRZQ
38 Active
7KH $FWLYH FRPPDQG LV XVHG WR RSHQ RU DFWLYDWH D URZ LQ D SDUWLFXODU EDQN IRU D VXEVHTXHQW DFFHVV 7KH YDOXH RQ WKH %$ %$ LQSXWV VHOHFWV WKH EDQN DQG WKH DGGUHVV SURYLGHG RQ LQSXWV $$ VHOHFWV WKH URZ 7KLV URZ UHPDLQV DFWLYH RU RSHQ IRU DFFHVVHV XQWLO D SUHFKDUJH FRPPDQG LV LVVXHG WR WKDW EDQN $ SUH FKDUJH FRPPDQG PXVW EH LVVXHG EHIRUH RSHQLQJ D GLIIHUHQW URZ LQ WKH VDPH EDQN
39 Read
7KH 5HDG FRPPDQG LV XVHG WR LQLWLDWH D EXUVW UHDG DFFHVV WR DQ DFWLYH URZ 7KH YDOXH RQ WKH %$ %$ LQSXWV VHOHFWV WKH EDQN DQG WKH DGGUHVV SURYLGHG RQ LQ SXWV $$ VHOHFWV WKH VWDUWLQJ FROXPQ ORFDWLRQ 7KH YDOXH RQ LQSXW $ GHWHUPLQHV ZKHWKHU RU QRW DXWR SUHFKDUJH LV XVHG ,I DXWR SUHFKDUJH LV VHOHFWHG WKH URZ EHLQJ DFFHVVHG ZLOO EH SUHFKDUJHG DW WKH HQG RI WKH UHDG EXUVW LI DXWR SUHFKDUJH LV QRW VHOHFWHG WKH URZ ZLOO UHPDLQ RSHQ IRU VXEVHTXHQW DFFHVVHV 5HDG GDWD DSSHDUV RQ WKH '4 VXEMHFW WR WKH ORJLF OHYHO RQ WKH '40 LQSXWV WZR FORFNV HDUOLHU ,I D JLYHQ '40 VLJQDO ZDV UHJLVWHUHG +LJK WKH FRUUHVSRQGLQJ '4 ZLOO EH +LJK= WZR FORFNV ODWHU LI WKH '40 VLJQDO ZDV UHJLVWHUHG /RZ WKH '4 ZLOO SURYLGH YDOLG GDWD
40 Write
7KH :ULWH FRPPDQG LV XVHG WR LQLWLDWH D EXUVW ZULWH DFFHVV WR DQ DFWLYH URZ 7KH YDOXH RQ WKH %$ %$ LQSXWV VHOHFWV WKH EDQN DQG WKH DGGUHVV SURYLGHG RQ LQ SXWV $$ VHOHFWV WKH VWDUWLQJ FROXPQ ORFDWLRQ 7KH YDOXH RQ LQSXW $ GHWHUPLQHV ZKHWKHU RU QRW DXWR SUHFKDUJH LV XVHG ,I DXWR SUHFKDUJH LV VHOHFWHG WKH URZ EHLQJ DFFHVVHG ZLOO EH SUHFKDUJHG DW WKH HQG RI WKH ZULWH EXUVW LI DXWR SUHFKDUJH LV QRW VHOHFWHG WKH URZ ZLOO UHPDLQ RSHQ IRU VXEVHTXHQW DFFHVVHV ,QSXW GDWD DSSHDULQJ RQ WKH '4 LV ZULWWHQ WR WKH PHPRU\ DUUD\ VXEMHFW WR WKH '40 LQSXW ORJLF OHYHO DSSHDULQJ FRLQFLGHQW ZLWK WKH GDWD ,I D JLYHQ '40 VLJQDO LV UHJLVWHUHG /RZ WKH FRUUHVSRQGLQJ GDWD ZLOO EH ZULWWHQ WR PHPRU\ LI WKH '40 VLJQDO LV UHJLVWHUHG +LJK WKH FRUUHVSRQGLQJ GDWD LQSXWV ZLOO EH LJQRUHG DQG D ZULWH ZLOO QRW EH H[HFXWHG WR WKDW E\WHFROXPQ ORFDWLRQ
41 Precharge
7KH 3UHFKDUJH FRPPDQG LV XVHG WR GHDFWLYDWH WKH RSHQ URZ LQ D SDUWLFXODU EDQN RU WKH RSHQ URZ LQ DOO EDQNV 7KH EDQNV ZLOO EH DYDLODEOH IRU D VXEVHTXHQW URZ DFFHVV D VSHFLILHG WLPH W53 DIWHU WKH SUHFKDUJH FRPPDQG LV LVVXHG ,QSXW $ GHWHUPLQHV ZKHWKHU RQH RU DOO EDQNV DUH WR EH SUHFKDUJHG DQG LQ WKH FDVH ZKHUH RQO\ RQH EDQN LV WR EH SUHFKDUJHG LQSXWV %$ %$ VHOHFW WKH EDQN 2WKHUZLVH %$ %$ DUH WUHDWHG DV 'RQW &DUH 2QFH D EDQN KDV EHHQ SUHFKDUJHG LW LV LQ
116
Mobile SDRAM Type 1
SDRAM_01_A3 November 8, 2005
Preliminary
WKH LGOH VWDWH DQG PXVW EH DFWLYDWHG SULRU WR DQ\ 5HDG RU :ULWH FRPPDQGV EHLQJ LVVXHG WR WKDW EDQN
42 Auto Precharge
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43 Burst Terminate
7KH %XUVW 7HUPLQDWH FRPPDQG LV XVHG WR WUXQFDWH HLWKHU IL[HGOHQJWK RU IXOOSDJH EXUVWV 7KH PRVW UHFHQWO\ UHJLVWHUHG 5HDG RU :ULWH FRPPDQG SULRU WR WKH %XUVW 7HUPLQDWH FRPPDQG ZLOO EH WUXQFDWHG DV VKRZQ LQ WKH 2SHUDWLRQ VHFWLRQ RI WKLV GDWD VKHHW
44 Auto Refresh
$XWR 5HIUHVK LV XVHG GXULQJ QRUPDO RSHUDWLRQ RI WKH 6'5$0 DQG LV DQDORJRXV WR &$6 %()25(5$6 &%5 UHIUHVK LQ FRQYHQWLRQDO '5$0V 7KLV FRPPDQG LV QRQ SHUVLVWHQW VR LW PXVW EH LVVXHG HDFK WLPH D UHIUHVK LV UHTXLUHG $OO DFWLYH EDQNV PXVW EH 35(&+$5*(' SULRU WR LVVXLQJ DQ $XWR 5HIUHVK FRPPDQG 7KH $XWR 5H IUHVK FRPPDQG VKRXOG QRW EH LVVXHG XQWLO WKH PLQLPXP W53 KDV EHHQ PHW DIWHU WKH 3UHFKDUJH FRPPDQG DV VKRZQ LQ WKH RSHUDWLRQ VHFWLRQ 7KH DGGUHVVLQJ LV JHQHUDWHG E\ WKH LQWHUQDO UHIUHVK FRQWUROOHU 7KLV PDNHV WKH DG GUHVV ELWV 'RQW &DUH GXULQJ DQ $XWR 5HIUHVK FRPPDQG 7KH 0E 6'5$0 UHTXLUHV $XWR 5HIUHVK F\FOHV HYHU\ PV W5() 3URYLGLQJ D GLVWULEXWHG $XWR 5HIUHVK FRPPDQG HYHU\ V ZLOO PHHW WKH UHIUHVK UHTXLUHPHQW DQG HQVXUH WKDW HDFK URZ LV UHIUHVKHG $OWHUQDWLYHO\ $XWR 5HIUHVK FRPPDQGV FDQ EH LVVXHG LQ D EXUVW DW WKH PLQLPXP F\FOH UDWH W5)& RQFH HYHU\ PV
45 Self Refresh
7KH 6HOI 5HIUHVK FRPPDQG FDQ EH XVHG WR UHWDLQ GDWD LQ WKH 6'5$0 HYHQ LI WKH UHVW RI WKH V\VWHP LV SRZHUHG GRZQ DV ORQJ DV SRZHU LV QRW FRPSOHWHO\ UHPRYHG IURP WKH 6'5$0 :KHQ LQ WKH VHOI UHIUHVK PRGH WKH 6'5$0 UHWDLQV GDWD ZLWKRXW H[WHUQDO FORFNLQJ 7KH 6HOI 5HIUHVK FRPPDQG LV LQLWLDWHG OLNH DQ $XWR 5HIUHVK FRPPDQG H[FHSW &.( LV GLVDEOHG /RZ 2QFH WKH 6HOI 5HIUHVK FRPPDQG LV UHJ LVWHUHG DOO WKH LQSXWV WR WKH 6'5$0 EHFRPH 'RQW &DUH ZLWK WKH H[FHSWLRQ RI &.( ZKLFK PXVW UHPDLQ /RZ 2QFH VHOI UHIUHVK PRGH LV HQJDJHG WKH 6'5$0 SURYLGHV LWV RZQ LQWHUQDO FORFNLQJ FDXVLQJ LW WR SHUIRUP LWV RZQ DXWR UHIUHVK F\FOHV 7KH 6'5$0 PXVW UHPDLQ LQ VHOI
November 8, 2005 SDRAM_01_A3
Mobile SDRAM Type 1
117
Preliminary
UHIUHVK PRGH IRU D PLQLPXP SHULRG HTXDO WR W5$6 DQG PD\ UHPDLQ LQ VHOI UHIUHVK PRGH IRU DQ LQGHILQLWH SHULRG EH\RQG WKDW 7KH SURFHGXUH IRU H[LWLQJ VHOI UHIUHVK UHTXLUHV D VHTXHQFH RI FRPPDQGV )LUVW &/. PXVW EH VWDEOH VWDEOH FORFN LV GHILQHG DV D VLJQDO F\FOLQJ ZLWKLQ WLPLQJ FRQ VWUDLQWV VSHFLILHG IRU WKH FORFN SLQ SULRU WR &.( JRLQJ EDFN +LJK 2QFH &.( LV +LJK WKH 6'5$0 PXVW KDYH 123 FRPPDQGV LVVXHG D PLQLPXP RI WZR FORFNV IRU W;65 EHFDXVH WLPH LV UHTXLUHG IRU WKH FRPSOHWLRQ RI DQ\ LQWHUQDO UHIUHVK LQ SURJUHVV 8SRQ H[LWLQJ WKH VHOI UHIUHVK PRGH $XWR 5HIUHVK FRPPDQGV PXVW EH LVVXHG HYHU\ V RU OHVV DV ERWK 6HOI 5HIUHVK DQG $XWR 5HIUHVK XWLOL]H WKH URZ UH IUHVK FRXQWHU
46 Deep Power-down
7KH RSHUDWLQJ PRGH GHHS SRZHUGRZQ DFKLHYHV PD[LPXP SRZHU UHGXFWLRQ E\ HOLPLQDWLQJ WKH SRZHU RI WKH ZKROH PHPRU\ DUUD\ RI WKH GHYLFH $UUD\ GDWD ZLOO QRW EH UHWDLQHG RQFH WKH GHYLFH HQWHUV GHHS SRZHUGRZQ PRGH 7KLV PRGH LV HQWHUHG E\ KDYLQJ DOO EDQNV LGOH WKHQ &6 DQG :( KHOG ORZ ZLWK 5$6 DQG &$6 KHOG KLJK DW WKH ULVLQJ HGJH RI WKH FORFN ZKLOH &.( LV ORZ 7KLV PRGH LV H[LWHG E\ DVVHUWLQJ &.( KLJK
47 Operation
47.1 Bank/Row Activation
%HIRUH DQ\ 5HDG RU :ULWH FRPPDQGV FDQ EH LVVXHG WR D EDQN ZLWKLQ WKH 6'5$0 D URZ LQ WKDW EDQN PXVW EH RSHQHG 7KLV LV DFFRPSOLVKHG YLD WKH $FWLYH FRP PDQG ZKLFK VHOHFWV ERWK WKH EDQN DQG WKH URZ WR EH DFWLYDWHG VHH )LJXUH $FWLYDWLQJ D 6SHFLILF 5RZ LQ D 6SHFLILF %DQN 5HJLVWHU $IWHU RSHQLQJ D URZ LVVXLQJ DQ $FWLYH FRPPDQG D 5HDG RU :ULWH FRPPDQG PD\ EH LVVXHG WR WKDW URZ VXEMHFW WR WKH W5&' VSHFLILFDWLRQ W5&' 0,1 VKRXOG EH GL YLGHG E\ WKH FORFN SHULRG DQG URXQGHG XS WR WKH QH[W ZKROH QXPEHU WR GHWHUPLQH WKH HDUOLHVW FORFN HGJH DIWHU WKH $FWLYH FRPPDQG RQ ZKLFK D 5HDG RU :ULWH FRP PDQG FDQ EH HQWHUHG )RU H[DPSOH D W5&' VSHFLILFDWLRQ RI QV ZLWK D 0+] FORFN QV SHULRG UHVXOWV LQ FORFNV URXQGHG WR 7KLV LV UHIOHFWHG LQ )LJXUH ZKLFK FRYHUV DQ\ FDVH ZKHUH W5&' 0,1W&. 7KH VDPH SUR FHGXUH LV XVHG WR FRQYHUW RWKHU VSHFLILFDWLRQ OLPLWV IURP WLPH XQLWV WR FORFN F\FOHV $ VXEVHTXHQW $FWLYH FRPPDQG WR D GLIIHUHQW URZ LQ WKH VDPH EDQN FDQ RQO\ EH LVVXHG DIWHU WKH SUHYLRXV DFWLYH URZ KDV EHHQ FORVHG SUHFKDUJHG 7KH PLQL PXP WLPH LQWHUYDO EHWZHHQ VXFFHVVLYH $FWLYH FRPPDQGV WR WKH VDPH EDQN LV GHILQHG E\ W5& $ VXEVHTXHQW $FWLYH FRPPDQG WR DQRWKHU EDQN FDQ EH LVVXHG ZKLOH WKH ILUVW EDQN LV EHLQJ DFFHVVHG ZKLFK UHVXOWV LQ D UHGXFWLRQ RI WRWDO URZDFFHVV RYHUKHDG 7KH PLQLPXP WLPH LQWHUYDO EHWZHHQ VXFFHVVLYH $FWLYH FRPPDQGV WR GLIIHUHQW EDQNV LV GHILQHG E\ W55'
118
Mobile SDRAM Type 1
SDRAM_01_A3 November 8, 2005
Preliminary
CLK CKE CS# HIGH
RAS#
CAS# WE#
A0-A10, A11
ROW ADDRESS
BA0, BA1
BANK ADDRESS
DON'T CARE
Figure 47.1 Activating a Specific Row in a Specific Bank Register
T0 CLK
T1
T2
T3
T4
COMMAND
ACTIVE
NOP
NOP
READ or WRITE
tRCD
DON'T CARE
Figure 47.2.
Meeting tRCD (MIN) when 2 < tRCD (MIN)/tCK 3
47.2 Reads
5HDG EXUVWV DUH LQLWLDWHG ZLWK D 5HDG FRPPDQG DV VKRZQ LQ )LJXUH 7KH VWDUWLQJ FROXPQ DQG EDQN DGGUHVVHV DUH SURYLGHG ZLWK WKH 5HDG FRPPDQG DQG DXWR SUHFKDUJH LV HLWKHU HQDEOHG RU GLVDEOHG IRU WKDW EXUVW DFFHVV ,I DXWR SUH FKDUJH LV HQDEOHG WKH URZ EHLQJ DFFHVVHG LV SUHFKDUJHG DW WKH FRPSOHWLRQ RI WKH EXUVW )RU WKH JHQHULF 5HDG FRPPDQGV XVHG LQ WKH IROORZLQJ LOOXVWUDWLRQV DXWR SUHFKDUJH LV GLVDEOHG 'XULQJ 5HDG EXUVWV WKH YDOLG GDWDRXW HOHPHQW IURP WKH VWDUWLQJ FROXPQ DGGUHVV ZLOO EH DYDLODEOH IROORZLQJ WKH &$6 ODWHQF\ DIWHU WKH 5HDG FRPPDQG (DFK VXEVH TXHQW GDWDRXW HOHPHQW ZLOO EH YDOLG E\ WKH QH[W SRVLWLYH FORFN HGJH )LJXUH &$6 /DWHQF\ RQ SDJH VKRZV JHQHUDO WLPLQJ IRU HDFK SRVVLEOH &$6 ODWHQF\ VHWWLQJ
November 8, 2005 SDRAM_01_A3
Mobile SDRAM Type 1
119
Preliminary
8SRQ FRPSOHWLRQ RI D EXUVW DVVXPLQJ QR RWKHU FRPPDQGV KDYH EHHQ LQLWLDWHG WKH '4 ZLOO JR +LJK= $ IXOOSDJH EXUVW ZLOO FRQWLQXH XQWLO WHUPLQDWHG $W WKH HQG RI WKH SDJH LW ZLOO ZUDS WR FROXPQ DQG FRQWLQXH 'DWD IURP DQ\ 5HDG EXUVW PD\ EH WUXQFDWHG ZLWK D VXEVHTXHQW 5HDG FRPPDQG DQG GDWD IURP D IL[HG OHQJWK 5HDG EXUVW PD\ EH LPPHGLDWHO\ IROORZHG E\ GDWD IURP D 5HDG FRPPDQG ,Q HLWKHU FDVH D FRQWLQXRXV IORZ RI GDWD FDQ EH PDLQ WDLQHG 7KH ILUVW GDWD HOHPHQW IURP WKH QHZ EXUVW IROORZV HLWKHU WKH ODVW HOHPHQW RI D FRPSOHWHG EXUVW RU WKH ODVW GHVLUHG GDWD HOHPHQW RI D ORQJHU EXUVW WKDW LV EHLQJ WUXQFDWHG 7KH QHZ 5HDG FRPPDQG VKRXOG EH LVVXHG [ F\FOHV EHIRUH WKH FORFN HGJH DW ZKLFK WKH ODVW GHVLUHG GDWD HOHPHQW LV YDOLG ZKHUH [ HTXDOV WKH &$6 ODWHQF\ PLQXV RQH 7KLV LV VKRZQ LQ )LJXUH &RQVHFXWLYH 5HDG %XUVWV RQ SDJH IRU &$6 ODWHQFLHV RI WZR DQG WKUHH GDWD HOHPHQW Q LV HLWKHU WKH ODVW RI D EXUVW RI IRXU RU WKH ODVW GHVLUHG RI D ORQJHU EXUVW 7KH 0E 6'5$0 XVHV D SLSHOLQHG DUFKL WHFWXUH DQG WKHUHIRUH GRHV QRW UHTXLUH WKH Q UXOH DVVRFLDWHG ZLWK D SUHIHWFK DUFKLWHFWXUH $ 5HDG FRPPDQG FDQ EH LQLWLDWHG RQ DQ\ FORFN F\FOH IROORZLQJ D SUH YLRXV 5HDG FRPPDQG )XOOVSHHG UDQGRP UHDG DFFHVVHV FDQ EH SHUIRUPHG WR WKH VDPH EDQN DV VKRZQ LQ )LJXUH 5DQGRP 5HDG $FFHVVHV RQ SDJH RU HDFK VXEVHTXHQW 5HDG PD\ EH SHUIRUPHG WR D GLIIHUHQW EDQN 'DWD IURP DQ\ 5HDG EXUVW PD\ EH WUXQFDWHG ZLWK D VXEVHTXHQW :ULWH FRPPDQG DQG GDWD IURP D IL[HG OHQJWK 5HDG EXUVW PD\ EH LPPHGLDWHO\ IROORZHG E\ GDWD IURP D :ULWH FRPPDQG VXEMHFW WR EXV WXUQDURXQG OLPLWDWLRQV 7KH :ULWH EXUVW PD\ EH LQLWLDWHG RQ WKH FORFN HGJH LPPHGLDWHO\ IROORZLQJ WKH ODVW RU ODVW GHVLUHG GDWD HOHPHQW IURP WKH 5HDG EXUVW SURYLGHG WKDW ,2 FRQWHQWLRQ FDQ EH DYRLGHG ,Q D JLYHQ V\VWHP GHVLJQ WKHUH PD\ EH D SRVVLELOLW\ WKDW WKH GHYLFH GULYLQJ WKH LQSXW GDWD ZLOO JR /RZ= EHIRUH WKH 6'5$0 '4 JR +LJK= ,Q WKLV FDVH DW OHDVW D VLQJOH F\FOH GHOD\ VKRXOG RFFXU EHWZHHQ WKH ODVW UHDG GDWD DQG WKH :ULWH FRPPDQG
120
Mobile SDRAM Type 1
SDRAM_01_A3 November 8, 2005
Preliminary
CLK CKE CS# HIGH
RAS#
CAS# WE#
A0-A8
COLUMN ADDRESS
A9, A11
ENABLE AUTO PRECHARGE
A10
DISABLE AUTO PRECHARGE
BA0,1
BANK ADDRESS
DON'T CARE
Figure 47.1
Read Command
November 8, 2005 SDRAM_01_A3
Mobile SDRAM Type 1
121
Preliminary
T0 CLK
T1
T2
T3
T4
T5
T6
COMMAND
READ
NOP
NOP
NOP
READ
NOP
NOP
X = 1 cycle
ADDRESS
BANK, COL n
BANK, COL b
DQ
CAS Latency = 2
DOUT n
DOUT n+1
DOUT n+2
DOUT n+ 3
DOUT b
T0 CLK
T1
T2
T3
T4
T5
T6
T7
COMMAND
READ
NOP
NOP
NOP
READ
NOP
NOP
NOP
X = 2 cycles
ADDRESS
BANK, COL n
BANK, COL b
DQ
CAS Latency = 3
DOUT n
DOUT n+ 1
DOUT n+ 2
DOUT n+ 3
DOUT b
TRANSITIONING DATA
DON'T CARE
Figure 47.2.
Consecutive Read Bursts
1RWH (DFK 5HDG FRPPDQG PD\ EH WR DQ\ EDQN '40 LV /RZ
T0 CLK T1 T2 T3 T4 T5
COMMAND
READ
READ
READ
READ
NOP
NOP
ADDRESS
BANK, COL n
BANK, COL a
BANK, COL x
BANK, COL m
DQ
CAS Latency = 2
DOUT n
DOUT a
DOUT x
DOUT m
T0 CLK
T1
T2
T3
T4
T5
T6
COMMAND
READ
READ
READ
READ
NOP
NOP
NOP
ADDRESS
BANK, COL n
BANK, COL a
BANK, COL x
BANK, COL m
DQ
CAS Latency = 3
DOUT n
DOUT a
DOUT x
DOUT m
TRANSITIONING DATA
DON'T CARE
Figure 47.3.
Random Read Accesses
1RWH (DFK 5HDG FRPPDQG PD\ EH WR DQ\ EDQN '40 LV ORZ
7KH '40 LQSXW LV XVHG WR DYRLG ,2 FRQWHQWLRQ DV VKRZQ LQ )LJXUH DQG )LJXUH 7KH '40 VLJQDO PXVW EH DVVHUWHG +LJK DW OHDVW WZR FORFNV SULRU WR WKH :ULWH FRPPDQG '40 ODWHQF\ LV WZR FORFNV IRU RXWSXW EXIIHUV WR VXSSUHVV
122
Mobile SDRAM Type 1
SDRAM_01_A3 November 8, 2005
Preliminary
GDWDRXW IURP WKH 5HDG 2QFH WKH :ULWH FRPPDQG LV UHJLVWHUHG WKH '4 ZLOO JR +LJK= RU UHPDLQ +LJK= UHJDUGOHVV RI WKH VWDWH RI WKH '40 VLJQDO SURYLGHG WKH '40 ZDV DFWLYH RQ WKH FORFN MXVW SULRU WR WKH :ULWH FRPPDQG WKDW WUXQFDWHG WKH 5HDG FRPPDQG ,I QRW WKH VHFRQG :ULWH ZLOO EH DQ LQYDOLG :ULWH )RU H[DPSOH LI '40 ZDV /RZ GXULQJ 7 LQ )LJXUH WKHQ WKH :ULWHV DW 7 DQG 7 ZRXOG EH YDOLG ZKLOH WKH :ULWH DW 7 ZRXOG EH LQYDOLG 7KH '40 VLJQDO PXVW EH GHDVVHUWHG SULRU WR WKH :ULWH FRPPDQG '40 ODWHQF\ LV ]HUR FORFNV IRU LQSXW EXIIHUV WR HQVXUH WKDW WKH ZULWWHQ GDWD LV QRW PDVNHG )LJXUH VKRZV WKH FDVH ZKHUH WKH FORFN IUHTXHQF\ DOORZV IRU EXV FRQWHQWLRQ WR EH DYRLGHG ZLWKRXW DGGLQJ D 123 F\FOH DQG VKRZV WKH FDVH ZKHUH WKH DGGL WLRQDO 123 LV QHHGHG $ IL[HGOHQJWK 5HDG EXUVW PD\ EH IROORZHG E\ RU WUXQFDWHG ZLWK D 3UHFKDUJH FRPPDQG WR WKH VDPH EDQN SURYLGHG WKDW DXWR SUHFKDUJH ZDV QRW DFWLYDWHG DQG D IXOOSDJH EXUVW PD\ EH WUXQFDWHG ZLWK D 3UHFKDUJH FRP PDQG WR WKH VDPH EDQN 7KH 3UHFKDUJH FRPPDQG VKRXOG EH LVVXHG [ F\FOHV EHIRUH WKH FORFN HGJH DW ZKLFK WKH ODVW GHVLUHG GDWD HOHPHQW LV YDOLG ZKHUH [ HTXDOV WKH &$6 ODWHQF\ PLQXV RQH 7KLV LV VKRZQ LQ )LJXUH IRU HDFK SRVVLEOH &$6 ODWHQF\ GDWD HOHPHQW Q LV HLWKHU WKH ODVW RI D EXUVW RI IRXU RU WKH ODVW GHVLUHG RI D ORQJHU EXUVW )ROORZLQJ WKH 3UHFKDUJH FRPPDQG D VXEVHTXHQW FRP PDQG WR WKH VDPH EDQN FDQQRW EH LVVXHG XQWLO W53 LV PHW 1RWH WKDW SDUW RI WKH URZ SUHFKDUJH WLPH LV KLGGHQ GXULQJ WKH DFFHVV RI WKH ODVW GDWD HOHPHQWV ,Q WKH FDVH RI D IL[HGOHQJWK EXUVW EHLQJ H[HFXWHG WR FRPSOHWLRQ D 3UHFKDUJH FRPPDQG LVVXHG DW WKH RSWLPXP WLPH DV GHVFULEHG DERYH SURYLGHV WKH VDPH RSHUDWLRQ WKDW ZRXOG UHVXOW IURP WKH VDPH IL[HGOHQJWK EXUVW ZLWK DXWR SUH FKDUJH 7KH GLVDGYDQWDJH RI WKH 3UHFKDUJH FRPPDQG LV WKDW LW UHTXLUHV WKDW WKH FRPPDQG DQG DGGUHVV EXVHV EH DYDLODEOH DW WKH DSSURSULDWH WLPH WR LVVXH WKH FRPPDQG WKH DGYDQWDJH RI WKH 3UHFKDUJH FRPPDQG LV WKDW LW FDQ EH XVHG WR WUXQFDWH IL[HGOHQJWK RU IXOOSDJH EXUVWV
T0 CLK DQM T1 T2 T3 T4
COMMAND ADDRESS
READ
NOP
NOP
NOP
WRITE
BANK, COL n
BANK, COL b
tCK tHZ DQ
DOUT n DIN b
tDS
Figure 47.4.
Read to Write
November 8, 2005 SDRAM_01_A3
Mobile SDRAM Type 1
123
Preliminary
T0 CLK DQM COMMAND ADDRESS
READ BANK, COL n
T1
T2
T3
T4
T5
NOP
NOP
NOP
NOP
WRITE BANK, COL b
tHZ DQ
DOUT n DIN b
tDS DON'T CARE
Figure 47.5. Read to Write with Extra Clock Cycle
1RWH $ &$6 ODWHQF\ RI WKUHH LV XVHG IRU LOOXVWUDWLRQ 7KH 5HDG FRPPDQG PD\ EH WR DQ\ EDQN DQG WKH :ULWH FRPPDQG PD\ EH WR DQ\ EDQN
T0 CLK
T1
T2
T3
T4
T5
T6
T7
t RP
COMMAND
READ
NOP
NOP
NOP
PRECHARGE
NOP
NOP
ACTIVE
X = 1 cycle
ADDRESS
BANK a, COL n
BANK (a or all)
BANK a, ROW
DQ
CAS Latency = 2
DOUT n
DOUT n+1
DOUT n+2
DOUT n+3
T0 CLK
T1
T2
T3
T4
T5
T6
T7
t RP
COMMAND
READ
NOP
NOP
NOP
PRECHARGE
NOP X = 2 cycles
NOP
ACTIVE
ADDRESS
BANK a, COL n
BANK (a or all)
BANK a, ROW
DQ
CAS Latency = 3
DOUT n
DOUT n+1
DOUT n+2
DOUT n+3
TRANSITIONING DATA
DON'T CARE
Figure 47.6.
1RWH '40 LV ORZ
Read to Precharge
124
Mobile SDRAM Type 1
SDRAM_01_A3 November 8, 2005
Preliminary
T0 CLK
T1
T2
T3
T4
T5
T6
COMMAND
READ
NOP
NOP
NOP
BURST TERMINATE
NOP
NOP
X = 1 cycle
ADDRESS
BANK, COL n
DQ
CAS Latency = 2
DOUT n
DOUT n+ 1
DOUT n+ 2
DOUT n+ 3
T0 CLK
T1
T2
T3
T4
T5
T6
T7
COMMAND
READ
NOP
NOP
NOP
BURST TERMINATE
NOP X = 2 cycles
NOP
NOP
ADDRESS
BANK, COL n
DQ
CAS Latency = 3
DOUT n
DOUT n+1
DOUT n+2
DOUT n+3
TRANSITIONING DATA
DON'T CARE
Figure 47.7. Terminating a Read Burst
1RWH '40 LV ORZ
)XOOSDJH 5HDG EXUVWV FDQ EH WUXQFDWHG ZLWK WKH %XUVW 7HUPLQDWH FRPPDQG DQG IL[HGOHQJWK 5HDG EXUVWV PD\ EH WUXQFDWHG ZLWK D %XUVW 7HUPLQDWH FRPPDQG SURYLGHG WKDW DXWR SUHFKDUJH ZDV QRW DFWLYDWHG 7KH %XUVW 7HUPLQDWH FRPPDQG VKRXOG EH LVVXHG [ F\FOHV EHIRUH WKH FORFN HGJH DW ZKLFK WKH ODVW GHVLUHG GDWD HO HPHQW LV YDOLG ZKHUH [ HTXDOV WKH &$6 ODWHQF\ PLQXV RQH 7KLV LV VKRZQ LQ )LJXUH IRU HDFK SRVVLEOH &$6 ODWHQF\ GDWD HOHPHQW Q LV WKH ODVW GHVLUHG GDWD HOHPHQW RI D ORQJHU EXUVW
47.3
Writes
:ULWH EXUVWV DUH LQLWLDWHG ZLWK D :ULWH FRPPDQG DV VKRZQ LQ )LJXUH 7KH VWDUWLQJ FROXPQ DQG EDQN DGGUHVVHV DUH SURYLGHG ZLWK WKH :ULWH FRPPDQG DQG DXWR SUHFKDUJH LV HLWKHU HQDEOHG RU GLVDEOHG IRU WKDW DFFHVV ,I DXWR SUH FKDUJH LV HQDEOHG WKH URZ EHLQJ DFFHVVHG LV SUHFKDUJHG DW WKH FRPSOHWLRQ RI WKH EXUVW )RU WKH JHQHULF :ULWH FRPPDQGV XVHG LQ WKH IROORZLQJ LOOXVWUDWLRQV DXWR SUHFKDUJH LV GLVDEOHG 'XULQJ :ULWH EXUVWV WKH ILUVW YDOLG GDWDLQ HOHPHQW ZLOO EH UHJLVWHUHG FRLQFLGHQW ZLWK WKH :ULWH FRPPDQG 6XEVHTXHQW GDWD HOHPHQWV ZLOO EH UHJLVWHUHG RQ HDFK VXFFHVVLYH SRVLWLYH FORFN HGJH 8SRQ FRPSOHWLRQ RI D IL[HGOHQJWK EXUVW DVVXP LQJ QR RWKHU FRPPDQGV KDYH EHHQ LQLWLDWHG WKH '4 ZLOO UHPDLQ +LJK= DQG DQ\ DGGLWLRQDO LQSXW GDWD ZLOO EH LJQRUHG VHH )LJXUH $ IXOOSDJH EXUVW ZLOO FRQ WLQXH XQWLO WHUPLQDWHG $W WKH HQG RI WKH SDJH LW ZLOO ZUDS WR FROXPQ DQG FRQWLQXH
November 8, 2005 SDRAM_01_A3
Mobile SDRAM Type 1
125
Preliminary
CLK CKE HIGH CS#
RAS#
CAS# WE#
A0-A8 A9, A11
COLUMN ADDRESS
ENABLE AUTO PRECHARGE
A10
DISABLE AUTO PRECHARGE
BA0,1
BANK ADDRESS
VALID ADDRESS
DON'T CARE
Figure 47.1
Write Command
'DWD IRU DQ\ :ULWH EXUVW PD\ EH WUXQFDWHG ZLWK D VXEVHTXHQW :ULWH FRPPDQG DQG GDWD IRU D IL[HG OHQJWK :ULWH EXUVW PD\ EH LPPHGLDWHO\ IROORZHG E\ GDWD IRU D :ULWH FRPPDQG 7KH QHZ :ULWH FRPPDQG FDQ EH LVVXHG RQ DQ\ FORFN IROORZLQJ WKH SUHYLRXV :ULWH FRPPDQG DQG WKH GDWD SURYLGHG FRLQFLGHQW ZLWK WKH QHZ FRPPDQG DSSOLHV WR WKH QHZ FRPPDQG $Q H[DPSOH LV VKRZQ LQ )LJXUH 'DWD Q LV HLWKHU WKH ODVW RI D EXUVW RI WZR RU WKH ODVW GHVLUHG RI D ORQJHU EXUVW 7KH 0E 6'5$0 XVHV D SLSHOLQHG DUFKLWHFWXUH DQG WKHUHIRUH GRHV QRW UHTXLUH WKH Q UXOH DVVRFLDWHG ZLWK D SUHIHWFK DUFKLWHFWXUH $ :ULWH FRPPDQG FDQ EH LQL WLDWHG RQ DQ\ FORFN F\FOH IROORZLQJ D SUHYLRXV :ULWH FRPPDQG )XOOVSHHG UDQGRP ZULWH DFFHVVHV ZLWKLQ D SDJH FDQ EH SHUIRUPHG WR WKH VDPH EDQN DV VKRZQ LQ )LJXUH RU HDFK VXEVHTXHQW :ULWH PD\ EH SHUIRUPHG WR D GLIIHUHQW EDQN
126
Mobile SDRAM Type 1
SDRAM_01_A3 November 8, 2005
Preliminary
T0 CLK
T1
T2
T3
COMMAND
WRITE
NOP
NOP
NOP
ADDRESS
BANK, COL n
DQ
DIN n
DIN n+1
DON'T CARE
Figure 47.2. Write Burst
1RWH %XUVW OHQJWK '40 LV ORZ
T0
T1
T2
CLK
COMMAND
WRITE
NOP
WRITE
ADDRESS
BANK, COL n
BANK, COL b
DQ
DIN n
DIN n+1
DIN b
DON'T CARE
Figure 47.3.
Write to Write
1RWH '40 LV ORZ (DFK :ULWH FRPPDQG PD\ EH WR DQ\ EDQN
'DWD IRU DQ\ :ULWH EXUVW PD\ EH WUXQFDWHG ZLWK D VXEVHTXHQW 5HDG FRPPDQG DQG GDWD IRU D IL[HG OHQJWK :ULWH EXUVW PD\ EH LPPHGLDWHO\ IROORZHG E\ D 5HDG FRPPDQG 2QFH WKH 5HDG FRPPDQG LV UHJLVWHUHG WKH GDWD LQSXWV ZLOO EH LJQRUHG DQG ZULWHV ZLOO QRW EH H[HFXWHG $Q H[DPSOH LV VKRZQ LQ )LJXUH 'DWD Q LV HLWKHU WKH ODVW RI D EXUVW RI WZR RU WKH ODVW GHVLUHG RI D ORQJHU EXUVW 'DWD IRU D IL[HGOHQJWK :ULWH EXUVW PD\ EH IROORZHG E\ RU WUXQFDWHG ZLWK D 3UH FKDUJH FRPPDQG WR WKH VDPH EDQN SURYLGHG WKDW DXWR SUHFKDUJH ZDV QRW DFWLYDWHG DQG D IXOOSDJH :ULWH EXUVW PD\ EH WUXQFDWHG ZLWK D 3UHFKDUJH FRP PDQG WR WKH VDPH EDQN 7KH 3UHFKDUJH FRPPDQG VKRXOG EH LVVXHG W:5 DIWHU WKH FORFN HGJH DW ZKLFK WKH ODVW GHVLUHG LQSXW GDWD HOHPHQW LV UHJLVWHUHG 7KH DXWR SUHFKDUJH PRGH UHTXLUHV D W:5 RI DW OHDVW RQH FORFN SOXV WLPH UHJDUGOHVV RI IUHTXHQF\ ,Q DGGLWLRQ ZKHQ WUXQFDWLQJ D :ULWH EXUVW WKH '40 VLJQDO PXVW EH XVHG WR PDVN LQSXW GDWD IRU WKH FORFN HGJH SULRU WR DQG WKH FORFN HGJH FRLQFLGHQW ZLWK WKH 3UH FKDUJH FRPPDQG $Q H[DPSOH LV VKRZQ LQ )LJXUH 'DWD Q LV HLWKHU WKH ODVW RI D EXUVW RI WZR RU WKH ODVW GHVLUHG RI D ORQJHU EXUVW )ROORZLQJ WKH 3UHFKDUJH
November 8, 2005 SDRAM_01_A3
Mobile SDRAM Type 1
127
Preliminary
FRPPDQG D VXEVHTXHQW FRPPDQG WR WKH VDPH EDQN FDQQRW EH LVVXHG XQWLO W53 LV PHW
T0 CLK
T1
T2
T3
COMMAND
WRITE
WRITE
WRITE
WRITE
ADDRESS
BANK, COL n
BANK, COL a
BANK, COL x
BANK, COL m
DQ
DIN n
DIN a
DIN x
DIN m
DON'T CARE
Figure 47.4.
Random Write Cycles
1RWH (DFK :ULWH FRPPDQG PD\ EH WR DQ\ EDQN '40 LV ORZ
T0 CLK T1 T2 T3 T4 T5
COMMAND
WRITE
NOP
READ
NOP
NOP
NOP
ADDRESS
BANK, COL n
BANK, COL b
DQ
DIN n
DIN n+1
DOUT b
DOUT b+1
DON'T CARE
Figure 47.5.
Write to Read
1RWH 7KH :ULWH FRPPDQG PD\ EH WR DQ\ EDQN DQG WKH 5HDG FRPPDQG PD\ EH WR DQ\ EDQN '40 LV ORZ &$6 ODWHQF\ IRU LOOXVWUDWLRQ
,Q WKH FDVH RI D IL[HGOHQJWK EXUVW EHLQJ H[HFXWHG WR FRPSOHWLRQ D 3UHFKDUJH FRPPDQG LVVXHG DW WKH RSWLPXP WLPH DV GHVFULEHG DERYH SURYLGHV WKH VDPH RSHUDWLRQ WKDW ZRXOG UHVXOW IURP WKH VDPH IL[HGOHQJWK EXUVW ZLWK DXWR SUH FKDUJH 7KH GLVDGYDQWDJH RI WKH 3UHFKDUJH FRPPDQG LV WKDW LW UHTXLUHV WKDW WKH FRPPDQG DQG DGGUHVV EXVHV EH DYDLODEOH DW WKH DSSURSULDWH WLPH WR LVVXH WKH FRPPDQG WKH DGYDQWDJH RI WKH 3UHFKDUJH FRPPDQG LV WKDW LW FDQ EH XVHG WR WUXQFDWH IL[HGOHQJWK RU IXOOSDJH EXUVWV )L[HGOHQJWK RU IXOOSDJH :ULWH EXUVWV FDQ EH WUXQFDWHG ZLWK WKH %XUVW 7HUPLQDWH FRPPDQG :KHQ WUXQFDWLQJ D :ULWH EXUVW WKH LQSXW GDWD DSSOLHG FRLQFLGHQW ZLWK WKH %XUVW 7HUPLQDWH FRPPDQG ZLOO EH LJQRUHG 7KH ODVW GDWD ZULWWHQ SURYLGHG WKDW '40 LV /RZ DW WKDW WLPH ZLOO EH WKH LQSXW GDWD DSSOLHG RQH FORFN SUHYLRXV WR WKH %XUVW 7HUPLQDWH FRPPDQG 7KLV LV VKRZQ LQ )LJXUH ZKHUH GDWD Q LV WKH ODVW GHVLUHG GDWD HOHPHQW RI D ORQJHU EXUVW
128
Mobile SDRAM Type 1
SDRAM_01_A3 November 8, 2005
Preliminary
T0 CLK
tWR@ tCK 15ns
T1
T2
T3
T4
T5
T6
DQM
t RP
COMMAND
WRITE
NOP
PRECHARGE
NOP
NOP
ACTIVE
NOP
ADDRESS
BANK a, COL n
t WR
BANK (a or all)
BANK a, ROW
DQ
DIN n
DIN n+1
tWR@ tCK < 15ns
DQM
t RP
COMMAND ADDRESS
WRITE
NOP
NOP
PRECHARGE
NOP
NOP
ACTIVE
BANK a, COL n
t WR
BANK (a or all)
BANK a, ROW
DQ
DIN n
DIN n+1
DON'T CARE
Figure 47.6.
Write to Precharge
1RWH '40 FRXOG UHPDLQ ORZ LQ WKLV H[DPSOH LI WKH :ULWH EXUVW LV D IL[HG OHQJWK RI WZR
47.4 Precharge
7KH 3UHFKDUJH FRPPDQG VHH )LJXUH LV XVHG WR GHDFWLYDWH WKH RSHQ URZ LQ D SDUWLFXODU EDQN RU WKH RSHQ URZ LQ DOO EDQNV 7KH EDQNV ZLOO EH DYDLODEOH IRU D VXEVHTXHQW URZ DFFHVV VRPH VSHFLILHG WLPH W53 DIWHU WKH SUHFKDUJH FRPPDQG LV LVVXHG ,QSXW $ GHWHUPLQHV ZKHWKHU RQH RU DOO EDQNV DUH WR EH SUHFKDUJHG DQG LQ WKH FDVH ZKHUH RQO\ RQH EDQN LV WR EH SUHFKDUJHG LQSXWV %$ %$ VHOHFW WKH EDQN :KHQ DOO EDQNV DUH WR EH SUHFKDUJHG LQSXWV %$ %$ DUH WUHDWHG DV 'RQW &DUH 2QFH D EDQN KDV EHHQ SUHFKDUJHG LW LV LQ WKH LGOH VWDWH DQG PXVW EH DFWLYDWHG SULRU WR DQ\ 5HDG RU :ULWH FRPPDQGV EHLQJ LVVXHG WR WKDW EDQN
47.5 Power-down
3RZHUGRZQ RFFXUV LI &.( LV UHJLVWHUHG ORZ FRLQFLGHQW ZLWK D 123 RU &RPPDQG ,QKLELW ZKHQ QR DFFHVVHV DUH LQ SURJUHVV ,I SRZHUGRZQ RFFXUV ZKHQ DOO EDQNV DUH LGOH WKLV PRGH LV UHIHUUHG WR DV SUHFKDUJH SRZHUGRZQ LI SRZHUGRZQ RFFXUV ZKHQ WKHUH LV D URZ DFWLYH LQ DQ\ EDQN WKLV PRGH LV UHIHUUHG WR DV DFWLYH SRZHU GRZQ (QWHULQJ SRZHUGRZQ GHDFWLYDWHV WKH LQSXW DQG RXWSXW EXIIHUV H[FOXGLQJ &.( IRU PD[LPXP SRZHU VDYLQJV ZKLOH LQ VWDQGE\ 7KH GHYLFH PD\ QRW UHPDLQ LQ WKH SRZHUGRZQ VWDWH ORQJHU WKDQ WKH UHIUHVK SHULRG PV VLQFH QR UHIUHVK RSHUDWLRQV DUH SHUIRUPHG LQ WKLV PRGH 7KH SRZHUGRZQ VWDWH LV H[LWHG E\ UHJLV WHULQJ D 123 RU &RPPDQG ,QKLELW DQG &.( +LJK DW WKH GHVLUHG FORFN HGJH PHHWLQJ W&.6 6HH )LJXUH
November 8, 2005 SDRAM_01_A3
Mobile SDRAM Type 1
129
Preliminary
CLK tCKS CKE
(( )) (( ))
> t CKS
(( ))
COMMAND
NOP
All banks idle
(( )) (( ))
NOP
ACTIVE
Input buffers gated off Exit power-down mode.
t RCD t RAS t RC
Enter power-down mode.
Figure 47.1.
Power-Down
T0 CLK
T1
T2
COMMAND
WRITE
BURST TERMINATE
NEXT COMMAND
ADDRESS
BANK, COL n
(ADDRESS)
DQ
DIN n
(DATA)
TRANSITIONING DATA
DON'T CARE
Figure 47.2. Terminating a Write Burst
1RWH '40V DUH ORZ
CLK CKE CS# HIGH
RAS#
CAS# WE#
A0-A9, A11
All Banks
A10
Bank Selected
BA0,1
BANK ADDRESS
VALID ADDRESS
DON'T CARE
Figure 47.3.
Precharge Command
130
Mobile SDRAM Type 1
SDRAM_01_A3 November 8, 2005
Preliminary
47.6 Deep Power-down
'HHS 3RZHU 'RZQ PRGH LV D PD[LPXP SRZHU VDYLQJV IHDWXUH DFKLHYHG E\ VKXW WLQJ RII WKH SRZHU WR WKH HQWLUH PHPRU\ DUUD\ RI WKH GHYLFH 'DWD RQ WKH PHPRU\ DUUD\ ZLOO QRW EH UHWDLQHG RQFH 'HHS 3RZHU 'RZQ PRGH LV H[HFXWHG 'HHS 3RZHU 'RZQ PRGH LV HQWHUHG E\ KDYLQJ DOO EDQNV LGOH WKHQ &6 DQG :( KHOG ORZ ZLWK 5$6 DQG &$6 KLJK DW WKH ULVLQJ HGJH RI WKH FORFN ZKLOH &.( LV ORZ &.( PXVW EH KHOG ORZ GXULQJ GHHS SRZHUGRZQ ,Q RUGHU WR H[LW 'HHS 3RZHU 'RZQ PRGH &.( PXVW EH DVVHUWHG KLJK $IWHU H[LW LQJ WKH IROORZLQJ VHTXHQFH LV QHHGHG LQ RUGHU WR HQWHU D QHZ FRPPDQG 0DLQWDLQ 123 LQSXW FRQGLWLRQV IRU D PLQLPXP RI XV ,VVXH 3UHFKDUJH FRPPDQGV IRU DOO EDQNV ,VVXH HLJKW RU PRUH $8725()5(6+ FRPPDQGV 7KH YDOXHV RI WKH PRGH UHJLVWHU DQG H[WHQGHG PRGH UHJLVWHU ZLOO EH UHWDLQHG XSRQ H[LWLQJ GHHS SRZHU GRZQ
47.7 Clock Suspend
7KH FORFN VXVSHQG PRGH RFFXUV ZKHQ D FROXPQ DFFHVVEXUVW LV LQ SURJUHVV DQG &.( LV UHJLVWHUHG ORZ ,Q WKH FORFN VXVSHQG PRGH WKH LQWHUQDO FORFN LV GHDFWL YDWHG IUHH]LQJ WKH V\QFKURQRXV ORJLF )RU HDFK SRVLWLYH FORFN HGJH RQ ZKLFK &.( LV VDPSOHG /RZ WKH QH[W LQWHUQDO SRV LWLYH FORFN HGJH LV VXVSHQGHG $Q\ FRPPDQG RU GDWD SUHVHQW RQ WKH LQSXW SLQV DW WKH WLPH RI D VXVSHQGHG LQWHUQDO FORFN HGJH LV LJQRUHG DQ\ GDWD SUHVHQW RQ WKH '4 SLQV UHPDLQV GULYHQ DQG EXUVW FRXQWHUV DUH QRW LQFUHPHQWHG DV ORQJ DV WKH FORFN LV VXVSHQGHG 6HH H[DPSOHV LQ )LJXUH DQG )LJXUH &ORFN VXVSHQG PRGH LV H[LWHG E\ UHJLVWHULQJ &.( +LJK WKH LQWHUQDO FORFN DQG UH ODWHG RSHUDWLRQ ZLOO UHVXPH RQ WKH VXEVHTXHQW SRVLWLYH FORFN HGJH
47.8 Burst Read/Single Write
7KH EXUVW UHDGVLQJOH ZULWH PRGH LV HQWHUHG E\ SURJUDPPLQJ WKH ZULWH EXUVW PRGH ELW 0 LQ WKH PRGH UHJLVWHU WR D ORJLF ,Q WKLV PRGH DOO :ULWH FRPPDQGV UHVXOW LQ WKH DFFHVV RI D VLQJOH FROXPQ ORFDWLRQ EXUVW RI RQH UHJDUGOHVV RI WKH SURJUDPPHG EXUVW OHQJWK 5HDG FRPPDQGV DFFHVV FROXPQV DFFRUGLQJ WR WKH SUR JUDPPHG EXUVW OHQJWK DQG VHTXHQFH MXVW DV LQ WKH QRUPDO PRGH RI RSHUDWLRQ 0
November 8, 2005 SDRAM_01_A3
Mobile SDRAM Type 1
131
Preliminary
T0 CLK
T1
T2
T3
T4
T5
CKE
INTERNAL CLOCK COMMAND
NOP
WRITE
NOP
NOP
ADDRESS
BANK, COL n
DIN
DIN n
DIN n+1
DIN n+2
DON'T CARE
Figure 47.4.
1RWH )RU WKLV H[DPSOH EXUVW OHQJWK
Clock Suspend During Write Burst
RU JUHDWHU DQG '0 LV ORZ
T0 T1 T2 T3 T4 T5 T6
CLK
CKE
INTERNAL CLOCK COMMAND
READ
NOP
NOP
NOP
NOP
NOP
ADDRESS
BANK, COL n
DQ
DOUT n
DOUT n+1
DOUT n+2
DOUT n+3
DON'T CARE
Figure 47.5. Clock Suspend During Read Burst
1RWH )RU WKLV H[DPSOH &$6 ODWHQF\ EXUVW OHQJWK RU JUHDWHU DQG '40 LV ORZ
47.9 Concurrent Auto Precharge
7KH 6'5$0 GHYLFHV VXSSRUW &RQFXUUHQW $XWR SUHFKDUJH ZKLFK DOORZV DQ DFFHVV FRPPDQG 5HDG RU :ULWH WR DQRWKHU EDQN ZKLOH DQ DFFHVV FRPPDQG ZLWK DXWR SUHFKDUJH HQDEOHG LV H[HFXWLQJ )RXU FDVHV ZKHUH FRQFXUUHQW DXWR SUHFKDUJH RF FXUV DUH GHILQHG EHORZ
5HDG ZLWK $XWR 3UHFKDUJH
,QWHUUXSWHG E\ D 5HDG ZLWK RU ZLWKRXW DXWR SUHFKDUJH $ 5HDG WR EDQN P ZLOO LQWHUUXSW D 5HDG RQ EDQN Q WZR RU WKUHH FORFNV ODWHU GHSHQGLQJ RQ &$6 ODWHQF\ 7KH SUHFKDUJH WR EDQN Q ZLOO EHJLQ ZKHQ WKH 5HDG WR EDQN P LV UHJ LVWHUHG )LJXUH ,QWHUUXSWHG E\ D :ULWH ZLWK RU ZLWKRXW DXWR SUHFKDUJH :KHQ D :ULWH WR EDQN P UHJLVWHUV D 5HDG RQ EDQN Q ZLOO EH LQWHUUXSWHG '40 VKRXOG EH XVHG WZR FORFNV SULRU WR WKH :ULWH FRPPDQG WR SUHYHQW EXV FRQWHQWLRQ 7KH SUH
132
Mobile SDRAM Type 1
SDRAM_01_A3 November 8, 2005
Preliminary
FKDUJH WR EDQN Q ZLOO EHJLQ ZKHQ WKH :ULWH WR EDQN P LV UHJLVWHUHG )LJXUH
T0 CLK COMMAND BANK n
NOP READ - AP BANK n NOP READ - AP BANK m NOP NOP NOP NOP
T1
T2
T3
T4
T5
T6
T7
Page Active
READ with Burst of 4
Interrupt Burst, Precharge t RP - BANKn
Idle tRP - BANKm Precharge
Internal States
BANK m
Page Active
READ with Burst of 4
ADDRESS DQ
BANK n, COL a
BANK m, COL d DOUT a DOUT a+1 DOUT d DOUT d+1
CAS Latency = 3 (BANK n ) CAS Latency = 3 (BANK m )
DON'T CARE
Figure 47.6. Read with Auto Precharge Interrupted by a Read
1RWH '40 LV ORZ
T0 CLK COMMAND BANK n
READ - AP BANK n
T1
T2
T3
T4
T5
T6
T7
NOP
NOP
NOP
WRITE - AP BANK m
NOP
NOP
NOP
Internal States
Page READ with Burst of 4 Active
Interrupt Burst, Precharge tRP -BANK n
Idle t WR -BANK m Write-Back
BANK m
BANK n, COL a
Page Active
WRITE with Burst of 4
ADDRESS 1 DQM DQ
BANK m, COL d
DOUT a CAS Latency = 3 (BANK n)
DIN d
DIN d+1
DIN d+2
DIN d+3
DON'T CARE
Figure 47.7.
Read with Auto Precharge Interrupted by a Write
1RWH '40 LV KLJK DW 7 WR SUHYHQW '287D IURP FRQWHQGLQJ ZLWK ',1GDW 7
47.10 Write with Auto Precharge
,QWHUUXSWHG E\ D 5HDG ZLWK RU ZLWKRXW DXWR SUHFKDUJH :KHQ D 5HDG WR EDQN P UHJLVWHUV LW ZLOO LQWHUUXSW D :ULWH RQ EDQN Q ZLWK WKH GDWDRXW DS SHDULQJ RU FORFNV ODWHU GHSHQGLQJ RQ &$6 ODWHQF\ 7KH SUHFKDUJH WR EDQN Q ZLOO EHJLQ DIWHU W:5 LV PHW ZKHUH W:5 EHJLQV ZKHQ WKH 5HDG WR EDQN P LV UHJLVWHUHG 7KH ODVW YDOLG :ULWH WR EDQN Q ZLOO EH GDWDLQ UHJLVWHUHG RQH FORFN SULRU WR WKH 5HDG WR EDQN P )LJXUH ,QWHUUXSWHG E\ D :ULWH ZLWK RU ZLWKRXW DXWR SUHFKDUJH :KHQ D :ULWH WR EDQN P UHJLVWHUV LW ZLOO LQWHUUXSW D :ULWH RQ EDQN Q 7KH SUHFKDUJH WR EDQN Q ZLOO EHJLQ DIWHU W:5 LV PHW ZKHUH W:5 EHJLQV ZKHQ WKH :ULWH WR EDQN P LV UHJLVWHUHG 7KH ODVW YDOLG GDWD :ULWH WR EDQN Q ZLOO EH GDWD UHJLVWHUHG RQH FORFN SULRU WR D :ULWH WR EDQN P )LJXUH
November 8, 2005 SDRAM_01_A3
Mobile SDRAM Type 1
133
Preliminary
T0 CLK COMMAND BANK n
NOP
T1
T2
T3
T4
T5
T6
T7
WRITE - AP BANK n
NOP
READ - AP BANK m
NOP
NOP
NOP
NOP
Page Active
WRITE with Burst of 4
Interrupt Burst, Write-Back Precharge tWR - BANKn tRP - BANK n tRP - BANKm
Internal States
BANK m
Page Active
READ with Burst of 4
ADDRESS DQ
BANK n, COL a DIN a DIN a+1
BANK m, COL d DOUT d CAS Latency = 3 (BANK m) DOUT d+ 1
DON'T CARE
Figure 47.8. Write with Auto Precharge Interrupted by a Read
1RWH '40 LV ORZ
T0 CLK COMMAND BANK n
NOP WRITE - AP BANK n NOP NOP WRITE - AP BANK m NOP NOP NOP
T1
T2
T3
T4
T5
T6
T7
Page Active
WRITE with Burst of 4
Interrupt Burst, Write-Back tWR - BANK n
Precharge tRP - BANKn t WR - BANKm Write-Back
Internal States
BANK m
Page Active
WRITE with Burst of 4
ADDRESS DQ
BANK n, COL a DIN a DIN a+1 DIN a+2
BANK m, COL d DIN d DIN d+1 DIN d+2 DIN d+3
DON'T CARE
Figure 47.9.
1RWH '40 LV ORZ
Write with Auto Precharge Interrupted by a Write
134
Mobile SDRAM Type 1
SDRAM_01_A3 November 8, 2005
Preliminary
Table 47.1
&.(Q &.(Q &XUUHQW 6WDWH 3RZHU'RZQ / / 6HOI 5HIUHVK &ORFN 6XVSHQG 'HHS 3RZHU'RZQ 3RZHU'RZQ / + 'HHS 3RZHU'RZQ 6HOI 5HIUHVK &ORFN 6XVSHQG $OO %DQNV ,GOH + / $OO %DQNV ,GOH $OO %DQNV ,GOH 5HDGLQJ RU :ULWLQJ + + ; ; ; ;
Truth Table 2 - CKE
$FWLRQQ 0DLQWDLQ 3RZHU'RZQ 0DLQWDLQ 6HOI 5HIUHVK 0DLQWDLQ &ORFN 6XVSHQG 0DLQWDLQ 'HHS 3RZHU'RZQ ([LW 3RZHU'RZQ ([LW 'HHS 3RZHU'RZQ ([LW 6HOI 5HIUHVK ([LW &ORFN 6XVSHQG 3RZHU'RZQ (QWU\ 'HHS 3RZHU'RZQ (QWU\ 6HOI 5HIUHVK (QWU\ &ORFN 6XVSHQG (QWU\ 1RWHV
&RPPDQGQ
&RPPDQG ,QKLELW RU 123 ; &RPPDQG ,QKLELW RU 123 ; &RPPDQG ,QKLELW RU 123 %XUVW 7HUPLQDWH $XWR 5HIUHVK 9DOLG 6HH 7UXWK 7DEOH
1RWHV &.(Q LV WKH ORJLF VWDWH RI &.( DW FORFN HGJH Q &.(Q ZDV WKH VWDWH RI &.( DW WKH SUHYLRXV FORFN HGJH &XUUHQW VWDWH LV WKH VWDWH RI WKH 6'5$0 LPPHGLDWHO\ SULRU WR FORFN HGJH Q &RPPDQGQ LV WKH FRPPDQG UHJLVWHUHG DW FORFN HGJH Q DQG $FWLRQQ LV D UHVXOW RI &RPPDQGQ $OO VWDWHV DQG VHTXHQFHV QRW VKRZQ DUH LOOHJDO RU UHVHUYHG ([LWLQJ SRZHUGRZQ DW FORFN HGJH Q ZLOO SXW WKH GHYLFH LQ WKH DOO EDQNV LGOH VWDWH LQ WLPH IRU FORFN HGJH Q SURYLGHG WKDW W&.6 LV PHW ([LWLQJ VHOI UHIUHVK DW FORFN HGJH Q ZLOO SXW WKH GHYLFH LQ WKH DOO EDQNV LGOH VWDWH RQFH W;65 LV PHW &RPPDQG ,QKLELW RU 123 FRPPDQGV VKRXOG EH LVVXHG RQ DQ\ FORFN HGJHV RFFXUULQJ GXULQJ WKH W;65 SHULRG $ PLQLPXP RI WZR 123 FRPPDQGV PXVW EH SURYLGHG GXULQJ W;65 SHULRG $IWHU H[LWLQJ FORFN VXVSHQG DW FORFN HGJH Q WKH GHYLFH ZLOO UHVXPH RSHUDWLRQ DQG UHFRJQL]H WKH QH[W FRPPDQG DW FORFN HGJH Q 'HHS SRZHUGRZQ LV D SRZHUVDYLQJ IHDWXUH RI WKLV 0RELOH 6'5$0 GHYLFH 7KLV FRPPDQG LV %XUVW 7HUPLQDWH ZKHQ &.( LV KLJK DQG 'HHS 3RZHU 'RZQ ZKHQ &.( LV ORZ
November 8, 2005 SDRAM_01_A3
Mobile SDRAM Type 1
135
Preliminary
Table 47.2 Truth Table 3 - Current State Bank n, Command to Bank n
&XUUHQW 6WDWH $Q\ &6 + / / ,GOH / / / / 5RZ $FWLYH / / / 5HDG $XWR SUHFKDUJH GLVDEOHG / / / / :ULWH $XWR SUHFKDUJH GLVDEOHG / / / 5$6 ; + / / / / + + / + + / + + + / + &$6 ; + + / / + / / + / / + + / / + + :( ; + + + / / + / / + / / / + / / / &RPPDQG $FWLRQ &RPPDQG ,QKLELW 123&RQWLQXH SUHYLRXV RSHUDWLRQ 1R 2SHUDWLRQ 123&RQWLQXH SUHYLRXV RSHUDWLRQ $FWLYH 6HOHFW DQG DFWLYDWH URZ $XWR 5HIUHVK /RDG 0RGH 5HJLVWHU 3UHFKDUJH 5HDG 6HOHFW FROXPQ DQG VWDUW 5HDG EXUVW :ULWH 6HOHFW FROXPQ DQG VWDUW :ULWH EXUVW 3UHFKDUJH 'HDFWLYDWH URZ LQ EDQN RU EDQNV 5HDG 6HOHFW FROXPQ DQG VWDUW QHZ 5HDG EXUVW :ULWH 6HOHFW FROXPQ DQG VWDUW :ULWH EXUVW 3UHFKDUJH 7UXQFDWH 5HDG EXUVW VWDUW 3UHFKDUJH %XUVW 7HUPLQDWH 5HDG 6HOHFW FROXPQ DQG VWDUW 5HDG EXUVW :ULWH 6HOHFW FROXPQ DQG VWDUW QHZ :ULWH EXUVW 3UHFKDUJH 7UXQFDWH :ULWH EXUVW VWDUW 3UHFKDUJH %XUVW 7HUPLQDWH 1RWHV
1RWHV 7KLV WDEOH DSSOLHV ZKHQ &.(Q ZDV +LJK DQG &.(Q LV +LJK VHH 7DEOH DQG DIWHU W;65 KDV EHHQ PHW LI WKH SUHYLRXV VWDWH ZDV VHOI UHIUHVK 7KLV WDEOH LV EDQNVSHFLILF H[FHSW ZKHUH QRWHG LH WKH FXUUHQW VWDWH LV IRU D VSH FLILF EDQN DQG WKH FRPPDQGV VKRZQ DUH WKRVH DOORZHG WR EH LVVXHG WR WKDW EDQN ZKHQ LQ WKDW VWDWH ([FHSWLRQV DUH FRYHUHG LQ WKH QRWHV EHORZ &XUUHQW VWDWH GHILQLWLRQV ,GOH 7KH EDQN KDV EHHQ SUHFKDUJHG DQG W53 KDV EHHQ PHW 5RZ $FWLYH $ URZ LQ WKH EDQN KDV EHHQ DFWLYDWHG DQG W5&' KDV EHHQ PHW 1R GDWD EXUVWVDFFHVVHV DQG QR UHJLVWHU DFFHVVHV DUH LQ SURJUHVV 5HDG $ 5HDG EXUVW KDV EHHQ LQLWLDWHG ZLWK DXWR SUHFKDUJH GLVDEOHG DQG KDV QRW \HW WHUPLQDWHG RU EHHQ WHUPLQDWHG :ULWH $ :ULWH EXUVW KDV EHHQ LQLWLDWHG ZLWK DXWR SUHFKDUJH GLVDEOHG DQG KDV QRW \HW WHUPLQDWHG RU EHHQ WHUPLQDWHG 7KH IROORZLQJ VWDWHV PXVW QRW EH LQWHUUXSWHG E\ D FRPPDQG LVVXHG WR WKH VDPH EDQN &RPPDQG ,QKLELW RU 123 FRPPDQGV RU DOORZDEOH FRPPDQGV WR WKH RWKHU EDQN VKRXOG EH LVVXHG RQ DQ\ FORFN HGJH RFFXUULQJ GXULQJ WKHVH VWDWHV $OORZDEOH FRPPDQGV WR WKH RWKHU EDQN DUH GHWHUPLQHG E\ LWV FXUUHQW VWDWH DQG 7DEOH DQG DFFRUGLQJ WR 7DEOH 3UHFKDUJLQJ 6WDUWV ZLWK UHJLVWUDWLRQ RI D 3UHFKDUJH FRPPDQG DQG HQGV ZKHQ W53 LV PHW 2QFH W53 LV PHW WKH EDQN ZLOO EH LQ WKH LGOH VWDWH 5RZ $FWLYDWLQJ 6WDUWV ZLWK UHJLVWUDWLRQ RI DQ $FWLYH FRPPDQG DQG HQGV ZKHQ W5&' LV PHW 2QFH W5&' LV PHW WKH EDQN ZLOO EH LQ WKH URZ DFWLYH VWDWH 5HDG Z$XWR 3UHFKDUJH (QDEOHG 6WDUWV ZLWK UHJLVWUDWLRQ RI D 5HDG FRPPDQG ZLWK DXWR SUHFKDUJH HQDEOHG DQG HQGV ZKHQ W53 KDV EHHQ PHW 2QFH W53 LV PHW WKH EDQN ZLOO EH LQ WKH LGOH VWDWH :ULWH Z$XWR 3UHFKDUJH (QDEOHG 6WDUWV ZLWK UHJLVWUDWLRQ RI D :ULWH FRPPDQG ZLWK DXWR SUHFKDUJH HQDEOHG DQG HQGV ZKHQ W53 KDV EHHQ PHW 2QFH W53 LV PHW WKH EDQN ZLOO EH LQ WKH LGOH VWDWH 7KH IROORZLQJ VWDWHV PXVW QRW EH LQWHUUXSWHG E\ DQ\ H[HFXWDEOH FRPPDQG &RP PDQG ,QKLELW RU 123 FRPPDQGV PXVW EH DSSOLHG RQ HDFK SRVLWLYH FORFN HGJH GXU LQJ WKHVH VWDWHV 5HIUHVKLQJ 6WDUWV ZLWK UHJLVWUDWLRQ RI DQ $XWR 5HIUHVK FRPPDQG DQG HQGV ZKHQ W5& LV PHW 2QFH W5& LV PHW WKH 6'5$0 ZLOO EH LQ WKH DOO EDQNV LGOH VWDWH $FFHVVLQJ 0RGH 5HJLVWHU 6WDUWV ZLWK UHJLVWUDWLRQ RI D /RDG 0RGH 5HJLVWHU FRP PDQG DQG HQGV ZKHQ W05' KDV EHHQ PHW 2QFH W05' LV PHW WKH 6'5$0 ZLOO EH LQ WKH DOO EDQNV LGOH VWDWH
136
Mobile SDRAM Type 1
SDRAM_01_A3 November 8, 2005
Preliminary
3UHFKDUJLQJ $OO 6WDUWV ZLWK UHJLVWUDWLRQ RI D 3UHFKDUJH $OO FRPPDQG DQG HQGV ZKHQ W53 LV PHW 2QFH W53 LV PHW DOO EDQNV ZLOO EH LQ WKH LGOH VWDWH $OO VWDWHV DQG VHTXHQFHV QRW VKRZQ DUH LOOHJDO RU UHVHUYHG 1RW EDQNVSHFLILF UHTXLUHV WKDW DOO EDQNV DUH LGOH 0D\ RU PD\ QRW EH EDQNVSHFLILF LI DOO EDQNV DUH WR EH SUHFKDUJHG DOO PXVW EH LQ D YDOLG VWDWH IRU SUHFKDUJLQJ 'HHS 3RZHU'RZQ LV SRZHUVDYLQJ IHDWXUH RI WKLV 0RELOH 6'5$0 GHYLFH 7KLV FRPPDQG LV %XUVW 7HUPLQDWH ZKHQ &.( LV KLJK DQG 'HHS 3RZHU 'RZQ ZKHQ &.( LV ORZ
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Table 47.3
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138
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48 Absolute Maximum Ratings
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Table 48.1
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Mobile SDRAM Type 1
139
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Table 48.2 AC Electrical Characteristics and Operating Conditions
Parameter ,QSXW +LJK 9ROWDJH /RJLF $OO LQSXWV Symbol 9,+ Min Max Units 9 Notes
,QSXW /RZ 9ROWDJH /RJLF $OO LQSXWV
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Table 48.3
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Table 48.4 AC Functional Characteristics
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Mobile SDRAM Type 1
141
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Table 48.5
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142
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SDRAM_01_A3 November 8, 2005
Preliminary
$XWR 5HIUHVK FRPPDQG ZDNHXSV VKRXOG EH UHSHDWHG DQ\ WLPH WKH W5() UHIUHVK UH TXLUHPHQW LV H[FHHGHG $& WLPLQJ DQG ,'' WHVWV KDYH 9,/ DQG 9,+ ZLWK WLPLQJ UHIHUHQFHG WR 9,+ FURVV RYHU SRLQW ,I WKH LQSXW WUDQVLWLRQ WLPH LV ORQJHU WKDQ W7 0$; WKHQ WKH WLPLQJ LV UHIHUHQFHG DW 9,/ 0$; DQG 9,+ 0,1 DQG QR ORQJHU DW WKH 9,+ FURVVRYHU SRLQW ,'' VSHFLILFDWLRQV DUH WHVWHG DIWHU WKH GHYLFH LV SURSHUO\ LQLWLDOL]HG ,'' LV GHSHQGHQW RQ RXWSXW ORDGLQJ DQG F\FOH UDWHV 6SHFLILHG YDOXHV DUH REWDLQHG ZLWK PLQLPXP F\FOH WLPH DQG WKH RXWSXWV RSHQ 7KH ,'' FXUUHQW ZLOO LQFUHDVH RU GHFUHDVH SURSRUWLRQDOO\ DFFRUGLQJ WR WKH DPRXQW RI IUHTXHQF\ DOWHUDWLRQ IRU WKH WHVW FRQGLWLRQ $GGUHVV WUDQVLWLRQV DYHUDJH RQH WUDQVLWLRQ HYHU\ WZR FORFNV )RU &/ DQG W&. QV
&.( LV +LJK GXULQJ UHIUHVK FRPPDQG SHULRG W5)& 0,1 HOVH &.( LV /RZ 7KH ,'' OLPLW LV DFWXDOO\ D QRPLQDO YDOXH DQG GRHV QRW UHVXOW LQ D IDLO YDOXH 'HHS SRZHU GRZQ FXUUHQW LV D QRPLQDO YDOXH DW & 7KH SDUDPHWHU LV QRW WHVWHG
Table 48.6
IDD7 - Self Refresh Current Options
0D[ 7HPSHUDWXUH & & & & & 7%' 7%' 7%' 7%' 7%' 7%' 7%' 7%' $ 8QLWV 1RWHV
7HPSHUDWXUH &RPSHQVDWHG 6HOI 5HIUHVK 3DUDPHWHU&RQGLWLRQ 6HOI 5HIUHVK &XUUHQW &.( 9 %DQNV 2SHQ
6HOI 5HIUHVK &XUUHQW &.( 9 %DQNV 2SHQ
& & & &
6HOI 5HIUHVK &XUUHQW &.( 9 %DQN 2SHQ
& & & &
6HOI 5HIUHVK &XUUHQW &.( 9 %DQN 2SHQ
& & & &
6HOI 5HIUHVK &XUUHQW &.( 9 %DQN 2SHQ
& & &
1RWHV 9''
9''4
9 9
(QDEOHV RQFKLS UHIUHVK DQG DGGUHVV FRXQWHUV
November 8, 2005 SDRAM_01_A3
Mobile SDRAM Type 1
143
Preliminary
Table 48.7 Capacitance
Parameter ,QSXW &DSDFLWDQFH &/. Symbol &, Min Max Units S) Notes
,QSXW &DSDFLWDQFH $OO RWKHU LQSXWRQO\ SLQV ,QSXW2XWSXW &DSDFLWDQFH '4
1RWHV 7KLV SDUDPHWHU LV VDPSOHG 9'' 9''4 DW 9 I 0+] 3& VSHFLILHV D PD[LPXP RI S) 3& VSHFLILHV D PD[LPXP RI S) 3& VSHFLILHV D PD[LPXP RI S)
T0 T1
(( )) (( tCK) )
&, &,2
9 7$

S) S)

& SLQ XQGHU WHVW ELDVHG
CLK
(( )) (( ))
T3
(( )) (( ))
T5
(( )) (( ))
T7
(( )) (( ))
T9
(( )) (( ))
T19
(( )) (( ))
T29
tCKS tCKH
CKE
(( )) (( )) (( )) (( )) (( )) (( )) (( )) (( )) (( )) (( )) (( )) (( )) (( ))
tCMS tCMH NOP PRE
(( )) (( )) (( )) (( )) (( )) (( )) (( )) (( ))
(( )) (( )) (( )) (( )) (( )) (( ))
(( )) (( )) (( )) (( )) (( )) (( )) (( )) (( )) ( ( ALL BANKS )) (( ))
(( )) (( )) (( )) (( )) (( )) (( )) (( )) (( )) (( )) (( )) (( )) (( ))
(( )) (( )) (( )) (( )) (( )) (( )) (( )) (( )) (( )) (( )) (( )) (( ))
(( )) (( )) (( )) (( )) (( )) (( )) (( )) (( )) (( )) (( )) (( )) (( ))
COMMAND 5
LMR4
LMR4
PRE3
AR4
AR4
ACT4
DQML, DQMU
tAS tAH
CODE
A0-A9, A11
(( )) (( )) (( )) (( )) (( )) (( ))
CODE
RA
ALL BANKS
A10
tAS tAH
(( )) (( )) (( )) (( ))
CODE
CODE
RA
tAS tAH
BA0 = L, BA1 = H
tAS BA0 = L, BA1 = L
(( )) (( ))
tAH
BA
BA0, BA1
DQ
High-Z
T = 100s
(( ))
tRP
(( ))
tMRD
(( ))
tMRD
(( ))
tRP
(( ))
tRFC
(( ))
tRFC
Power-up: VDD and CLK stable
Load Extended Mode Register
Load Mode Register
DON'T CARE
Figure 48.1
Initialize and Load Mode Register
1RWHV 7KH WZR $XWR 5HIUHVK FRPPDQGV DW 7 DQG 7 PD\ EH DSSOLHG EHIRUH HLWKHU /RDG 0RGH 5HJLVWHU /05 FRPPDQG 35( 3UHFKDUJH FRPPDQG /05 /RDG 0RGH 5HJLVWHU FRPPDQG $5 $XWR 5H IUHVK FRPPDQG $&7 $FWLYH FRPPDQG 5$ 5RZ $GGUHVV %$ %DQN $GGUHVV 2SWLRQDO UHIUHVK FRPPDQG 7KH /RDG 0RGH 5HJLVWHU IRU ERWK 05(05 DQG $XWR 5HIUHVK FRPPDQGV FDQ EH LQ DQ\ RUGHU +RZHYHU DOO PXVW RFFXU SULRU WR DQ $FWLYH FRPPDQG 'HYLFH WLPLQJ LV ZLWK 0+] FORFN
144
Mobile SDRAM Type 1
SDRAM_01_A3 November 8, 2005
Preliminary
T0 CLK
tCK
T1
tCL
T2 tCH
tCKS CKE tCKS tCKH tCMS tCMH COMMAND
PRECHARGE NOP
(( )) (( ))
Tn + 1 tCKS
Tn + 2
(( ))
NOP
(( )) (( )) (( )) (( )) (( )) (( ))
NOP
ACTIVE
DQML, DQMU
A0-A9, A11
ALL BANKS
ROW
A10
SINGLE BANK
(( )) (( ))
ROW
tAS BA0, BA1
tAH
BANK(S)
High-Z
(( )) (( ))
(( ))
BANK
DQ
Two clock cycles Precharge all active banks All banks idle, enter power-down mode
Input buffers gated off while in power-down mode Exit power-down mode DON'T CARE All banks idle
Figure 48.2.
Power Down Mode
1RWH 9LRODWLQJ UHIUHVK UHTXLUHPHQWV GXULQJ SRZHUGRZQ PD\ UHVXOW LQ D ORVV RI GDWD
November 8, 2005 SDRAM_01_A3
Mobile SDRAM Type 1
145
Preliminary
MOBILE SDRAM
T0 CLK
tCK
T1
tCL
T2 tCH
T3
T4
T5
T6
T7
T8
T9
tCKS tCKH CKE tCKS tCKH tCMS tCMH COMMAND
READ NOP NOP NOP NOP NOP WRITE NOP
tCMS tCMH DQMU, DQML tAS A0-A9, A11 tAH
COLUMN e2
COLUMN m2
tAS A10 tAS BA0, BA1
tAH
tAH
BANK BANK
tAC tAC DQ tLZ
DOUT m
tOH
tHZ
DOUT m + 1
tDS
tDH
DOUT e + 1
DOUT e
DON'T CARE UNDEFINED
Figure 48.3.
1RWHV )RU WKLV H[DPSOH WKH EXUVW OHQJWK LV GLVDEOHG $ DQG $ 'RQW &DUH
Clock Suspend Mode
DQG DXWR SUHFKDUJH
WKH &$6 ODWHQF\
146
Mobile SDRAM Type 1
SDRAM_01_A3 November 8, 2005
Preliminary
T0
CLK tCK
T1
T2
tCH
(( )) (( )) (( ))
tCL
Tn + 1
(( )) (( )) (( ))
To + 1
CKE tCKS tCMS COMMAND tCKH tCMH
NOP AUTO REFRESH
PRECHARGE
NOP
(( )) ( ( NOP ))
AUTO REFRESH
NOP
(( )) ( ( NOP )) (( )) (( ))
(( )) (( )) (( )) (( ))
ACTIVE
DQMU, DQML
(( )) (( ))
(( )) (( ))
A0-A9, A11
ALL BANKS
ROW
A10
SINGLE BANK tAS BA0, BA1 tAH
(( )) (( ))
ROW
BANK(S)
(( )) (( )) (( )) tRP tRFC 1 tRFC 1
(( )) (( )) (( ))
BANK
DQ
High-Z
Precharge all active banks
DON'T CARE
Figure 48.4. Auto Refresh Mode
1RWH (DFK $XWR 5HIUHVK FRPPDQG SHUIRUPV D UHIUHVK F\FOH %DFNWREDFN FRP PDQGV DUH QRW UHTXLUHG
November 8, 2005 SDRAM_01_A3
Mobile SDRAM Type 1
147
Preliminary
T0 CLK tCK
T1 tCH
tCL
T2
tCKS
>t RAS
(( )) (( ))
Tn + 1
(( )) (( )) (( )) (( ))
To + 1
To + 2
CKE tCKS tCKH tCMS tCMH COMMAND
PRECHARGE NOP AUTO REFRESH
(( ))
(( )) (( )) (( )) (( )) (( )) (( ))
NOP ( (
(( ))
))
AUTO REFRESH
DQMU, DQML
(( )) (( )) (( )) (( )) (( )) (( ))
A0-A9, A11
ALL BANKS
A10
SINGLE BANK
(( )) (( ))
t AS BA0, BA1
tAH
(( )) (( ))
(( ))
BANK(S)
(( )) (( ))
(( ))
DQ
High-Z tRP Precharge all active banks
tXSR
Enter self refresh mode
Exit self refresh mode (Restart refresh time base)
DON'T CARE
CLK stable prior to exiting self refresh mode
Figure 48.5. Self Refresh Mode
1RWH (DFK $XWR 5HIUHVK FRPPDQG SHUIRUPV D UHIUHVK F\FOH %DFNWREDFN FRP PDQGV DUH QRW UHTXLUHG
148
Mobile SDRAM Type 1
SDRAM_01_A3 November 8, 2005
Preliminary
T0 CLK tCKS tCKH CKE tCMS tCMH COMMAND ACTIVE
tCK
T1
tCL
T2 tCH
T3
T4
T5
T6
T7
T8
NOP
READ tCMS tCMH
NOP
NOP
NOP
PRECHARGE
NOP
ACTIVE
DQMU, DQML tAS A0-A9, A11 tAH
COLUMN m2
ROW tAS tAH
ROW ALL BANKS ROW
A10
ROW tAS tAH DISABLE AUTO PRECHARGE BANK tAC tAC tOH DOUT m tAC tOH DOUT m+1 SINGLE BANKS BANK(S) tAC tOH DOUT m+2 tRP tOH DOUT m+3 tHZ
BA0, BA1
BANK
BANK
DQ tRCD tRAS tRC
tLZ CAS Latency
DON'T CARE UNDEFINED
Figure 48.6.
Read - Without Auto Precharge
DQG WKH 5HDG EXUVW
1RWHV )RU WKLV H[DPSOH WKH EXUVW OHQJWK WKH &$6 ODWHQF\ LV IROORZHG E\ D PDQXDO 3UHFKDUJH $ DQG $ 'RQW &DUH
November 8, 2005 SDRAM_01_A3
Mobile SDRAM Type 1
149
Preliminary
T0 CLK tCKS tCKH CKE tCMS tCMH COMMAND
ACTIVE
tCK
T1
tCL
T2 tCH
T3
T4
T5
T6
T7
T8
NOP
READ
NOP
NOP
NOP
NOP
NOP
ACTIVE
tCMS tCMH DQMU, DQML tAS A0-A9, A11 tAH
COLUMN m2 ROW
ROW
tAS A10
tAH
ENABLE AUTO PRECHARGE ROW
ROW
tAS BA0, BA1
tAH
BANK BANK
BANK
tAC DQ tRCD tRAS tRC tLZ CAS Latency
tAC tOH
DOUT m
tAC tOH
DOUT m + 1
tAC tOH
DOUT m + 2
tOH
DOUT m + 3
tHZ tRP
DON'T CARE UNDEFINED
Figure 48.7. Read - With Auto Precharge
1RWHV )RU WKLV H[DPSOH WKH EXUVW OHQJWK $ DQG $ 'RQW &DUH WKH &$6 ODWHQF\
150
Mobile SDRAM Type 1
SDRAM_01_A3 November 8, 2005
Preliminary
T0 CLK tCKS tCKH CKE tCMS tCMH COMMAND ACTIVE
tCK
T1
tCL
T2 tCH
T3
T4
T5
T6
T7
T8
NOP
READ tCMS tCMH
NOP 3
NOP 3
PRECHARGE
NOP
ACTIVE
NOP
DQMU, DQML tAS A0-A9, A11 tAH
COLUMN m2
ROW tAS tAH
ROW ALL BANKS ROW
A10
ROW tAS tAH DISABLE AUTO PRECHARGE BANK SINGLE BANKS BANK(S) tOH DOUT m tHZ tRP
BA0, BA1
BANK
BANK
tAC DQ tRCD tRAS tRC tLZ CAS Latency
DON'T CARE UNDEFINED
Figure 48.8.
Single Read - Without Auto Precharge
DQG WKH 5HDG EXUVW
1RWHV )RU WKLV H[DPSOH WKH EXUVW OHQJWK WKH &$6 ODWHQF\ LV IROORZHG E\ D PDQXDO 3UHFKDUJH $ DQG $ 'RQW &DUH
3UHFKDUJH FRPPDQG QRW DOORZHG RU W5$6 ZRXOG EH YLRODWHG
November 8, 2005 SDRAM_01_A3
Mobile SDRAM Type 1
151
Preliminary
T0 CLK tCKS tCKH CKE tCMS tCMH COMMAND
ACTIVE
tCK
T1
tCL
T2 tCH
T3
T4
T5
T6
T7
T8
NOP
NOP3
NOP3
READ
NOP
NOP
ACTIVE
NOP
tCMS tCMH DQMU, DQML tAS A0-A9, A11 tAH
COLUMN m2 ROW
ROW
tAS A10
tAH
ENABLE AUTO PRECHARGE ROW
ROW
tAS BA0, BA1
tAH
BANK BANK
BANK
tAC t OH DQ tRCD tRAS tRC CAS Latency tRP
DOUT m
tHZ
DON'T CARE UNDEFINED
Figure 48.9. Single Read - With Auto Precharge
1RWHV )RU WKLV H[DPSOH WKH EXUVW OHQJWK WKH &$6 ODWHQF\ LV IROORZHG E\ D PDQXDO 3UHFKDUJH $ DQG $ 'RQW &DUH DQG WKH 5HDG EXUVW
3UHFKDUJH FRPPDQG QRW DOORZHG RU W5$6 ZRXOG EH YLRODWHG
152
Mobile SDRAM Type 1
SDRAM_01_A3 November 8, 2005
Preliminary
T0 CLK tCKS tCKH CKE tCMS COMMAND tCMH
tCK
T1
tCL
T2 tCH
T3
T4
T5
T6
T7
T8
ACTIVE
NOP
READ
NOP
ACTIVE
NOP
READ
NOP
ACTIVE
tCMS tCMH DQMU, DQML tAS A0-A9, A11 tAH
COLUMN m2 ROW COLUMN b 2 ROW
ROW
tAS A10
tAH
ENABLE AUTO PRECHARGE ROW
ENABLE AUTO PRECHARGE ROW
ROW
tAS BA0, BA1
tAH
BANK 0 BANK 3 BANK 3 BANK 0
BANK 0
tAC DQ tRCD - BANK 0 tRAS - BANK 0 tRC - BANK 0 tRRD tLZ CAS Latency - BANK 0
tAC tOH
DOUT m
tAC tOH
DOUT m + 1
tAC tOH
DOUT m + 2
tAC tOH
DOUT m + 3
tAC tOH
DOUT b
tRP - BANK 0
tRCD - BANK 0
tRCD - BANK 3
CAS Latency - BANK 3
DON'T CARE UNDEFINED
Figure 48.10.
1RWHV )RU WKLV H[DPSOH WKH EXUVW OHQJWK $ DQG $ 'RQW &DUH
Alternating Bank Read Accesses
WKH &$6 ODWHQF\
November 8, 2005 SDRAM_01_A3
Mobile SDRAM Type 1
153
Preliminary
T0 CLK tCKS tCKH CKE tCMS COMMAND tCMH
tCL
T1 tCH
tCK
T2
T3
T4
T5
T6
(( )) (( ))
Tn + 1
Tn + 2
Tn + 3
Tn + 4
(( )) (( )) (( )) (( )) (( )) (( ))
ACTIVE
NOP
READ
NOP
NOP
NOP
NOP
NOP
BURST TERM
NOP
NOP
tCMS DQMU, DQML tAS A0-A9, A11 tAH
tCMH
ROW
COLUMN m2
(( )) (( )) (( )) (( )) (( )) (( ))
tAS A10
tAH
ROW
tAS BA0, BA1
tAH
BANK
BANK
tAC tAC DQ tLZ tRCD CAS Latency tOH
DOUT m
tAC tOH
DOUT m+1
(( )) DOUT m+2 (( ))
tAC ( ( tOH ) )
tAC tOH
DOUT m-1
tAC tOH
DOUT m
tOH
DOUT m+1
256 (x16) locations within same row
tHZ
Full page completed Full-page burst does not self-terminate. 3 Can use BURST TERMINATE command.
DON'T CARE UNDEFINED
Figure 48.11. Read - Full-Page Burst
1RWHV )RU WKLV H[DPSOH WKH &$6 ODWHQF\ $ DQG $ 'RQW &DUH 3DJH OHIW RSHQ QR W53
154
Mobile SDRAM Type 1
SDRAM_01_A3 November 8, 2005
Preliminary
T0 CLK tCKS tCKH CKE tCMS tCMH COMMAND
ACTIVE
tCK
T1
tCL
T2 tCH
T3
T4
T5
T6
T7
T8
NOP
READ
NOP
NOP
NOP
NOP
NOP
NOP
tCMS tCMH DQMU, DQML tAS A0-A9, A11 tAH
COLUMN m2 ENABLE AUTO PRECHARGE DISABLE AUTO PRECHARGE BANK
ROW
tAS A10
tAH
ROW
tAS BA0, BA1
tAH
BANK
tAC DQ tRCD tLZ CAS Latency
tOH
DOUT m
tAC
tAC tOH
DOUT m + 2
tOH
DOUT m + 3
tHZ
tLZ
tHZ
DON'T CARE UNDEFINED
Figure 48.12. Read - DQM Operation
1RWHV )RU WKLV H[DPSOH WKH &$6 ODWHQF\ $ DQG $ 'RQW &DUH
November 8, 2005 SDRAM_01_A3
Mobile SDRAM Type 1
155
Preliminary
T0 CLK tCKS tCKH CKE tCMS COMMAND tCMH
tCK
T1
tCL
T2 tCH
T3
T4
T5
T6
T7
T8
T9
ACTIVE
NOP
WRITE
NOP
NOP
NOP
NOP
PRECHARGE
NOP
ACTIVE
tCMS tCMH DQMU, DQML tAS A0-A9, A11 tAH
COLUMN m3 ALL BANKS ROW DISABLE AUTO PRECHARGE BANK SINGLE BANK BANK BANK ROW
ROW
tAS A10
tAH
ROW
tAS BA0, BA1
tAH
BANK
tDS DQ tRCD tRAS tRC
tDH
tDS
tDH
tDS
tDH
tDS
tDH
DIN m
DIN m + 1
DIN m + 2
DIN m + 3 t WR 2 tRP
DON'T CARE
Figure 48.13.
1RWHV )RU WKLV H[DPSOH WKH EXUVW OHQJWK PDQXDO 3UHFKDUJH
Write - Without Auto Precharge
DQG WKH :ULWH EXUVW LV IROORZHG E\ D
QV LV UHTXLUHG EHWZHHQ ',1 P ! DQG WKH 3UHFKDUJH FRPPDQG UHJDUGOHVV RI IUHTXHQF\ $ DQG $
T0 CLK tCKS tCKH CKE tCMS tCMH COMMAND
ACTIVE NOP WRITE NOP NOP NOP NOP NOP NOP ACTIVE
'RQW &DUH
T1 T2 tCH T3 T4 T5 T6 T7 T8 T9
tCK
tCL
tCMS tCMH DQMU, DQML tAS A0-A9, A11 tAH
COLUMN m2 ENABLE AUTO PRECHARGE ROW ROW
ROW
tAS A10
tAH
ROW
tAS BA0, BA1
tAH
BANK BANK
BANK
tDS DQ tRCD tRAS tRC
tDH
tDS
tDH
tDS
tDH
tDS
tDH
DIN m
DIN m + 1
DIN m + 2
DIN m + 3 tWR tRP
DON'T CARE
Figure 48.14. Write - With Auto Precharge
1RWHV )RU WKLV H[DPSOH WKH EXUVW OHQJWK $ DQG $ 'RQW &DUH
156
Mobile SDRAM Type 1
SDRAM_01_A3 November 8, 2005
Preliminary
T0 CLK tCKS tCKH CKE tCMS COMMAND tCMH
tCK
T1
tCL
T2 tCH
T3
T4
T5
T6
T7
T8
T9
ACTIVE
NOP
WRITE
NOP
NOP
NOP
NOP
PRECHARGE
NOP
ACTIVE
tCMS tCMH DQMU, DQML tAS A0-A9, A11 tAH
COLUMN m3 ALL BANKS ROW DISABLE AUTO PRECHARGE BANK SINGLE BANK BANK BANK ROW
ROW
tAS A10
tAH
ROW
tAS BA0, BA1
tAH
BANK
tDS DQ tRCD tRAS tRC
tDH
tDS
tDH
tDS
tDH
tDS
tDH
DIN m
DIN m + 1
DIN m + 2
DIN m + 3 t WR 2 tRP
DON'T CARE
Figure 48.15.
Single Write - Without Auto Precharge
DQG WKH :ULWH EXUVW LV IROORZHG E\ D
1RWHV )RU WKLV H[DPSOH WKH EXUVW OHQJWK PDQXDO 3UHFKDUJH
QV LV UHTXLUHG EHWZHHQ ',1 P! DQG WKH 3UHFKDUJH FRPPDQG UHJDUGOHVV RI IUHTXHQF\ $ DQG $ 'RQW &DUH 3UHFKDUJH FRPPDQG QRW DOORZHG HOVH W5$6 ZRXOG EH YLRODWHG
November 8, 2005 SDRAM_01_A3
Mobile SDRAM Type 1
157
Preliminary
T0 CLK tCKS tCKH CKE tCMS tCMH COMMAND
ACTIVE
tCK
T1
tCL
T2 tCH
T3
T4
T5
T6
T7
T8
T9
NOP3
NOP3
NOP3
WRITE
NOP
NOP
NOP
ACTIVE
NOP
tCMS DQMU, DQML tAS A0-A9, A11 tAH
tCMH
ROW
COLUMN m2 ENABLE AUTO PRECHARGE
ROW
tAS A10
tAH
ROW
ROW
tAS BA0, BA1
tAH
BANK BANK
BANK
tDS DQ tRCD tRAS tRC
tDH
DIN m tWR tRP
DON'T CARE
Figure 48.16. Single Write with Auto Precharge
1RWHV )RU WKLV H[DPSOH WKH EXUVW OHQJWK PDQXDO 3UHFKDUJH DQG WKH :ULWH EXUVW LV IROORZHG E\ D
QV LV UHTXLUHG EHWZHHQ ',1 P! DQG WKH 3UHFKDUJH FRPPDQG UHJDUGOHVV RI IUHTXHQF\ $ DQG $ 'RQW &DUH :ULWH FRPPDQG QRW DOORZHG HOVH W5$6 ZRXOG EH YLRODWHG
158
Mobile SDRAM Type 1
SDRAM_01_A3 November 8, 2005
Preliminary
T0 CLK tCKS tCKH CKE tCMS COMMAND tCMH
tCK
T1
tCL
T2 tCH
T3
T4
T5
T6
T7
T8
T9
ACTIVE
NOP
WRITE
NOP
ACTIVE
NOP
WRITE
NOP
NOP
ACTIVE
tCMS tCMH DQMU, DQML tAS A0-A9, A11 tAH
COLUMN m2 ROW COLUMN b 2 ROW
ROW
tAS A10
tAH
ENABLE AUTO PRECHARGE ROW
ENABLE AUTO PRECHARGE ROW
ROW
tAS BA0, BA1
tAH
BANK 0 BANK 1 BANK 1 BANK 0
BANK 0
tDS DQ tRCD - BANK 0 tRAS - BANK 0 tRC - BANK 0 tRRD
tDH
tDS
tDH
tDS
tDH
tDS
tDH
tDS
tDH
tDS
tDH
tDS
tDH
tDS
tDH
DIN m
DIN m + 1
DIN m + 2
DIN m + 3
DIN b
DIN b + 1 tRP - BANK 0
DIN b + 2
DIN b + 3 tRCD - BANK 0
tWR - BANK 0
tRCD - BANK 1
tWR - BANK 1 DON'T CARE
Figure 48.17. Alternating Bank Write Accesses
1RWHV )RU WKLV H[DPSOH WKH EXUVW OHQJWK $ DQG $ 'RQW &DUH
November 8, 2005 SDRAM_01_A3
Mobile SDRAM Type 1
159
Preliminary
T0 CLK tCKS tCKH CKE tCMS COMMAND tCMH
tCL
T1 tCH
tCK
T2
T3
T4
T5
(( )) (( )) (( )) (( ))
Tn + 1
Tn + 2
Tn + 3
ACTIVE
NOP
WRITE
NOP
NOP
NOP
(( )) (( ))
NOP
BURST TERM
NOP
tCMS tCMH DQMU, DQML tAS A0-A9, A11 tAH
COLUMN m1
(( )) (( ))
ROW
(( )) (( )) (( )) (( )) (( )) (( ))
tAS A10
tAH
ROW
tAS BA0, BA1
tAH
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Mobile SDRAM Type 1
SDRAM_01_A3 November 8, 2005
Preliminary
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November 8, 2005 SDRAM_01_A3
Mobile SDRAM Type 1
161
Preliminary
49 Revision Summary
49.1 Revision A0 (April 1, 2005)
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49.2 Revision A1 (April 25, 2005)
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Mobile SDRAM Type 1
SDRAM_01_A3 November 8, 2005
Mobile SDRAM Type 2
2M x 16Bit x 4 Banks SDRAM
PRELIMINARY
Features
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Publication Number SDRAM_00
Revision A
Amendment 0
Issue Date May 25, 2004
Preliminaryn
50 Absolute Maximum Ratings
Parameter Symbol Value Unit
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51 DC Operating Conditions
5HFRPPHQGHG RSHUDWLQJ FRQGLWLRQV 9ROWDJH UHIHUHQFHG WR 966
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52 Capacitance
9'' 9 7$
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Min Max Unit Note
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164
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SDRAM_00_A0 May 25, 2004
Preliminary
53 DC Characteristics
Parameter 2SHUDWLQJ &XUUHQW 2QH %DQN $FWLYH 3UHFKDUJH 6WDQGE\ &XUUHQW LQ SRZHU GRZQ PRGH 3UHFKDUJH 6WDQGE\ &XUUHQW LQ QRQ SRZHUGRZQ PRGH $FWLYH 6WDQGE\ &XUUHQW LQ SRZHU GRZQ PRGH $FWLYH 6WDQGE\ &XUUHQW LQ QRQ SRZHU GRZQ PRGH 2QH %DQN $FWLYH Symbol ,&& ,&&3 ,&&36 ,&&1 ,&&16 ,&&3 ,&&36 ,&&1 ,&&16 ,&& ,&& %XUVW OHQJWK W5& W5& PLQ P$ ,2 &.( 9,/PD[ W&& &.( QV &/. 9,/PD[ W&& Test Condition Value Unit Note P$ P$ P$ P$ P$ P$ P$ P$ P$
&.( 9,+PLQ &6 9,+PLQ W&& QV ,QSXW VLJQDOV DUH FKDQJHG RQH WLPH GXULQJ QV &.( 9,+PLQ &/. 9,/PD[ W&& ,QSXW VLJQDOV DUH VWDEOH &.( 9,/PD[ W&& &.( QV &/. 9,/PD[ W&&
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54 AC Operating Test Conditions
9'' 9 9 7$
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Figure 54.1 DC Output Load Circuit
May 25, 2004 SDRAM_00_A0
S73WS256N Based MCPs
165
Preliminaryn
Vtt=0.5 x VDDQ
50 Output Z0=50 30pF
Figure 54.2 AC Output Load Circuit
55 Operating AC Parameter
$& RSHUDWLQJ FRQGLWLRQV XQOHVV RWKHUZLVH QRWHG
Parameter 5RZ DFWLYH WR URZ DFWLYH GHOD\ 5$6 WR &$6 GHOD\ 5RZ SUHFKDUJH WLPH 5RZ DFWLYH WLPH 5RZ F\FOH WLPH /DVW GDWD LQ WR URZ SUHFKDUJH /DVW GDWD LQ WR $FWLYH GHOD\ /DVW GDWD LQ WR QHZ FRO DGGUHVV GHOD\ /DVW GDWD LQ WR EXUVW VWRS $XWR UHIUHVK F\FOH WLPH ([LW VHOI UHIUHVK WR DFWLYH FRPPDQG &RO DGGUHVV WR FRO DGGUHVV GHOD\ 1XPEHU RI YDOLG RXWSXW GDWD 1XPEHU RI YDOLG RXWSXW GDWD 1XPEHU RI YDOLG RXWSXW GDWD Symbol W55'PLQ W5&'PLQ W53PLQ W5$6PLQ W5$6PD[ W5&PLQ W5'/PLQ W'$/PLQ W&'/PLQ W%'/PLQ W$5)&PLQ W65);PLQ W&&'PLQ &$6 ODWHQF\ &$6 ODWHQF\ &$6 ODWHQF\ Value W5'/ W53 HD V QV QV &/. &/. QV QV &/. QV Unit Note
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166
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SDRAM_00_A0 May 25, 2004
Preliminary
56 AC Characteristics
$& RSHUDWLQJ FRQGLWLRQV XQOHVV RWKHUZLVH QRWHG
Parameter &/. F\FOH WLPH &/. F\FOH WLPH &/. F\FOH WLPH &/. WR YDOLG RXWSXW GHOD\ &/. WR YDOLG RXWSXW GHOD\ &/. WR YDOLG RXWSXW GHOD\ 2XWSXW GDWD KROG WLPH 2XWSXW GDWD KROG WLPH 2XWSXW GDWD KROG WLPH &/. KLJK SXOVH ZLGWK &/. ORZ SXOVH ZLGWK ,QSXW VHWXS WLPH ,QSXW KROG WLPH &/. WR RXWSXW LQ /RZ= &$6 ODWHQF\ &/. WR RXWSXW LQ +L= &$6 ODWHQF\ &$6 ODWHQF\ W6+= &$6 ODWHQF\ &$6 ODWHQF\ &$6 ODWHQF\ &$6 ODWHQF\ &$6 ODWHQF\ &$6 ODWHQF\ &$6 ODWHQF\ &$6 ODWHQF\ &$6 ODWHQF\ W&+ W&/ W66 W6+ W6/= QV W2+ QV W6$& W&& Symbol Min QV QV Max Unit Note
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May 25, 2004 SDRAM_00_A0
S73WS256N Based MCPs
167
Preliminaryn
57 Simplified Truth Table
Command 5HJLVWHU 0RGH 5HJLVWHU 6HW $XWR 5HIUHVK 5HIUHVK 6HOI 5HIUHVK (QWU\ ([LW CKEn-1 CKEn CS# RAS# CAS# WE# DQM + + / + + ; + / + ; ; / / / + / / / / + ; / + / / + ; + / / + + ; + + ; ; ; ; ; 9 / 9 + / + + %DQN 6HOHFWLRQ $OO %DQNV (QWU\ ([LW (QWU\ ([LW + + / + / + + ; + / ; ; ; / + / + / / / + / ; + / + / + + / ; 9 ; ; + ; 9 ; ; + ; + ; + / + + ; 9 ; ; + ; 9 / / / ; 9 ; ; + ; 9 ; ; ; ; ; ; ; ; 9 ; ; ; 9 ; / + ; 9 + ; ; BA0,1 A10/AP A11, A9 ~ A0 Note 23 &2'( ; ; 5RZ $GGUHVV &ROXPQ $GGUHVV $a$ &ROXPQ $GGUHVV $a$
%DQN $FWLYH 5HDG &ROXPQ $GGUHVV :ULWH &ROXPQ $GGUHVV %XUVW 6WRS 3UHFKDUJH
5RZ $GGU $XWR 3UHFKDUJH 'LVDEOH $XWR 3UHFKDUJH (QDEOH $XWR 3UHFKDUJH 'LVDEOH $XWR 3UHFKDUJH (QDEOH
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58 Mode Register Field Table to Program Modes
Address )XQFWLRQ BA0 ~ BA1 6HWWLQJ IRU 1RUPDO 056 A11 ~ A10/AP 5)8 A9 (Note 2) :%/ A8 A7 A6 A5 A4 A3 %7 A2 A1 A0 7HVW 0RGH &$6 /DWHQF\ %XUVW /HQJWK
168
S73WS256N Based MCPs
SDRAM_00_A0 May 25, 2004
Preliminary
59 Normal MRS Mode
Test Mode A8 A9 A7 Type 0RGH 5HJLVWHU 6HW 5HVHUYHG 5HVHUYHG 5HVHUYHG Length %XUVW 6LQJOH %LW A6 CAS Latency A5 A4 Latency 5HVHUYHG 5HVHUYHG 5HVHUYHG 5HVHUYHG 5HVHUYHG BA1 A3 BA0 Burst Type Type 6HTXHQWLDO ,QWHUOHDYH Mode Select Mode 6HWWLQJ IRU 1RUPDO 056 A2 A1 Burst Length A0 BT=0 5HVHUYHG 5HVHUYHG 5HVHUYHG )XOO 3DJH BT=1 5HVHUYHG 5HVHUYHG 5HVHUYHG 5HVHUYHG
Write Burst Length
1RWH )XOO 3DJH /HQJWK [ 0E 0E 0E 0E
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60 EMRS for PASR (Partial Array Self Ref) & DS (Driver Strength)
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Reserved Address A11~A10/AP A8 A7
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61 Partial Array Self Refresh
,Q RUGHU WR VDYH SRZHU FRQVXPSWLRQ 0RELOH 6'5$0 KDV 3$65 RSWLRQ 0RELOH 6'5$0 VXSSRUWV NLQGV RI 3$65 LQ VHOI UHIUHVK PRGH )XOO $UUD\ RI IXOO DUUD\ DQG RI IXOO DUUD\
BA1=0 BA0=0
BA1=0 BA0=1
BA1=0 BA0=0
BA1=0 BA0=1
BA1=0 BA0=0
BA1=0 BA0=1
BA1=1 BA0=0
BA1=1 BA0=1
BA1=1 BA0=0
BA1=1 BA0=1
BA1=1 BA0=0
BA1=1 BA0=1
- Full Array
- 1/2 of full Array
- 1/4 of full Array
Partial Self Refresh Area
May 25, 2004 SDRAM_00_A0
S73WS256N Based MCPs
169
Preliminaryn
62 Internal Temperature Compensated Self Refresh (TCSR)
Self Refresh Current (Icc 6) Temperature Range 0D[ & Full Array 1/2 of full array 1/4 of full array Unit
0D[ &
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63 Power Up Sequence
$SSO\ SRZHU DQG DWWHPSW WR PDLQWDLQ &.( DW D KLJK VWDWH DQG DOO RWKHU LQSXWV PD\ EH XQGH ILQHG $SSO\ 9'' EHIRUH RU DW WKH VDPH WLPH DV 9''4 0DLQWDLQ VWDEOH SRZHU VWDEOH FORFN DQG 123 LQSXW FRQGLWLRQ IRU D PLQLPXP RI XV ,VVXH SUHFKDUJH FRPPDQGV IRU DOO EDQNV RI WKH GHYLFHV ,VVXH RU PRUH DXWRUHIUHVK FRPPDQGV ,VVXH D PRGH UHJLVWHU VHW FRPPDQG WR LQLWLDOL]H WKH PRGH UHJLVWHU ,VVXH D H[WHQGHG PRGH UHJLVWHU VHW FRPPDQG WR GHILQH '6 RU 3$65 RSHUDWLQJ W\SH RI WKH GHYLFH DIWHU QRUPDO 056

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64 Burst Sequence
64.1 Burst Length = 4
Initial Address A1 A0 Sequential Interleave

170
S73WS256N Based MCPs
SDRAM_00_A0 May 25, 2004
Preliminary
64.2 Burst Length = 8
Initial Address A2 A1 A0 Sequential Interleave

65 Device Operations
65.1 Addresses of 64Mb
%DQN $GGUHVVHV %$ a %$
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65.2 Addresses of 128Mb
%DQN $GGUHVVHV %$ a %$
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May 25, 2004 SDRAM_00_A0
S73WS256N Based MCPs
171
Preliminaryn
$GGUHVV ,QSXWV $ a $
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WLSOH[HG LQWR DGGUHVV LQSXW SLQV $ a $ 7KH ELW URZ DGGUHVVHV DUH ODWFKHG DORQJ ZLWK 5$6 DQG %$ a %$ GXULQJ EDQN DFWLYDWH FRPPDQG 7KH ELW FROXPQ DGGUHVVHV DUH ODWFKHG DORQJ ZLWK &$6 :( DQG %$ a %$ GXULQJ UHDG RU ZULWH FRPPDQG
65.3 Clock
7KH FORFN LQSXW LV XVHG DV WKH UHIHUHQFH IRU DOO 6'5$0 RSHUDWLRQV $OO RSHUDWLRQV DUH V\QFKURQL]HG WR WKH SRVLWLYH JRLQJ HGJH RI WKH FORFN 7KH FORFN WUDQVLWLRQV PXVW EH PRQRWRQLF EHWZHHQ 9,/ DQG 9,+ 'XULQJ RSHUDWLRQ ZLWK &.( KLJK DOO LQSXWV DUH DVVXPHG WR EH LQ D YDOLG VWDWH ORZ RU KLJK IRU WKH GXUDWLRQ RI VHWXS DQG KROG WLPH DURXQG SRVLWLYH HGJH RI WKH FORFN LQ RUGHU WR IXQFWLRQ ZHOO 4 SHUIRUP DQG ,&& VSHFLILFDWLRQV
65.4 Clock Enable (CKE)
7KH FORFN HQDEOH&.( JDWHV WKH FORFN RQWR 6'5$0 ,I &.( JRHV ORZ V\QFKURQRXVO\ ZLWK FORFN VHWXS DQG KROG WLPH DUH WKH VDPH DV RWKHU LQSXWV WKH LQWHUQDO FORFN LV VXVSHQGHG IURP WKH QH[W FORFN F\FOH DQG WKH VWDWH RI RXWSXW DQG EXUVW DGGUHVV LV IUR]HQ DV ORQJ DV WKH &.( UHPDLQV ORZ $OO RWKHU LQSXWV DUH LJQRUHG IURP WKH QH[W FORFN F\FOH DIWHU &.( JRHV ORZ :KHQ DOO EDQNV DUH LQ WKH LGOH VWDWH DQG &.( JRHV ORZ V\QFKURQRXVO\ ZLWK FORFN WKH 6'5$0 HQWHUV WKH SRZHU GRZQ PRGH IURP WKH QH[W FORFN F\FOH 7KH 6'5$0 UHPDLQV LQ WKH SRZHU GRZQ PRGH LJQRULQJ WKH RWKHU LQSXWV DV ORQJ DV &.( UHPDLQV ORZ 7KH SRZHU GRZQ H[LW LV V\QFKURQRXV DV WKH LQWHUQDO FORFN LV VXVSHQGHG :KHQ &.( JRHV KLJK DW OHDVW &/. W66EHIRUH WKH KLJK JRLQJ HGJH RI WKH FORFN WKHQ WKH 6'5$0 EHFRPHV DFWLYH IURP WKH VDPH FORFN HGJH DFFHSWLQJ DOO WKH LQSXW FRPPDQGV
65.5 NOP and Device Deselect
:KHQ 5$6 &$6 DQG :( DUH KLJK WKH 6'5$0 SHUIRUPV QR RSHUDWLRQ 123 123 GRHV QRW LQLWLDWH DQ\ QHZ RSHUDWLRQ EXW LV QHHGHG WR FRPSOHWH RSHUDWLRQV ZKLFK UHTXLUH PRUH WKDQ VLQJOH FORFN F\FOH OLNH EDQN DFWLYDWH EXUVW UHDG DXWR UHIUHVK HWF 7KH GHYLFH GHVHOHFW LV DOVR D 123 DQG LV HQWHUHG E\ DVVHUWLQJ &6 KLJK &6 KLJK GLVDEOHV WKH FRPPDQG GHFRGHU VR WKDW 5$6 &$6 :( DQG DOO WKH DGGUHVV LQSXWV DUH LJQRUHG
65.6 DQM Operation
7KH '40 LV XVHG WR PDVN LQSXW DQG RXWSXW RSHUDWLRQV ,W ZRUNV VLPLODU WR 2( GXULQJ UHDG RSHU DWLRQ DQG LQKLELWV ZULWLQJ GXULQJ ZULWH RSHUDWLRQ 7KH UHDG ODWHQF\ LV WZR F\FOHV IURP '40 DQG ]HUR F\FOH IRU ZULWH ZKLFK PHDQV '40 PDVNLQJ RFFXUV WZR F\FOHV ODWHU LQ UHDG F\FOH DQG RFFXUV LQ WKH VDPH F\FOH GXULQJ ZULWH F\FOH '40 RSHUDWLRQ LV V\QFKURQRXV ZLWK WKH FORFN 7KH '40 VLJ QDO LV LPSRUWDQW GXULQJ EXUVW LQWHUUXSWLRQV RI ZULWH ZLWK UHDG RU SUHFKDUJH LQ WKH 6'5$0 'XH WR DV\QFKURQRXV QDWXUH RI WKH LQWHUQDO ZULWH WKH '40 RSHUDWLRQ LV FULWLFDO WR DYRLG XQZDQWHG RU LQ FRPSOHWH ZULWHV ZKHQ WKH FRPSOHWH EXUVW ZULWH LV QRW UHTXLUHG 3OHDVH UHIHU WR '40 WLPLQJ GLDJUDP DOVR
65.7 Mode Register Set (MRS)
7KH PRGH UHJLVWHU VWRUHV WKH GDWD IRU FRQWUROOLQJ WKH YDULRXV RSHUDWLQJ PRGHV RI 6'5$0 ,W SUR JUDPV WKH &$6 ODWHQF\ EXUVW W\SH EXUVW OHQJWK WHVW PRGH DQG YDULRXV YHQGRU VSHFLILF RSWLRQV WR PDNH 6'5$0 XVHIXO IRU YDULHW\ RI GLIIHUHQW DSSOLFDWLRQV 7KH GHIDXOW YDOXH RI WKH PRGH UHJLVWHU LV QRW GHILQHG WKHUHIRUH WKH PRGH UHJLVWHU PXVW EH ZULWWHQ DIWHU SRZHU XS WR RSHUDWH WKH 6'5$0 7KH PRGH UHJLVWHU LV ZULWWHQ E\ DVVHUWLQJ ORZ RQ &6 5$6 &$6 DQG :( 7KH 6'5$0 VKRXOG
172
S73WS256N Based MCPs
SDRAM_00_A0 May 25, 2004
Preliminary
EH LQ DFWLYH PRGH ZLWK &.( DOUHDG\ KLJK SULRU WR ZULWLQJ WKH PRGH UHJLVWHU 7KH VWDWH RI DGGUHVV SLQV $ a $Q DQG %$ a %$ LQ WKH VDPH F\FOH DV &6 5$6 &$6 DQG :( JRLQJ ORZ LV WKH GDWD ZULWWHQ LQ WKH PRGH UHJLVWHU 7ZR FORFN F\FOHV LV UHTXLUHG WR FRPSOHWH WKH ZULWH LQ WKH PRGH UHJLVWHU 7KH PRGH UHJLVWHU FRQWHQWV FDQ EH FKDQJHG XVLQJ WKH VDPH FRPPDQG DQG FORFN F\FOH UHTXLUHPHQWV GXULQJ RSHUDWLRQ DV ORQJ DV DOO EDQNV DUH LQ WKH LGOH VWDWH 7KH PRGH UHJLVWHU LV GL YLGHG LQWR YDULRXV ILHOGV GHSHQGLQJ RQ WKH ILHOGV RI IXQFWLRQV 7KH EXUVW OHQJWK ILHOG XVHV $ a $ EXUVW W\SH XVHV $ &$6 ODWHQF\ UHDG ODWHQF\ IURP FROXPQ DGGUHVV XVH $ a $ YHQGRU VSHFLILF RSWLRQV RU WHVW PRGH XVH $ a $ $$3 a $Q DQG %$ a %$ 7KH ZULWH EXUVW OHQJWK LV SUR JUDPPHG XVLQJ $ $ a $ $$3 a $Q DQG %$ a %$ PXVW EH VHW WR ORZ IRU QRUPDO 6'5$0 RSHUDWLRQ 5HIHU WR WKH WDEOH IRU VSHFLILF FRGHV IRU YDULRXV EXUVW OHQJWK EXUVW W\SH DQG &$6 ODWHQFLHV
65.8 Extended Mode Register Set (EMRS)
7KH H[WHQGHG PRGH UHJLVWHU VWRUHV WKH GDWD IRU VHOHFWLQJ GULYHU VWUHQJWK DQG SDUWLDO VHOI UHIUHVK (056 F\FOH LV QRW PDQGDWRU\ DQG WKH (056 FRPPDQG QHHGV WR EH LVVXHG RQO\ ZKHQ '6 RU 3$65 LV XVHG 7KH GHIDXOW VWDWH ZLWKRXW (056 FRPPDQG LVVXHG LV KDOI GULYHU VWUHQJWK DQG IXOO DUUD\ UHIUHVKHG 7KH H[WHQGHG PRGH UHJLVWHU LV ZULWWHQ E\ DVVHUWLQJ ORZ RQ &6 5$6 &$6 :( DQG KLJK RQ %$ORZ RQ %$7KH 6'5$0 VKRXOG EH LQ DOO EDQN SUHFKDUJH ZLWK &.( DOUHDG\ KLJK SULRU WR ZULWLQJ LQWR WKH H[WHQGHG PRGH UHJLVWHU 7KH VWDWH RI DGGUHVV SLQV $ a $ LQ WKH VDPH F\FOH DV &6 5$6 &$6 DQG :( JRLQJ ORZ LV ZULWWHQ LQ WKH H[WHQGHG PRGH UHJLVWHU 7ZR FORFN F\FOHV DUH UHTXLUHG WR FRPSOHWH WKH ZULWH RSHUDWLRQ LQ WKH H[WHQGHG PRGH UHJLVWHU 7KH PRGH UHJLVWHU FRQWHQWV FDQ EH FKDQJHG XVLQJ WKH VDPH FRPPDQG DQG FORFN F\FOH UHTXLUHPHQWV GXULQJ RSHUDWLRQ DV ORQJ DV DOO EDQNV DUH LQ WKH LGOH VWDWH $ $ DUH XVHG IRU SDUWLDO VHOI UHIUHVK $ $ DUH XVHG IRU 'ULYHU VWUHQJWK /RZ RQ %$ DQG +LJK RQ %$ DUH XVHG IRU (056 $OO WKH RWKHU DGGUHVV SLQV H[FHSW $a$ $a$ %$ %$ PXVW EH VHW WR ORZ IRU SURSHU (056 RSHUD WLRQ 5HIHU WR WKH WDEOH IRU VSHFLILF FRGHV
65.9 Bank Activate
7KH EDQN DFWLYDWH FRPPDQG LV XVHG WR VHOHFW D UDQGRP URZ LQ DQ LGOH EDQN %\ DVVHUWLQJ ORZ RQ 5$6 DQG &6 ZLWK GHVLUHG URZ DQG EDQN DGGUHVV D URZ DFFHVV LV LQLWLDWHG 7KH UHDG RU ZULWH RSHUDWLRQ FDQ RFFXU DIWHU D WLPH GHOD\ RI W5&'PLQ IURP WKH WLPH RI EDQN DFWLYDWLRQ W5&' LV DQ LQWHUQDO WLPLQJ SDUDPHWHU RI 6'5$0 WKHUHIRUH LW LV GHSHQGHQW RQ RSHUDWLQJ FORFN IUHTXHQF\ 7KH PLQLPXP QXPEHU RI FORFN F\FOHV UHTXLUHG EHWZHHQ EDQN DFWLYDWH DQG UHDG RU ZULWH FRPPDQG VKRXOG EH FDOFXODWHG E\ GLYLGLQJ W5&'PLQ ZLWK F\FOH WLPH RI WKH FORFN DQG WKHQ URXQGLQJ RII WKH UHVXOW WR WKH QH[W KLJKHU LQWHJHU 7KH 6'5$0 KDV IRXU LQWHUQDO EDQNV LQ WKH VDPH FKLS DQG VKDUHV SDUW RI WKH LQWHUQDO FLUFXLWU\ WR UHGXFH FKLS DUHD WKHUHIRUH LW UHVWULFWV WKH DFWLYDWLRQ RI IRXU EDQNV VLPXOWDQHRXVO\ $OVR WKH QRLVH JHQHUDWHG GXULQJ VHQVLQJ RI HDFK EDQN RI 6'5$0 LV KLJK UHTXLULQJ VRPH WLPH IRU SRZHU VXSSOLHV WR UHFRYHU EHIRUH DQRWKHU EDQN FDQ EH VHQVHG UHOLDEO\ W55'PLQ VSHFLILHV WKH PLQLPXP WLPH UH TXLUHG EHWZHHQ DFWLYDWLQJ GLIIHUHQW EDQN 7KH QXPEHU RI FORFN F\FOHV UHTXLUHG EHWZHHQ GLIIHUHQW EDQN DFWLYDWLRQ PXVW EH FDOFXODWHG VLPLODU WR W5&' VSHFLILFDWLRQ 7KH PLQLPXP WLPH UHTXLUHG IRU WKH EDQN WR EH DFWLYH WR LQLWLDWH VHQVLQJ DQG UHVWRULQJ WKH FRPSOHWH URZ RI G\QDPLF FHOOV LV GHWHU PLQHG E\ W5$6PLQ (YHU\ 6'5$0 EDQN DFWLYDWH FRPPDQG PXVW VDWLVI\ W5$6PLQ VSHFLILFDWLRQ EHIRUH D SUHFKDUJH FRPPDQG WR WKDW DFWLYH EDQN FDQ EH DVVHUWHG 7KH PD[LPXP WLPH DQ\ EDQN FDQ EH LQ WKH DFWLYH VWDWH LV GHWHUPLQHG E\ W5$6PD[ 7KH QXPEHU RI F\FOHV IRU ERWK W5$6PLQ DQG W5$6PD[ FDQ EH FDOFXODWHG VLPLODU WR W5&' VSHFLILFDWLRQ
65.10 Burst Read
7KH EXUVW UHDG FRPPDQG LV XVHG WR DFFHVV EXUVW RI GDWD RQ FRQVHFXWLYH FORFN F\FOHV IURP DQ DF WLYH URZ LQ DQ DFWLYH EDQN 7KH EXUVW UHDG FRPPDQG LV LVVXHG E\ DVVHUWLQJ ORZ RQ &6 DQG &$6 ZLWK :( EHLQJ KLJK RQ WKH SRVLWLYH HGJH RI WKH FORFN 7KH EDQN PXVW EH DFWLYH IRU DW OHDVW W5&'PLQ EHIRUH WKH EXUVW UHDG FRPPDQG LV LVVXHG 7KH ILUVW RXWSXW DSSHDUV LQ &$6 ODWHQF\
May 25, 2004 SDRAM_00_A0
S73WS256N Based MCPs
173
Preliminaryn
QXPEHU RI FORFN F\FOHV DIWHU WKH LVVXH RI EXUVW UHDG FRPPDQG 7KH EXUVW OHQJWK EXUVW VHTXHQFH DQG ODWHQF\ IURP WKH EXUVW UHDG FRPPDQG LV GHWHUPLQHG E\ WKH PRGH UHJLVWHU ZKLFK LV DOUHDG\ SURJUDPPHG 7KH EXUVW UHDG FDQ EH LQLWLDWHG RQ DQ\ FROXPQ DGGUHVV RI WKH DFWLYH URZ 7KH DG GUHVV ZUDSV DURXQG LI WKH LQLWLDO DGGUHVV GRHV QRW VWDUW IURP D ERXQGDU\ VXFK WKDW QXPEHU RI RXWSXWV IURP HDFK ,2 DUH HTXDO WR WKH EXUVW OHQJWK SURJUDPPHG LQ WKH PRGH UHJLVWHU 7KH RXWSXW JRHV LQWR KLJKLPSHGDQFH DW WKH HQG RI WKH EXUVW XQOHVV D QHZ EXUVW UHDG ZDV LQLWLDWHG WR NHHS WKH GDWD RXWSXW JDSOHVV 7KH EXUVW UHDG FDQ EH WHUPLQDWHG E\ LVVXLQJ DQRWKHU EXUVW UHDG RU EXUVW ZULWH LQ WKH VDPH EDQN RU WKH RWKHU DFWLYH EDQN RU D SUHFKDUJH FRPPDQG WR WKH VDPH EDQN 7KH EXUVW VWRS FRPPDQG LV YDOLG DW HYHU\ SDJH EXUVW OHQJWK
65.11 Burst Write
7KH EXUVW ZULWH FRPPDQG LV VLPLODU WR EXUVW UHDG FRPPDQG DQG LV XVHG WR ZULWH GDWD LQWR WKH 6'5$0 RQ FRQVHFXWLYH FORFN F\FOHV LQ DGMDFHQW DGGUHVVHV GHSHQGLQJ RQ EXUVW OHQJWK DQG EXUVW VHTXHQFH %\ DVVHUWLQJ ORZ RQ &6 &$6 DQG :( ZLWK YDOLG FROXPQ DGGUHVV D ZULWH EXUVW LV LQLWLDWHG 7KH GDWD LQSXWV DUH SURYLGHG IRU WKH LQLWLDO DGGUHVV LQ WKH VDPH FORFN F\FOH DV WKH EXUVW ZULWH FRPPDQG 7KH LQSXW EXIIHU LV GHVHOHFWHG DW WKH HQG RI WKH EXUVW OHQJWK HYHQ WKRXJK WKH LQWHUQDO ZULWLQJ FDQ EH FRPSOHWHG \HW 7KH ZULWLQJ FDQ EH FRPSOHWHG E\ LVVXLQJ D EXUVW UHDG DQG '40 IRU EORFNLQJ GDWD LQSXWV RU EXUVW ZULWH LQ WKH VDPH RU DQRWKHU DFWLYH EDQN 7KH EXUVW VWRS FRPPDQG LV YDOLG DW HYHU\ EXUVW OHQJWK 7KH ZULWH EXUVW FDQ DOVR EH WHUPLQDWHG E\ XVLQJ '40 IRU EORFNLQJ GDWD DQG SURFUHDWLQJ WKH EDQN W5'/ DIWHU WKH ODVW GDWD LQSXW WR EH ZULWWHQ LQWR WKH DFWLYH URZ 6HH '40 23(5$7,21 DOVR
65.12 All Banks Precharge
$OO EDQNV FDQ EH SUHFKDUJHG DW WKH VDPH WLPH E\ XVLQJ 3UHFKDUJH DOO FRPPDQG $VVHUWLQJ ORZ RQ &6 5$6 DQG :( ZLWK KLJK RQ $$3 DIWHU DOO EDQNV KDYH VDWLVILHG W5$6PLQ UHTXLUHPHQW SHUIRUPV SUHFKDUJH RQ DOO EDQNV $W WKH HQG RI W53 DIWHU SHUIRUPLQJ SUHFKDUJH WR DOO WKH EDQNV DOO EDQNV DUH LQ LGOH VWDWH
65.13 Precharge
7KH SUHFKDUJH RSHUDWLRQ LV SHUIRUPHG RQ DQ DFWLYH EDQN E\ DVVHUWLQJ ORZ RQ &6 5$6 :( DQG $$3 ZLWK YDOLG %$ a %$ RI WKH EDQN WR EH SUHFKDUJHG 7KH SUHFKDUJH FRPPDQG FDQ EH DVVHUWHG DQ\WLPH DIWHU W5$6PLQ LV VDWLVILHG IURP WKH EDQN DFWLYH FRPPDQG LQ WKH GHVLUHG EDQN W53 LV GHILQHG DV WKH PLQLPXP QXPEHU RI FORFN F\FOHV UHTXLUHG WR FRPSOHWH URZ SUHFKDUJH LV FDO FXODWHG E\ GLYLGLQJ W53 ZLWK FORFN F\FOH WLPH DQG URXQGLQJ XS WR WKH QH[W KLJKHU LQWHJHU &DUH VKRXOG EH WDNHQ WR PDNH VXUH WKDW EXUVW ZULWH LV FRPSOHWHG RU '40 LV XVHG WR LQKLELW ZULWLQJ EHIRUH SUHFKDUJH FRPPDQG LV DVVHUWHG 7KH PD[LPXP WLPH DQ\ EDQN FDQ EH DFWLYH LV VSHFLILHG E\ W5$6PD[ 7KHUHIRUH HDFK EDQN DFWLYDWH FRPPDQG $W WKH HQG RI SUHFKDUJH WKH EDQN HQWHUV WKH LGOH VWDWH DQG LV UHDG\ WR EH DFWLYDWHG DJDLQ (QWU\ WR 3RZHU GRZQ $XWR UHIUHVK 6HOI UHIUHVK DQG 0RGH UHJLVWHU VHW HWF LV SRVVLEOH RQO\ ZKHQ DOO EDQNV DUH LQ LGOH VWDWH
65.14 Auto Precharge
7KH SUHFKDUJH RSHUDWLRQ FDQ DOVR EH SHUIRUPHG E\ XVLQJ DXWR SUHFKDUJH 7KH 6'5$0 LQWHUQDOO\ JHQHUDWHV WKH WLPLQJ WR VDWLVI\ W5$6PLQ DQG W53 IRU WKH SURJUDPPHG EXUVW OHQJWK DQG &$6 OD WHQF\ 7KH DXWR SUHFKDUJH FRPPDQG LV LVVXHG DW WKH VDPH WLPH DV EXUVW UHDG RU EXUVW ZULWH E\ DVVHUWLQJ KLJK RQ $$3 ,I EXUVW UHDG RU EXUVW ZULWH E\ DVVHUWLQJ KLJK RQ $$3 WKH EDQN LV OHIW DFWLYH XQWLO D QHZ FRPPDQG LV DVVHUWHG 2QFH DXWR SUHFKDUJH FRPPDQG LV JLYHQ QR QHZ FRP PDQGV DUH SRVVLEOH WR WKDW SDUWLFXODU EDQN XQWLO WKH EDQN DFKLHYHV LGOH VWDWH
65.15 Auto Refresh
7KH VWRUDJH FHOOV RI 0E 0E 0E DQG 0E 6'5$0 QHHG WR EH UHIUHVKHG HYHU\ PV WR PDLQWDLQ GDWD $Q DXWR UHIUHVK F\FOH DFFRPSOLVKHV UHIUHVK RI D VLQJOH URZ RI VWRUDJH FHOOV 7KH LQWHUQDO FRXQWHU LQFUHPHQWV DXWRPDWLFDOO\ RQ HYHU\ DXWR UHIUHVK F\FOH WR UHIUHVK DOO WKH URZV $Q
174
S73WS256N Based MCPs
SDRAM_00_A0 May 25, 2004
Preliminary
DXWR UHIUHVK FRPPDQG LV LVVXHG E\ DVVHUWLQJ ORZ RQ &6 5$6 DQG &$6 ZLWK KLJK RQ &.( DQG :( 7KH DXWR UHIUHVK FRPPDQG FDQ RQO\ EH DVVHUWHG ZLWK DOO EDQNV EHLQJ LQ LGOH VWDWH DQG WKH GHYLFH LV QRW LQ SRZHU GRZQ PRGH &.( LV KLJK LQ WKH SUHYLRXV F\FOH 7KH WLPH UHTXLUHG WR FRP SOHWH WKH DXWR UHIUHVK RSHUDWLRQ LV VSHFLILHG E\ W5&PLQ 7KH PLQLPXP QXPEHU RI FORFN F\FOHV UHTXLUHG FDQ EH FDOFXODWHG E\ GULYLQJ W$5)& ZLWK FORFN F\FOH WLPH DQG WKHP URXQGLQJ XS WR WKH QH[W KLJKHU LQWHJHU 7KH DXWR UHIUHVK FRPPDQG PXVW EH IROORZHG E\ 123
V XQWLO WKH DXWR UHIUHVK RS HUDWLRQ LV FRPSOHWHG $OO EDQNV ZLOO EH LQ WKH LGOH VWDWH DW WKH HQG RI DXWR UHIUHVK RSHUDWLRQ 7KH DXWR UHIUHVK LV WKH SUHIHUUHG UHIUHVK PRGH ZKHQ WKH 6'5$0 LV EHLQJ XVHG IRU QRUPDO GDWD WUDQV DFWLRQV 7KH 0E DQG 0E 6'5$0V DXWR UHIUHVK F\FOH FDQ EH SHUIRUPHG RQFH LQ V RU D EXUVW RI DXWR UHIUHVK F\FOHV RQFH LQ PV 7KH 0E DQG 0E 6'5$0V DXWR UHIUHVK F\FOH FDQ EH SHUIRUPHG RQFH LQ V RU D EXUVW RI DXWR UHIUHVK F\FOHV RQFH LQ PV
65.16 Self Refresh
7KH VHOI UHIUHVK LV DQRWKHU UHIUHVK PRGH DYDLODEOH LQ WKH 6'5$0 7KH VHOI UHIUHVK LV WKH SUHIHUUHG UHIUHVK PRGH IRU GDWD UHWHQWLRQ DQG ORZ SRZHU RSHUDWLRQ RI 6'5$0 ,Q VHOI UHIUHVK PRGH WKH 6'5$0 GLVDEOHV WKH LQWHUQDO FORFN DQG DOO WKH LQSXW EXIIHUV H[FHSW &.( 7KH UHIUHVK DGGUHVVLQJ DQG WLPLQJ DUH LQWHUQDOO\ JHQHUDWHG WR UHGXFH SRZHU FRQVXPSWLRQ 7KH VHOI UHIUHVK PRGH LV HQWHUHG IURP DOO EDQNV LGOH VWDWH E\ DVVHUWLQJ ORZ RQ &6 5$6 &$6 DQG &.( ZLWK KLJK RQ :( 2QFH WKH VHOI UHIUHVK PRGH LV HQWHUHG RQO\ &.( VWDWH EHLQJ ORZ PDW WHUV DOO WKH RWKHU LQSXWV LQFOXGLQJ WKH FORFN DUH LJQRUHG LQ RUGHU WR UHPDLQ LQ WKH VHOI UHIUHVK PRGH 7KH VHOI UHIUHVK LV H[LWHG E\ UHVWDUWLQJ WKH H[WHUQDO FORFN DQG WKHQ DVVHUWLQJ KLJK RQ &.( 7KLV PXVW EH IROORZHG E\ 123
V IRU D PLQLPXP WLPH RI W65); EHIRUH WKH 6'5$0 UHDFKHV LGOH VWDWH WR EHJLQ QRUPDO RSHUDWLRQ ,Q FDVH WKDW WKH V\VWHP XVHV EXUVW DXWR UHIUHVK GXULQJ QRUPDO RSHUDWLRQ LW LV UHFRPPHQGHG WR XVH EXUVW DXWR UHIUHVK F\FOHV IRU 0E DQG 0E DQG EXUVW DXWR UHIUHVK F\FOHV IRU 0E DQG 0E LPPHGLDWHO\ EHIRUH HQWHULQJ VHOI UHIUHVK PRGH DQG DIWHU H[LWLQJ LQ VHOI UHIUHVK PRGH 2Q WKH RWKHU KDQG LI WKH V\VWHP XVHV WKH GLVWULEXWHG DXWR UHIUHVK WKH V\VWHP RQO\ KDV WR NHHS WKH UHIUHVK GXW\ F\FOH
65.17 Basic Feature and Function Descriptions
1) Clock Suspended During Write CLK CMD CKE
Masked by CKE
2) Clock Suspended During Read (BL=4) CLK
WR
CMD CKE
RD
Masked by CKE
Internal CLK DQ(CL2) DQ(CL3) D0 D0 D1 D1 D2 D2 D3 D3
Internal CLK DQ(CL2) DQ(CL3) Q0 D Q1 Q0 Q2 Q1 Q3 Q2 Q3
Not Written
Suspended Dout
Figure 65.1
Clock Suspend
May 25, 2004 SDRAM_00_A0
S73WS256N Based MCPs
175
Preliminaryn
1) Write Mask (BL=4) CLK CMD DQM
Masked by CKE
2) Read Mask (BL=4) CLK
WR
CMD DQM
RD
DQ(CL2) DQ(CL3)
D0 D0
D1 D1
D3 D3
DQ(CL2) DQ(CL3)
Q0
Masked by CKE Hi-Z
Q2
Q3 Q2
Hi-Z
Q1
Q3
DQM to Data-in Mask = 0
DQM to Data-out Mask = 2
3) DQM with Clock Suspended (Full Page Read) -Note 2 CLK CMD CKE DQM DQ(CL2) DQ(CL3) Q0
Hi-Z Hi-Z
RD
Q2 Q1
Hi-Z Hi-Z
Q4 Q3
Hi-Z Hi-Z
Q6 Q5
Q7 Q6
Q8 Q7
Figure 65.2 DQM Operation
1RWHV &.( WR &/. GLVDEOHHQDEOH &/.
'40 PDNHV GDWD RXW +L= DIWHU &/.V ZKLFK VKRXOG PDVNHG E\ &.( / '40 PDVNV ERWK GDWDLQ DQG GDWDRXW
176
S73WS256N Based MCPs
SDRAM_00_A0 May 25, 2004
Preliminary
1) Read interrupted by Read (BL=4) -Note 1 CLK CMD ADD
DQ(CL2) DQ(CL3)
tCCD Note 2
RD A
RD B QA0 QB0 QB1 QB1 QB3 QA0 QB0 QB1 QB1 QB3
2) Write interrupted by Write (BL=2) CLK CMD WR WR
tCCD *2
3) Write interrupted by Read (BL=2) CLK CMD ADD
DQ(CL2) DQ(CL3)
WR
RD
tCCD *2
ADD
DQ
A
B
A DA0 DA0
B QB0 QB1 QB0 QB1
DA0 DB0 DB1
tCDL
Note 3
tCDL Note 3
Figure 65.3 CAS# Interrupt (1)
1RWHV %\ ,QWHUUXSW LW LV PHDQW WR VWRS EXUVW UHDGZULWH E\ H[WHUQDO FRPPDQG EHIRUH WKH HQG RI EXUVW %\ &$6 ,QWHUUXSW WR VWRS EXUVW UHDGZULWH E\ &$6 DFFHVV UHDG DQG ZULWH W&&' &$6 WR &$6 GHOD\ &/. W&'/ /DVW GDWD LQ WR QHZ FROXPQ DGGUHVV GHOD\ &/.
May 25, 2004 SDRAM_00_A0
S73WS256N Based MCPs
177
Preliminaryn
(a) CL=2, BL=4 CLK i) CMD DQM DQ ii) CMD DQM DQ iii) CMD DQM DQ iv) CMD DQM DQ (b) CL=3, BL=4 CLK i) CMD DQM DQ ii) CMD DQM DQ iii) CMD DQM DQ iv) CMD DQM DQ v) CMD DQM DQ Q0
Hi-Z
Note 1
RD
WR
D0 RD
D1 WR
D2
D3
Hi-Z
D0
D1 WR
D2
D3
RD
Hi-Z
D0
D1 WR
D2
D3
RD
Q0
Hi-Z
Note 1
D0
D1
D2
D3
RD
WR
D0 RD
D1 WR
D2
D3
D0 RD
D1 WR
D2
D3
D0 RD
D1 WR
D2
D3
Hi-Z
D0
D1 WR
D2
D3
RD
D0
D1
D2
D3
Figure 65.4 CAS# Interrupt (2): Read Interrupted by Write & DQM
1RWHV 7R SUHYHQW EXV FRQWHQWLRQ WKHUH VKRXOG EH DW OHDVW RQH JDS EHWZHHQ GDWD LQ DQG GDWD RXW
178
S73WS256N Based MCPs
SDRAM_00_A0 May 25, 2004
Preliminary
1) tRDL = 2CLK CLK CMD DQM DQ D0 D1 D2
Masked by DQM
WR
PRE
Note 3
Note 2
Figure 65.5 Write Interrupted by Precharge & DQM
1RWHV 7R SUHYHQW EXV FRQWHQWLRQ '40 VKRXOG EH LVVXHG ZKLFK PDNHV DW OHDVW RQH JDS EHWZHHQ GDWD LQ DQG GDWD RXW 7R LQKLELW LQYDOLG ZULWH '40 VKRXOG EH LVVXHG 7KLV SUHFKDUJH FRPPDQG DQG EXUVW ZULWH FRPPDQG VKRXOG EH RI WKH VDPH EDQN RWKHUZLVH LW LV QRW SUHFKDUJH LQWHUUXSW EXW RQO\ DQRWKHU EDQN SUHFKDUJH RI IRXU EDQNV RSHUDWLRQ
1) Normal Write BL=4 & tRDL=2CLK CLK CMD DQ WR D0 D1 D2 D3
tRDLNote 1
PRE
2) Normal Read (BL=4) CLK
Note 2
CMD DQ(CL2) DQ(CL3)
RD Q0 Q1 Q0
PRE Q2 Q1 Q3 Q2
Note 1 Note 2
Q3
Figure 65.6 Precharge
May 25, 2004 SDRAM_00_A0
S73WS256N Based MCPs
179
Preliminaryn
1) Normal Write (BL=4) CLK CMD DQ WR D0 D1 D2 D3
tRDL =2CLK tDAL =tRDL + tRPNote 4
2) Normal Read (BL=4) CLK ACT CMD DQ(CL2) DQ(CL3) RD Q0 Q1 Q0 Q2 Q1 Q3 Q2 Q3
Auto Precharge Starts Note 3 Auto Precharge Starts@tRDL=2CLK Note 3
Figure 65.7 Auto Precharge
1RWHV W5'/ &/. FDQ EH VXSSRUWHG 1XPEHU RI YDOLG RXWSXW GDWD DIWHU URZ SUHFKDUJH IRU &$6 /DWHQF\ UHVSHFWLYHO\ 7KH URZ DFWLYH FRPPDQG RI WKH SUHFKDUJH EDQN FDQ EH LVVXHG DIWHU W53 IURP WKLV SRLQW 7KH QHZ UHDGZULWH FRPPDQG RI RWKHU DFWLYDWHG EDQN FDQ EH LVVXHG IURP WKLV SRLQW $W EXUVW UHDGZULWH ZLWK DXWR SUHFKDUJH &$6 LQWHUUXSW RI WKH VDPH EDQN LV LOOHJDO W'$/ GHILQHG /DVW GDWD LQ WR $FWLYH GHOD\ W'$/ W5'/ W53 FDQ EH VXSSRUWHG
1) Normal Write BL=4 & tRDL=2CLK CLK CMD DQM DQ D0 D1 D2
tRDLNote 1
WR
PRE
2) Write Burst Stop (BL=8) CLK CMD DQM DQ D0 D1 D2 D3
tBDL Note 2
3) Read Interrupted by Precharge (BL=4) CLK
WR
STOP
CMD DQ(CL2) DQ(CL3)
RD
PRE Q0 Q1 Q0
1 2
Q1
4) Read Burst Stop (BL=4) CLK CMD DQ(CL2) DQ(CL3) RD
STOP
Q0
Q1 Q0
1 2
Q1
Figure 65.8 Burst Stop and Interrupted by Precharge
180
S73WS256N Based MCPs
SDRAM_00_A0 May 25, 2004
Preliminary
1) Mode Register Set CLK
Note 4
CMD
PRE
t RP
MRS
2CLK
ACT
Figure 65.9 MRS
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1) Clock Suspend (=Active Power Down) Exit CLK CKE Internal CLK CMD
Note 1
2) Power Down (=Precharge Power Down) Exit CLK
tSS
CKE Internal CLK RD CMD
Note 2
tSS
NOP ACT
Figure 65.10 Clock Suspend Exit and Power Down Exit $XWR 5HIUHVK
$Q DXWR UHIUHVK FRPPDQG LV LVVXHG E\ KDYLQJ &6 5$6 DQG &$6 KHOG ORZ ZLWK &.( DQG :( KLJK DW WKH ULVLQJ HGJH RI WKH FORFN &/. $OO EDQNV PXVW EH SUHFKDUJHG DQG LGOH IRU W53PLQ EHIRUH WKH DXWR UHIUHVK FRPPDQG LV DSSOLHG 1R FRQWURO RI WKH H[WHUQDO DGGUHVV SLQV LV UHTXLUHG RQFH WKLV F\FOH KDV VWDUWHG EHFDXVH RI WKH LQWHUQDO DGGUHVV FRXQWHU :KHQ WKH UHIUHVK F\FOH KDV FRPSOHWHG DOO EDQNV ZLOO EH LQ WKH LGOH VWDWH $ GHOD\ EHWZHHQ WKH DXWR UHIUHVK FRPPDQG DQG WKH QH[W DFWLYDWH FRPPDQG RU VXEVHTXHQW DXWR UHIUHVK FRPPDQG PXVW EH JUHDWHU WKDQ RU HTXDO WR WKH W$5)&PLQ
CLK Command CKE = High
PRE Auto Refresh CMD
tRP
tARFC(min)
Figure 65.11 Auto Refresh 6HOI 5HIUHVK
$ 6HOI 5HIUHVK FRPPDQG LV GHILQHG E\ KDYLQJ &6 5$6 &$6 DQG &.( KHOG ORZ ZLWK :( KLJK DW WKH ULVLQJ HGJH RI WKH FORFN 2QFH WKH VHOI 5HIUHVK FRPPDQG LV LQLWLDWHG &.( PXVW EH KHOG ORZ WR NHHS WKH GHYLFH LQ 6HOI 5HIUHVK PRGH $IWHU FORFN F\FOH IURP WKH VHOI UHIUHVK FRPPDQG DOO RI WKH H[WHUQDO FRQWURO VLJQDOV LQFOXGLQJ V\VWHP FORFN &/. FDQ EH GLVDEOHG H[FHSW &.( 7KH FORFN LV LQWHUQDOO\ GLVDEOHG GXULQJ 6HOI 5HIUHVK RSHUDWLRQ WR UHGXFH SRZHU 7R H[LW WKH 6HOI 5HIUHVK PRGH VXSSO\ VWDEOH FORFN LQSXW EHIRUH UHWXUQLQJ &.( KLJK DVVHUW GHVHOHFW RU 123 FRPPDQG DQG WKHQ DVVHUW &.( KLJK ,Q FDVH WKDW WKH V\VWHP XVHV EXUVW DXWR UHIUHVK GXULQJ QRUPDO RSHUDWLRQ LW LV UHFRPPHQGHG WR XVH EXUVW DXWR UHIUHVK F\FOH LPPHGLDWHO\ EHIRUH HQWHULQJ VHOI UHIUHVK PRGH DQG DIWHU H[LWLQJ LQ VHOI UHIUHVK PRGH 2Q WKH RWKHU KDQG LI WKH V\VWHP XVHV WKH GLVWULEXWHG DXWR UHIUHVK WKH V\VWHP RQO\ KDV WR NHHS WKH UHIUHVK GXW\ F\FOH
May 25, 2004 SDRAM_00_A0
S73WS256N Based MCPs
181
Preliminaryn
CLK
Stable Clock
Command CKE
Self Refresh
NOP
ACT
tSRFX(min)
tSS
tSS
Figure 65.12 Self Refresh
66 About Burst Type Control
6HTXHQWLDO &RXQWLQJ %DVLF 0RGH ,QWHUOHDYH &RXQWLQJ $W 056 $ 6HH WKH %XUVW 6HTXHQFH %/ %/ DQG IXOO SDJH $W 056 $ 6HH WKH %XUVW 6HTXHQFH %/ %/ $W %/ ,QWHUOHDYH &RXQWLQJ 6HTXHQWLDO &RXQWLQJ (YHU\ F\FOH 5HDG:ULWH &RPPDQG ZLWK UDQGRP FROXPQ DGGUHVV 5DQGRP FROXPQ $FFHVV FDQ UHDOL]H 5DQGRP &ROXPQ $FFHVV 7KDW LV VLPLODU WR ([WHQGHG 'DWD 2XW ('2 2SHUDWLRQ RI W&&' &/. FRQYHQWLRQDO '5$0
5DQGRP 0RGH
67 About Burst Length Control
%DVLF 0RGH )XOO 3DJH 6SHFLDO 0RGH 5DQGRP 0RGH %56: %XUVW 6WRS $W 056 $ YLRODWHG $W 056 $ YLRODWHG $W 056 $ $W DXWR SUHFKDUJH W5$6 VKRXOG QRW EH $W DXWR SUHFKDUJH W5$6 VKRXOG QRW EH
$W 056 $ $W 056 $ :UDS DURXQG PRGH LQILQLWH EXUVW OHQJWK VKRXOG EH VWRSSHG E\ EXUVW VWRS 5$6 LQWHUUXSW RU &$6 LQWHUUXSW $W 056 $ 5HDG EXUVW IXOO SDJH ZULWH %XUVW $W DXWR SUHFKDUJH RI ZULWH W5$6 VKRXOG QRW EH YLRODWHG W%'/ 9DOLG '4 DIWHU EXUVW VWRS LV IRU &$6 ODWHQF\ UHVSHFWLYHO\ 8VLQJ EXUVW VWRS FRPPDQG DQ\ EXUVW OHQJWK FRQWURO LV SRVVLEOH %HIRUH WKH HQG RI EXUVW 5RZ SUHFKDUJH FRPPDQG RI WKH VDPH EDQN VWRSV UHDGZULWH EXUVW ZLWK 5RZ SUHFKDUJH W5'/ ZLWK '40 YDOLG '4 DIWHU EXUVW VWRS LV IRU &$6 ODWHQF\ UHVSHFWLYHO\ 'XULQJ UHDGZULWH EXUVW ZLWK DXWR SUHFKDUJH 5$6 LQWHUUXSW FDQ QRW EH LVVXHG %HIRUH WKH HQG RI EXUVW QHZ UHDGZULWH VWRSV UHDGZULWH EXUVW DQG VWDUWV QHZ UHDGZULWH EXUVW 'XULQJ UHDGZULWH EXUVW ZLWK DXWR SUHFKDUJH &$6 LQWHUUXSW FDQ QRW EH LVVXHG
,QWHUUXSW 0RGH
5$6 ,QWHUUXSW ,QWHUUXSWHG E\ 3UHFKDUJH
&$6
,QWHUUXSW
182
S73WS256N Based MCPs
SDRAM_00_A0 May 25, 2004
Preliminary
68 Function Truth Table (1)
Current State CS# RAS# + / / ,GOH / / / / / + / / 5RZ $FWLYH / / / / / + / / 5HDG / / / / / + / / :ULWH / / / / / + / 5HDG ZLWK $XWR 3UHFKDUJH / / / / + / :ULWH ZLWK $XWR 3UHFKDUJH / / / / + / 3UHFKDUJLQJ / / / / ; + + + / / / / ; + + + / / / / ; + + + + / / / ; + + + + / / / ; + + + / / ; + + + / / ; + + + / / CAS# ; + + / + + / / ; + + / / + + / ; + + / / + + / ; + + / / + + / ; + + / + / ; + + / + / ; + + / + + WE# ; + / ; + / + / ; + / + / + / ; ; + / + / + / ; ; + / + / + / ; ; + / ; ; ; ; + / ; ; ; ; + / ; + / BA ; ; ; %$ %$ %$ ; 23 FRGH ; ; ; %$ %$ %$ %$ ; ; ; ; %$ %$ %$ %$ ; ; ; ; %$ %$ %$ %$ ; ; ; ; %$ %$ ; ; ; ; %$ %$ ; ; ; ; %$ %$ %$ Address ; ; ; &$ $$3 5$ $$3 ; 23 FRGH ; ; ; &$ $$3 &$ $$3 5$ $$3 ; ; ; ; &$ $$3 &$ $$3 5$ $$3 ; ; ; ; &$ $$3 &$ $$3 5$ $$3 ; ; ; ; &$ $$3 5$ 5$ ; ; ; ; &$ $$3 5$ 5$ ; ; ; ; &$ 5$ $$3 123 123 ,//(*$/ ,//(*$/ 5RZ 123 $XWR 5HIUHVK RU 6HOI 5HIUHVK 0RGH 5HJLVWHU $FFHVV 123 123 ,//(*$/ %HJLQ 5HDG ODWFK &$ GHWHUPLQH $3 %HJLQ 5HDG ODWFK &$ GHWHUPLQH $3 ,//(*$/ 3UHFKDUJH ,//(*$/ 123 &RQWLQXH %XUVW WR (QG ! 5RZ $FWLYH 123 &RQWLQXH %XUVW WR (QG ! 5RZ $FWLYH 7HUP EXUVW ! 5RZ DFWLYH 7HUP EXUVW 1HZ 5HDG 'HWHUPLQH $3 7HUP EXUVW 1HZ :ULWH 'HWHUPLQH $3 ,//(*$/ 7HUP EXUVW 3UHFKDUJH WLPLQJ IRU 5HDGV ,//(*$/ 123 &RQWLQXH %XUVW WR (QG ! 5RZ $FWLYH 123 &RQWLQXH %XUVW WR (QG ! 5RZ $FWLYH 7HUP EXUVW ! 5RZ DFWLYH 7HUP EXUVW 1HZ 5HDG 'HWHUPLQH $3 7HUP EXUVW 1HZ :ULWH 'HWHUPLQH $3 ,//(*$/ 7HUP EXUVW 3UHFKDUJH WLPLQJ IRU 5HDGV ,//(*$/ 123 &RQWLQXH %XUVW WR (QG ! 3UHFKDUJH 123 &RQWLQXH %XUVW WR (QG ! 3UHFKDUJH ,//(*$/ ,//(*$/ ,//(*$/ ,//(*$/ 123 &RQWLQXH %XUVW WR (QG ! 3UHFKDUJH 123 &RQWLQXH %XUVW WR (QG ! 3UHFKDUJH ,//(*$/ ,//(*$/ ,//(*$/ %DQN $FWLYH /DWFK 5$ Action Note
,//(*$/
123 ! ,GOH DIWHU W53 123 ! ,GOH DIWHU W53 ,//(*$/ ,//(*$/ ,//(*$/ 123 ! ,GOH DIWHU W53
May 25, 2004 SDRAM_00_A0
S73WS256N Based MCPs
183
Preliminaryn
Current State
CS# RAS# / + / / / / / / + / / ; + + + / / / ; + + / / ; + + + /
CAS# / ; + + / + + / ; + / + / ; + + / ;
WE# ; ; + / ; + / ; ; ; ; ; ; ; + / ; ;
BA ; ; ; ; %$ %$ %$ ; ; ; ; ; ; ; ; ; ; ;
Address ; ; ; ; &$ 5$ $$3 ; ; ; ; ; ; ; ; ; ; ; ,//(*$/
Action 123 ! 5RZ $FWLYH DIWHU W5&' 123 ! 5RZ $FWLYH DIWHU W5&' ,//(*$/ ,//(*$/ ,//(*$/ ,//(*$/ ,//(*$/ 123 ! ,GOH DIWHU W5& 123 ! ,GOH DIWHU W5& ,//(*$/ ,//(*$/ ,//(*$/ 123 ! ,GOH DIWHU FORFNV 123 ! ,GOH DIWHU FORFNV ,//(*$/ ,//(*$/ ,//(*$/
Note
5RZ $FWLYDWLQJ

5HIUHVKLQJ
/ / / + / / / /
0RGH 5HJLVWHU 5HIUHVKLQJ
/HJHQG 5$ 5RZ $GGUHVV %$ GUHVV $3 $XWR 3UHFKDUJH
%DQN $GGUHVV 123
1R 2SHUDWLRQ &RPPDQG &$
&ROXPQ $G
1RWHV $OO HQWULHV DVVXPH WKH &.( ZDV DFWLYH +LJK GXULQJ WKH SUHFKDUJH FORFN DQG WKH FXUUHQW FORFN F\FOH ,OOHJDO WR EDQN LQ VSHFLILHG VWDWH )XQFWLRQ PD\ EH OHJDO LQ WKH EDQN LQGLFDWHG E\ %$ GHSHQGLQJ RQ WKH VWDWH RI WKDW EDQN 0XVW VDWLVI\ EXV FRQWHQWLRQ EXV WXUQ DURXQG DQGRU ZULWH UHFRYHU\ UHTXLUHPHQWV 123 WR EDQN SUHFKDUJLQJ RU LQ LGOH VWDWH 0D\ SUHFKDUJH EDQN LQGLFDWHG E\ %$ DQG $$3 ,OOHJDO LI DQ\ EDQN LV QRW LGOH
184
S73WS256N Based MCPs
SDRAM_00_A0 May 25, 2004
Preliminary
69 Function Truth Table (2)
Current State CKE (n-1) + / 6HOI 5HIUHVK / / / / / + / $OO %DQNV 3UHFKDUJH 3RZHU 'RZQ / / / / / + + + + $OO %DQNV ,GOH + + + + / + $Q\ 6WDWH RWKHU WKDQ /LVWHG DERYH + / / CKE n CS# ; + + + + + / ; + + + + + / + / / / / / / / / + / + / ; + / / / / ; ; + / / / / ; ; + / / / / / / ; ; ; ; ; RAS# ; ; + + + / ; ; ; + + + / ; ; ; + + + / / / ; ; ; ; ; CAS# ; ; + + / ; ; ; ; + + / ; ; ; ; + + / + / / ; ; ; ; ; WE# ; ; + / ; ; ; ; ; + / ; ; ; ; ; + / ; + + / ; ; ; ; ; Address ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; 5$ ; ; ; ; ; ; Action ([LW 6HOI 5HIUHVK ! ,GOH DIWHU WV5);$%, ([LW 6HOI 5HIUHVK ! ,GOH DIWHU WV5); $%, ([LW 6HOI 5HIUHVK ! ,GOH DIWHU WV5); $%, ,//(*$/ ,//(*$/ ,//(*$/ 123 0DLQWDLQ 6HOI 5HIUHVK ,19$/,' ([LW 3RZHU 'RZQ ! $%, ([LW 3RZHU 'RZQ ! $%, ,//(*$/ ,//(*$/ ,//(*$/ 123 0DLQWDLQ /RZ 3RZHU 0RGH 5HIHU WR WKH)XQFWLRQ 7UXWK 7DEOH (QWHU 3RZHU 'RZQ (QWHU 3RZHU 'RZQ ,//(*$/ ,//(*$/ 5RZ %DQN $FWLYH (QWHU 6HOI 5HIUHVK 123 5HIHU WR 2SHUDWLRQV LQ )XQFWLRQ 7UXWK 7DEOH %HJLQ &ORFN 6XVSHQG QH[W F\FOH ([LW &ORFN 6XVSHQG QH[W F\FOH 0DLQWDLQ &ORFN 6XVSHQG Note
23 &RGH 0RGH 5HJLVWHU $FFHVV
/HJHQG $%,
$OO %DQNV ,GOH 5$
5RZ $GGUHVV
1RWHV &.( ORZ WR KLJK WUDQVLWLRQ LV DV\QFKURQRXV &.( ORZ WR KLJK WUDQVLWLRQ LV DV\QFKURQRXV LI UHVWDUWV LQWHUQDO FORFN $ PLQLPXP VHWXS WLPH &/. W66 PXVW EH VDWLVILHG EHIRUH DQ\ FRPPDQG RWKHU WKDQ H[LW 3RZHU GRZQ DQG VHOI UHIUHVK FDQ EH HQWHUHG RQO\ IURP WKH DOO EDQNV LGOH VWDWH 0XVW EH D OHJDO FRPPDQG
May 25, 2004 SDRAM_00_A0
S73WS256N Based MCPs
185
Preliminaryn
70 AC Characteristics
0
CLOCK
1
2
3
4
5
6
7
8
9
10 11
12
13 14 15
16
17 18
19
20
21 22
23 24
25
CKE
Hi
CS#
RAS#
CAS#
ADDR
Key
Key
RAa
BA0
BA1
A10/AP
RAa
DQ
Hi-Z
Hi-Z
WE#
DQM
High level is necessary tRP
Precharge (All Bank) Auto Refresh
tARFC
Auto Refresh
tARFC
Normal MRS Extended MRS Row Active (A-Bank)
: Don't care
Figure 70.1
Power Up Sequence for Mobile SDRAM
1RWHV $SSO\ SRZHU DQG DWWHPSW WR PDLQWDLQ &.( DW D KLJK VWDWH DQG DOO RWKHU LQSXWV PD\ EH XQGHILQHG $SSO\ 9'' EHIRUH RU DW WKH VDPH WLPH DV 9''4 0DLQWDLQ VWDEOH SRZHU VWDEOH FORFN DQG 123 LQSXW FRQGLWLRQ IRU D PLQLPXP RI V ,VVXH SUHFKDUJH FRPPDQGV IRU DOO EDQNV RI WKH GHYLFHV ,VVXH RU PRUH DXWRUHIUHVK FRPPDQGV ,VVXH D PRGH UHJLVWHU VHW FRPPDQG WR LQLWLDOL]H WKH PRGH UHJLVWHU ,VVXH D H[WHQGHG PRGH UHJLVWHU VHW FRPPDQG WR GHILQH '6 RU 3$65 RSHUDWLQJ W\SH RI WKH GHYLFH DIWHU QRUPDO 056 (056 F\FOH LV QRW PDQGDWRU\ DQG WKH (056 FRPPDQG QHHGV WR EH LVVXHG RQO\ ZKHQ '6 RU 3$65 LV XVHG7KH GHIDXOW VWDWH ZLWKRXW (056 FRPPDQG LVVXHG LV KDOI GULYHU VWUHQJWK DOO EDQNV UHIUHVKHG 7KH GHYLFH LV QRZ UHDG\ IRU WKH RSHUDWLRQ VHOHFWHG E\ (056 )RU RSHUDWLQJ ZLWK '6 RU 3$65 VHW '6 RU 3$65 PRGH LQ (056 VHWWLQJ VWDJH ,Q RUGHU WR DGMXVW DQRWKHU PRGH LQ WKH VWDWH RI '6 RU 3$65 PRGH DGGLWLRQDO (056 VHW LV UHTXLUHG EXW SRZHU XS VHTXHQFH LV QRW
186
S73WS256N Based MCPs
SDRAM_00_A0 May 25, 2004
Preliminary
QHHGHG DJDLQ DW WKLV WLPH ,Q WKDW FDVH DOO EDQNV KDYH WR EH LQ LGOH VWDWH SULRU WR DGMXVWLQJ (056 VHW
0
CLOCK
1
2
3
tCH 4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
tCC
CKE
*Note 1
tCL tRAS tRC HIGH tSH tRP
CS#
tRCD tSH
RAS#
tSS
tSS
CAS#
tSH tSH tSS
Ca
*Note 2,3
ADDR
Ra
Cb
*Note 2,3
Cc
*Note 2,3 *Note 4
Rb
*Note 2
tSS
*Note 2
BA0,BA1
BS
BS
*Note 3
BS
*Note 3
BS
*Note 3
BS
*Note 4
BS
A10/AP
Ra
Rb
tSAC
DQ Qa
tSH
Db Qc
tSLZ
WE#
tOH
tSS tSS tSH
tSS tSH
DQM
Row Active
Read
Write
Read Precharge
Row Active
: Don't care
Figure 70.2 Single Bit Read-Write-Read Cycle (Same Page) @CAS Latency=3, Burst Length=1
1RWHV $OO LQSXW H[FHSW &.( '40 FDQ EH GRQ
W FDUH ZKHQ &6 LV KLJK DW WKH &/. KLJK JRLQJ HGJH
%DQN DFWLYH DQG UHDGZULWH DUH FRQWUROOHG E\ %$ %$
May 25, 2004 SDRAM_00_A0
S73WS256N Based MCPs
187
Preliminaryn
0
CLOCK
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
CKE
HIGH tRC
*Note 1
CS#
RAS#
*Note 2
CAS#
ADDR
Ra
Ca
Rb
Cb
BA0
BA1
A10/AP
Ra
Rb
DQ
{
tOH
Qa0 Qa1 Qa2 Qa3 Db0 Db1 Db2 Db3
CL=2
tRCD
tSAC tOH
Qa0 Qa1 Qa2
tSHZ
Qa3
*Note 4
tRDL
CL=3
Db0
Db1
Db2
Db3
tSAC
WE#
tSHZ
*Note 4
tRDL
DQM
Row Active (A-Bank)
Read (A-Bank)
Precharge (A-Bank)
Row Active (A-Bank)
Write (A-Bank)
Precharge (A-Bank)
: Don't care
Figure 70.3 Read & Write Cycle at Same Bank @Burst Length=4, tRDL=2CLK
1RWHV 0LQLPXP URZ F\FOH WLPHV LV UHTXLUHG WR FRPSOHWH LQWHUQDO '5$0 RSHUDWLRQ 5RZ SUHFKDUJH FDQ LQWHUUXSW EXUVW RQ DQ\ F\FOH >&$6 /DWHQF\ @ QXPEHU RI YDOLG RXWSXW GDWD LV DYDLODEOH DIWHU 5RZ SUHFKDUJH /DVW YDOLG RXWSXW ZLOO EH +L=W6+= DIWHU WKH FORFN 2XWSXW ZLOO EH +L= DIWHU WKH HQG RI EXUVW )XOO SDJH ELW EXUVW
188
S73WS256N Based MCPs
SDRAM_00_A0 May 25, 2004
Preliminary
0
CLOCK
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
CKE
HIGH
CS#
RAS#
*Note 2
CAS#
ADDR
Ra
Ca
Cb
Cc
Cd
Rb
BA0
BA1
A10/AP
Ra
Rb
tRDL
DQ
{
CL=2
Qa0
Qa1
Qb0
Qb1
Qb2
Dc0
Dc1
Dd0
Dd1
tRCD
Qa0 Qa1 Qb0 Qb1 Dc0 Dc1 Dd0 Dd1
tDAL
*Note 4
CL=3
tCDL
WE#
*Note 1 *Note 3
DQM
Row Active (A-Bank)
Read (A-Bank)
Read (A-Bank)
Write (A-Bank)
Write (A-Bank)
Precharge (A-Bank)
Row Active (A-Bank)
: Don't care
Figure 70.4 Page Read & Write Cycle at Same Bank @Burst Length=4, tRDL=2CLK
1RWHV 7R ZULWH GDWD EHIRUH EXUVW UHDG HQGV '40 VKRXOG EH DVVHUWHG WKUHH F\FOH SULRU WR ZULWH FRPPDQG WR DYRLG EXV FRQWHQWLRQ 5RZ SUHFKDUJH ZLOO LQWHUUXSW ZULWLQJ /DVW GDWD LQSXW W5'/ EHIRUH 5RZ SUHFKDUJH ZLOO EH ZULWWHQ '40 VKRXOG PDVN LQYDOLG LQSXW GDWD RQ SUHFKDUJH FRPPDQG F\FOH ZKHQ DVVHUWLQJ SUHFKDUJH EHIRUH HQG RI EXUVW ,QSXW GDWD DIWHU 5RZ SUHFKDUJH F\FOH ZLOO EH PDVNHG LQWHUQDOO\ W'$/ ODVW GDWD LQ WR DFWLYH GHOD\ LV &/. W53
May 25, 2004 SDRAM_00_A0
S73WS256N Based MCPs
189
Preliminaryn
0
CLOCK
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
CKE
*Note 1
HIGH
CS#
RAS#
*Note 2
CAS#
ADDR
RAa
RBb
CAa
RCc
CBb
RDd
CCc
CDd
BA0
BA1
A10/AP
RAa
RBb
RCc
RDd
DQ
{
CL=2
QAa0 QAa1 QAa2 QBb0 QBb1 QBb2 QCc0 QCc1 QCc2 QDd0 QDd1 QDd2
CL=3
QAa0 QAa1 QAa2 QBb0 QBb1 QBb2 QCc0 QCc1 QCc2 QDd0 QDd1 QDd2
WE#
DQM
Row Active (A-Bank)
Read (A-Bank) Row Active (B-Bank)
Read (B-Bank) Row Active (C-Bank)
Read (C-Bank) Row Active (D-Bank)
Read (D-Bank) Precharge (C-Bank)
Precharge (D-Bank)
Precharge (A-Bank)
Precharge (B-Bank)
: Don't care
Figure 70.5 Page Read Cycle at Different Bank @Burst Length=4
1RWHV &6 FDQ EH GRQ
W FDUHG ZKHQ 5$6 &$6 DQG :( DUH KLJK DW WKH FORFN KLJK JRLQJ HGJH
7R LQWHUUXSW D EXUVW UHDG E\ URZ SUHFKDUJH ERWK WKH UHDG DQG WKH SUHFKDUJH EDQNV PXVW EH WKH VDPH
190
S73WS256N Based MCPs
SDRAM_00_A0 May 25, 2004
Preliminary
0
CLOCK
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
CKE
HIGH
CS#
RAS#
*Note 2
CAS#
ADDR
RAa
RAb
CAa
CBb
RCc
RDd
CCc
CDd
BA0
BA1
A10/AP
RAa
RBb
RCc
RDd
DQ
DAa0 DAa1 DAa2 DAa3 DBb0 DBb1 DBb2 DBb3 DCc0 DCc1 DDd0 DDd1 DDd2
tCDL
WE#
*Note 1
tRDL
DQM
Row Active (A-Bank)
Write (A-Bank) Row Active (B-Bank)
Write (B-Bank) Row Active (C-Bank)
Row Active (D-Bank) Write (C-Bank)
Write (D-Bank)
Precharge (All Banks)
: Don't care
Figure 70.6 Page Write Cycle at Different Bank @Burst Length=4, tRDL=2CLK
1RWHV 7R LQWHUUXSW EXUVW ZULWH E\ 5RZ SUHFKDUJH '40 VKRXOG EH DVVHUWHG WR PDVN LQYDOLG LQSXW GDWD 7R LQWHUUXSW EXUVW ZULWH E\ 5RZ SUHFKDUJH ERWK WKH ZULWH DQG WKH SUHFKDUJH EDQNV PXVW EH WKH VDPH
May 25, 2004 SDRAM_00_A0
S73WS256N Based MCPs
191
Preliminaryn
0
CLOCK
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
CKE
HIGH
CS#
RAS#
CAS#
ADDR
RAa
CAa
RDb
CDb
RBc
CBc
BA0
BA1
A10/AP
RAa
RDb
RBc
tCDL
DQ
{
*Note 1
CL=2
QAa0 QAa1 QAa2 QAa3
DDb0 DDb1 DDb2 DDb3
QBc0 QBc1 QBc2
CL=3
QAa0 QAa1 QAa2 QAa3
DDb0 DDb1 DDb2 DDb3
QBc0 QBc1
WE#
DQM
Row Active (A-Bank)
Read (A-Bank)
Precharge (A-Bank) Row Active (D-Bank)
Write (D-Bank) Row Active (B-Bank)
Read (B-Bank)
: Don't care
Figure 70.7 Read & Write Cycle at Different Bank @Burst Length=4
1RWHV W&'/ VKRXOG EH PHW WR FRPSOHWH ZULWH
192
S73WS256N Based MCPs
SDRAM_00_A0 May 25, 2004
Preliminary
0
CLOCK
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
CKE
HIGH
CS#
RAS#
CAS#
ADDR
RAa
RBb
CAa
CBb
RAc
CAc
BA0
BA1
A10/AP
RAa
RBb
RAc
DQ CL=2
QAa0 QAa1 QBb0 QBb1 QBb2 DBb3
DAc0 DAc1
CL=3
QAa0 QAa1 QBb0 QBb1 QBb2 DBb3
DAc0 DAc1
WE#
DQM
Row Active (A-Bank)
Read with Auto Pre charge (A-Bank) Row Active (B-Bank)
Read without Auto Precharge(B-Bank) Auto Precharge Start Point (A-Bank) *Note1
Precharge (B-Bank)
Row Active (A-Bank)
Write with Auto Precharge (A-Bank)
: Don't care
Figure 70.8 Read & Write Cycle with Auto Precharge 1 @Burst Length=4
1RWHV :KHQ 5HDG :ULWH FRPPDQG ZLWK DXWR SUHFKDUJH LV LVVXHG DW $%DQN DIWHU $ DQG % %DQN DFWLYDWLRQ LI 5HDG :ULWH FRPPDQG ZLWKRXW DXWR SUHFKDUJH LV LVVXHG DW %%DQN EHIRUH $%DQN DXWR SUHFKDUJH VWDUWV $%DQN DXWR SUHFKDUJH ZLOO VWDUW DW %%DQN UHDG FRPPDQG LQSXW SRLQW DQ\ FRPPDQG FDQ QRW EH LVVXHG DW $%DQN GXULQJ W53 DIWHU $%DQN DXWR SUHFKDUJH VWDUWV
May 25, 2004 SDRAM_00_A0
S73WS256N Based MCPs
193
Preliminaryn
0
CLOCK
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
CKE
HIGH
CS#
RAS#
CAS#
ADDR
Ra
Ca
Rb
Cb
BA0
BA1
A10/AP
Ra
Rb
DQ CL=2
Qa0
Qa1
Qa2
Qa3
Qb0
Qb1
Qb2
Qb3
CL=3
Qa0
Qa1
Qa2
Qa3
Qb0
Qb1
Qb2
Qb3
WE#
DQM
*Note1
Row Active (A-Bank)
Read with Auto Precharge (A-Bank)
Auto Precharge Start Point (A-Bank) Row Active (B-Bank)
Read with Auto Precharge (B-Bank)
Auto Precharge Start Point (B-Bank)
: Don't care
Figure 70.9 Read & Write Cycle with Auto Precharge 2 @Burst Length=4
1RWHV $Q\ FRPPDQG WR $EDQN LV QRW DOORZHG LQ WKLV SHULRG W53 LV GHWHUPLQHG IURP DW DXWR SUHFKDUJH VWDUW SRLQW
194
S73WS256N Based MCPs
SDRAM_00_A0 May 25, 2004
Preliminary
0
CLOCK
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
CKE
CS#
RAS#
CAS#
ADDR
Ra
Ca
Cb
Cc
BA0
BA1
A10/AP
Ra
DQ
Qa0
Qa1
Qa2
Qa3
Qb0
Qb1
Dc0
Dc2
tSHZ
WE#
tSHZ
*Note 1
DQM
Row Active
Read
Clock Suspension
Read
Read DQM
Write DQM Write Clock Suspension
Write DQM
: Don't care
Figure 70.10 Clock Suspension & DQM Operation Cycle @CAS Latency=2, Burst Length=4
1RWHV '40 LV QHHGHG WR SUHYHQW EXV FRQWHQWLRQ
May 25, 2004 SDRAM_00_A0
S73WS256N Based MCPs
195
Preliminaryn
0
CLOCK
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
CKE
HIGH
CS#
RAS#
CAS#
ADDR
RAa
CAa
CAb
BA0
BA1
A10/AP
RAa 1 1 QAb0 QAb1 QAb2 QAb3 QAb4 QAb5
DQ
{
CL=2
QAa0 QAa1 QAa2 QAa3 QAa4
2 CL=3 QAa0 QAa1 QAa2 QAa3 QAa4
2 QAb0 QAb1 QAb2 QAb3 QAb4 QAb5
WE#
DQM
Row Active (A-Bank)
Read (A-Bank)
Burst Stop
Read (A-Bank)
Precharge (A-Bank)
: Don't care
Figure 70.11 Read Interrupted by Precharge Command & Read Burst Stop Cycle @Full Page Burst
1RWHV $W IXOO SDJH PRGH EXUVW LV ILQLVKHG E\ EXUVW VWRS RU SUHFKDUJH $ERXW WKH YDOLG '4V DIWHU EXUVW VWRS LW LV VDPH DV WKH FDVH RI 5$6 LQWHUUXSW %RWK FDVHV DUH LOOXVWUDWHG DERYH WLPLQJ GLDJUDP 6HH WKH ODEHO RQ WKHP %XW DW EXUVW ZULWH %XUVW VWRS DQG 5$6 LQWHUUXSW VKRXOG EH FRPSDUHG FDUHIXOO\ 5HIHU WKH WLPLQJ GLDJUDP RI )XOO SDJH ZULWH EXUVW VWRS F\FOH %XUVW VWRS LV YDOLG DW HYHU\ EXUVW OHQJWK
196
S73WS256N Based MCPs
SDRAM_00_A0 May 25, 2004
Preliminary
0
CLOCK
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
CKE
HIGH
CS#
RAS#
CAS#
ADDR
RAa
CAa
CAb
BA0
BA1
A10/AP
RAa
*Note 1
tBDL
*Note 1,2
tRDL
DQ
DAa0 DAa1 DAa2 DAa3 DAa4
DAb0 DAb1 DAb2 DAb3 DAb4 DAb5
WE#
DQM
Row Active (A-Bank)
Write (A-Bank)
Burst Stop
Write (A-Bank)
Precharge (A-Bank)
: Don't care
Figure 70.12 Write Interrupted by Precharge Command & Write Burst Stop Cycle @ Full Page Burst, tRDL=2CLK
1RWHV $W IXOO SDJH PRGH EXUVW LV ILQLVKHG E\ EXUVW VWRS RU SUHFKDUJH 'DWDLQ DW WKH F\FOH RI LQWHUUXSWHG E\ SUHFKDUJH FDQ QRW EH ZULWWHQ LQWR WKH FRUUHVSRQGLQJ PHPRU\ FHOO ,W LV GHILQHG E\ $& SDUDPHWHU RI W5'/ '40 DW ZULWH LQWHUUXSWHG E\ SUHFKDUJH FRPPDQG LV QHHGHG WR SUHYHQW LQYDOLG ZULWH '40 VKRXOG PDVN LQYDOLG LQSXW GDWD RQ SUHFKDUJH FRPPDQG F\FOH ZKHQ DVVHUWLQJ SUHFKDUJH EHIRUH HQG RI EXUVW ,QSXW GDWD DIWHU 5RZ SUHFKDUJH F\FOH ZLOO EH PDVNHG LQWHUQDOO\ %XUVW VWRS LV YDOLG DW HYHU\ EXUVW OHQJWK
May 25, 2004 SDRAM_00_A0
S73WS256N Based MCPs
197
Preliminaryn
0
CLOCK
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
CKE
HIGH
CS#
RAS#
*Note 2
CAS#
ADDR
RAa
CAa
RBb
CAb
RCc
CBc
CCd
BA0
BA1
A10/AP
RAa
RBb
RCc
DQ
{
CL=2
DAa0
QAb0 QAb1
DBc0
QCd0 QCd1
CL=3
DAa0
QAb0 QAb1
DBc0
QCd0 QCd1
WE#
DQM
Row Active (A-Bank)
Row Active (B-Bank) Write Read with (A-Bank) Auto Precharge (A-Bank)
Row Active (C-Bank) Write with Auto Precharge (B-Bank)
Read (C-Bank)
Precharge (C-Bank)
: Don't care
Figure 70.13 Burst Read Single bit Write Cycle @Burst Length=2
1RWHV %56: PRGHV LV HQDEOHG E\ VHWWLQJ $ +LJK DW 056 0RGH 5HJLVWHU 6HW $W WKH %56: 0RGH WKH EXUVW OHQJWK DW ZULWH LV IL[HG WR UHJDUGOHVV RI SURJUDPPHG EXUVW OHQJWK :KHQ %56: ZULWH FRPPDQG ZLWK DXWR SUHFKDUJH LV H[HFXWHG NHHS LW LQ PLQG WKDW W5$6 VKRXOG QRW EH YLRODWHG $XWR SUHFKDUJH LV H[HFXWHG DW WKH EXUVWHQG F\FOH VR LQ WKH FDVH RI %56: ZULWH FRPPDQG WKH QH[W F\FOH VWDUWV WKH SUHFKDUJH
198
S73WS256N Based MCPs
SDRAM_00_A0 May 25, 2004
Preliminary
0
CLOCK
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
tSS
CKE
*Note 1 *Note 3 *Note 2
tSS
tSS
*Note 2
CS#
RAS#
CAS#
ADDR
Ra
Ca
BA
A10/AP
Ra
DQ
Qa0
Qa1
Qa2
tSHZ
WE#
DQM
Precharge Power-down Entry
Row Active
Read
Precharge
Precharge Power-down Exit
Active Power-down Entry
Active Power-down Exit
: Don't care
Figure 70.14 Active/Precharge Power Down Mode @CAS Latency=2, Burst Length=4
1RWHV $OO EDQNV VKRXOG EH LQ LGOH VWDWH SULRU WR HQWHULQJ SUHFKDUJH SRZHU GRZQ PRGH &.( VKRXOG EH VHW KLJK DW OHDVW &/. W66 SULRU WR 5RZ DFWLYH FRPPDQG &DQ QRW YLRODWH PLQLPXP UHIUHVK VSHFLILFDWLRQ PV
May 25, 2004 SDRAM_00_A0
S73WS256N Based MCPs
199
Preliminaryn
0
CLOCK
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
*Note 2 *Note 1
*Note 4 *Note 3
tSRFX
*Note 6
CKE
tSS
CS#
RAS#
CAS#
ADDR
BA0,BA1
A10/AP
DQ
Hi-Z
Hi-Z
WE#
DQM
Self Refresh Entry
Self Refresh Exit
Auto Refresh
: Don't care
Figure 70.15 Self Refresh Entry & Exit Cycle
1RWHV 72 (17(5 6(/) 5()5(6+ 02'( &6 5$6 &$6 ZLWK &.( VKRXOG EH ORZ DW WKH VDPH FORFN F\FOH $IWHU FORFN F\FOH DOO WKH LQSXWV LQFOXGLQJ WKH V\VWHP FORFN FDQ EH GRQ
W FDUH H[FHSW IRU &.( 7KH GHYLFH UHPDLQV LQ VHOI UHIUHVK PRGH DV ORQJ DV &.( VWD\V /RZ 2QFH WKH GHYLFH HQWHUV VHOI UHIUHVK PRGH PLQLPXP W5$6 LV UHTXLUHG EHIRUH H[LW IURP VHOI UHIUHVK 72 (;,7 6(/) 5()5(6+ 02'( 6\VWHP FORFN UHVWDUW DQG EH VWDEOH EHIRUH UHWXUQLQJ &.( KLJK &6 VWDUWV IURP KLJK 0LQLPXP W65); LV UHTXLUHG DIWHU &.( JRLQJ KLJK WR FRPSOHWH VHOI UHIUHVK H[LW . F\FOH RI EXUVW DXWR UHIUHVK LV UHTXLUHG EHIRUH VHOI UHIUHVK HQWU\ DQG DIWHU VHOI UHIUHVK H[LW LI WKH V\VWHP XVHV EXUVW UHIUHVK
200
S73WS256N Based MCPs
SDRAM_00_A0 May 25, 2004
Preliminary
0
CLOCK
1
2
3
4
5
6
0
1
2
3
4
5
6
7
8
9
10
CKE
HIGH
HIGH
CS
*Note 2
tARFC
RAS
*Note 1
CAS
*Note 3
ADDR
Key
Ra
BA0
BA1
DQ
Hi-Z
Hi-Z
WE
DQM
MRS
New Command
Auto Refresh
New Command
: Don't care
Figure 70.16 Mode Register Set Cycle and Auto Refresh Cycle
1RWH $OO EDQNV SUHFKDUJH VKRXOG EH FRPSOHWHG EHIRUH 0RGH 5HJLVWHU 6HW F\FOH DQG DXWR UHIUHVK F\FOH 1RWHV &6 5$6 &$6 %$ %$ LQWHUQDO PRGH UHJLVWHU :( DFWLYDWLRQ DW WKH VDPH FORFN F\FOH ZLWK DGGUHVV NH\ ZLOO VHW
0LQLPXP FORFN F\FOHV VKRXOG EH PHW EHIRUH QHZ 5$6 DFWLYDWLRQ 3OHDVH UHIHU WR WKH 0RGH 5HJLVWHU )LHOG 7DEOH WR 3URJUDP 0RGHV
May 25, 2004 SDRAM_00_A0
S73WS256N Based MCPs
201
Preliminaryn
0
CLOCK
1
2
3
4
5
6
CKE
HIGH
CS#
*Note 2
RAS#
*Note 1
CAS#
*Note 3
ADDR
Key
Ra
BA0
BA1
DQ
Hi-Z
WE#
DQM
EMRS
New Command
: Don't care
Figure 70.17 Extended Mode Register Set Cycle
1RWHV &6 5$6 &$6 %$ %$ LQWHUQDO PRGH UHJLVWHU :( DFWLYDWLRQ DW WKH VDPH FORFN F\FOH ZLWK DGGUHVV NH\ ZLOO VHW
0LQLPXP FORFN F\FOHV VKRXOG EH PHW EHIRUH QHZ 5$6 DFWLYDWLRQ 3OHDVH UHIHU WR WKH 0RGH 5HJLVWHU )LHOG 7DEOH WR 3URJUDP 0RGHV
202
S73WS256N Based MCPs
SDRAM_00_A0 May 25, 2004
Preliminary
71 SDRAM Type 2 Revision Summary
Revision A0 (May 25, 2004)
,QLWLDO 5HOHDVH
May 25, 2004 SDRAM_00_A0
S73WS256N Based MCPs
203
Mobile SDRAM Type 2
256Mbit (16M x 16 bit) SDRAM
PRELIMINARY
Features
9 SRZHU VXSSO\ /9&026 FRPSDWLEOH ZLWK PXOWLSOH[HG DGGUHVV )RXU EDQNV RSHUDWLRQ 056 F\FOH ZLWK DGGUHVV NH\ SURJUDPV &$6 ODWHQF\ %XUVW OHQJWK )XOO SDJH %XUVW W\SH 6HTXHQWLDO ,QWHUOHDYH (056 F\FOH ZLWK DGGUHVV NH\ SURJUDPV $OO LQSXWV DUH VDPSOHG DW WKH SRVLWLYH JRLQJ HGJH RI WKH V\VWHP FORFN %XUVW UHDG VLQJOHELW ZULWH RSHUDWLRQ 6SHFLDO )XQFWLRQ 6XSSRUW 3$65 3DUWLDO $UUD\ 6HOI 5HIUHVK ,QWHUQDO 7&65 7HPSHUDWXUH &RPSHQVDWHG 6HOI 5HIUHVK '6 'ULYHU 6WUHQJWK '40 IRU PDVNLQJ $XWR UHIUHVK PV UHIUHVK SHULRG . F\FOH &RPPHUFLDO 7HPSHUDWXUH 2SHUDWLRQ & & ([WHQGHG 7HPSHUDWXUH 2SHUDWLRQ & &

General Description
7KH 0RELOH 6'5$0 7\SH LV ELWV V\QFKURQRXV KLJK GDWD UDWH '\QDPLF 5$0 RUJDQL]HG DV [ ZRUGV E\ ELWV IDEULFDWHG ZLWK &026 WHFKQRORJ\ 6\QFKURQRXV GHVLJQ DOORZV SUHFLVH F\FOH FRQWURO ZLWK WKH XVH RI V\V WHP FORFN DQG ,2 WUDQVDFWLRQV DUH SRVVLEOH RQ HYHU\ FORFN F\FOH 5DQJH RI RSHUDWLQJ IUHTXHQFLHV SURJUDPPDEOH EXUVW OHQJWKV DQG SURJUDPPDEOH ODWHQFLHV DOORZ WKH VDPH GHYLFH WR EH XVHIXO IRU D YDULHW\ RI KLJK EDQGZLGWK DQG KLJK SHUIRU PDQFH PHPRU\ V\VWHP DSSOLFDWLRQV
Publication Number SDRAM_04
Revision A
Amendment 0
Issue Date May 12, 2005
7KLV GRFXPHQW VWDWHV WKH FXUUHQW WHFKQLFDO VSHFLILFDWLRQV UHJDUGLQJ WKH 6SDQVLRQ SURGXFWV GHVFULEHG KHUHLQ 7KH 3UHOLPLQDU\ VWDWXV RI WKLV GRFXPHQW LQGLFDWHV WKDW SURGXFW TXDOLILFDWLRQ KDV EHHQ FRPSOHWHG DQG WKDW LQLWLDO SURGXFWLRQ KDV EHJXQ 'XH WR WKH SKDVHV RI WKH PDQXIDFWXULQJ SURFHVV WKDW UHTXLUH PDLQWDLQLQJ HIILFLHQF\ DQG TXDOLW\ WKLV GRFXPHQW PD\ EH UHYLVHG E\ VXEVHTXHQW YHUVLRQV RU PRGLILFDWLRQV GXH WR FKDQJHV LQ WHFKQLFDO VSHFLILFDWLRQV
Preliminary
72 Address Table
16M x 16
&RQILJXUDWLRQ 5HIUHVK &RXQW 5RZ $GGUHVVLQJ %DQN $GGUHVVLQJ &ROXPQ $GGUHVVLQJ
0 [ [ EDQNV . . $$ %$ %$ $$
73 Functional Block Diagram
I/O Control
LWE
Data Input Register Bank Select
LDQM
4M x 16 Sense AMP 4M x 16 4M x 16 4M x 16
Refresh Counter
Output Buffer
Row Decoder
Row Buffer
DQi
Address Register LRAS CLK CKE
CLK ADD
Column Decoder Col. Buffer
LRAS
LCBR
Latency & Burst Length
LCKE LCBR LWE LCAS
Programming Register LWCBR LDQM
Timing Register CS RAS CAS WE L(U)DQM
May 12, 2005 SDRAM_04_A0
S73WS256N Based MCPs
205
Preliminary
74 Absolute Maximum Ratings
Parameter 9ROWDJH RQ DQ\ SLQ UHODWLYH WR 966 9ROWDJH RQ 9'' VXSSO\ UHODWLYH WR 966 6WRUDJH WHPSHUDWXUH 3RZHU GLVVLSDWLRQ 6KRUW FLUFXLW FXUUHQW Symbol 9,1 9287 9'' 9''4 767* 3' ,26 Value a a a Unit 9 9 & : P$
1RWHV 3HUPDQHQW GHYLFH GDPDJH PD\ RFFXU LI $EVROXWH 0D[LPXP 5DWLQJV DUH H[FHHGHG )XQFWLRQDO RSHUDWLRQ VKRXOG EH UHVWULFWHG WR UHFRPPHQGHG RSHUDWLQJ FRQGLWLRQ ([SRVXUH WR KLJKHU WKDQ UHFRPPHQGHG YROWDJH IRU H[WHQGHG SHULRGV RI WLPH FRXOG DIIHFW GHYLFH UHOLDELOLW\
206
S73WS256N Based MCPs
SDRAM_04_A0 May 12, 2005
Preliminary
75 DC Operating Conditions
5HFRPPHQGHG RSHUDWLQJ FRQGLWLRQV 9ROWDJH UHIHUHQFHG WR 966 ([WHQGHG & WR & IRU &RPPHUFLDO
Parameter 6XSSO\ YROWDJH ,QSXW ORJLF KLJK YROWDJH ,QSXW ORJLF ORZ YROWDJH 2XWSXW ORJLF KLJK YROWDJH 2XWSXW ORJLF ORZ YROWDJH ,QSXW OHDNDJH FXUUHQW Symbol Min [ 9''4 9''4 Typ
9 7$
& WR & IRU
Max 9''4
Unit 9 9 9 9 9 9 $ ,2+ ,2/
Note
9'' 9''4 9,+ 9,/ 92+ 92/ ,/,
P$ P$
1RWHV 9,+ PD[ 9,/ PLQ
9 $&7KH RYHUVKRRW YROWDJH GXUDWLRQ LV QV 9 $& 7KH XQGHUVKRRW YROWDJH GXUDWLRQ LV QV
$Q\ LQSXW 9 9,1 9''4 ,QSXW OHDNDJH FXUUHQWV LQFOXGH +L= RXWSXW OHDNDJH IRU DOO ELGLUHFWLRQDO EXIIHUV ZLWK WULVWDWH RXWSXWV '287 LV GLVDEOHG 9 9287 9''4
76 Capacitance
9'' 9 7$
Pin &ORFN 5$6 &$6 :( &6 &.( '40 $GGUHVV '4 '4
& I
0+] 95()
Symbol &&/. &,1 &$'' &287
9 P9
Min Max Unit S) S) S) S) Note
May 12, 2005 SDRAM_04_A0
S73WS256N Based MCPs
207
Preliminary
77 DC Characteristics
5HFRPPHQGHG RSHUDWLQJ FRQGLWLRQV 9ROWDJH UHIHUHQFHG WR 966 ([WHQGHG & WR & IRU &RPPHUFLDO
Parameter 2SHUDWLQJ &XUUHQW 2QH %DQN $FWLYH 3UHFKDUJH 6WDQGE\ &XUUHQW LQ SRZHUGRZQ PRGH 3UHFKDUJH 6WDQGE\ &XUUHQW LQ QRQ SRZHUGRZQ PRGH $FWLYH 6WDQGE\ &XUUHQW LQ SRZHUGRZQ PRGH $FWLYH 6WDQGE\ &XUUHQW LQ QRQ SRZHUGRZQ PRGH 2QH %DQN $FWLYH Symbol ,&& ,&&3 ,&&36 ,&&1 ,&&16 ,&&3 ,&&36 ,&&1 ,&&16 ,&& ,&& W5& W5&PLQ ,2 P$ &.( Test Condition
9 7$
& WR & IRU
Value
Unit P$ P$
Note
%XUVW OHQJWK
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&/. 9,/PD[ W&&
&.( 9,+PLQ &6 9,+PLQ W&& QV ,QSXW VLJQDOV DUH FKDQJHG RQH WLPH GXULQJ QV &.( 9,+PLQ &/. 9,/PD[ W&& ,QSXW VLJQDOV DUH VWDEOH &.( 9,/PD[ W&& &.( QV &/. 9,/PD[ W&&
P$ P$ P$ P$ P$ P$ & $
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78 AC Operating Test Conditions
9'' 9 WR 9 7$ & WR & IRU ([WHQGHG & WR & IRU &RPPHUFLDO
Value [ 9''4 [ 9''4 WUWI [ 9''4 6HH )LJXUH Unit 9 9 QV 9 Parameter $& LQSXW OHYHOV 9,+9,/ ,QSXW WLPLQJ PHDVXUHPHQW UHIHUHQFH OHYHO ,QSXW ULVH DQG IDOO WLPH 2XWSXW WLPLQJ PHDVXUHPHQW UHIHUHQFH OHYHO 2XWSXW ORDG FRQGLWLRQ
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Figure 78.1 DC Output Load Circuit 208 S73WS256N Based MCPs SDRAM_04_A0 May 12, 2005
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Figure 78.2 AC Output Load Circuit
79 Operating AC Parameters
$& RSHUDWLQJ FRQGLWLRQV XQOHVV RWKHUZLVH QRWHG
Parameter 5RZ DFWLYH WR URZ DFWLYH GHOD\ 5$6 WR &$6 GHOD\ 5RZ SUHFKDUJH WLPH 5RZ DFWLYH WLPH 5RZ F\FOH WLPH /DVW GDWD LQ WR URZ SUHFKDUJH /DVW GDWD LQ WR $FWLYH GHOD\ /DVW GDWD LQ WR QHZ FRO DGGUHVV GHOD\ /DVW GDWD LQ WR EXUVW VWRS $XWR UHIUHVK F\FOH WLPH ([LW VHOI UHIUHVK WR DFWLYH FRPPDQG &RO DGGUHVV WR FRO DGGUHVV GHOD\ 1XPEHU RI YDOLG RXWSXW GDWD 1XPEHU RI YDOLG RXWSXW GDWD 1XPEHU RI YDOLG RXWSXW GDWD Symbol W55'PLQ W5&'PLQ W53PLQ W5$6PLQ W5$6PD[ W5&PLQ W5'/PLQ W'$/PLQ W&'/PLQ W%'/PLQ W$5)&PLQ W65);PLQ W&&'PLQ &$6 ODWHQF\ &$6 ODWHQF\ &$6 ODWHQF\ Value W5'/ W53 HD Unit QV QV QV QV XV QV QV &/. &/. QV QV &/. Note
1RWHV 7KH PLQLPXP QXPEHU RI FORFN F\FOHV LV GHWHUPLQHG E\ GLYLGLQJ WKH PLQLPXP WLPH UHTXLUHG ZLWK FORFN F\FOH WLPH DQG WKHQ URXQGLQJ RII WR WKH QH[W KLJKHU LQWHJHU 0LQLPXP GHOD\ LV UHTXLUHG WR FRPSOHWH ZULWH $OO SDUWV DOORZ HYHU\ F\FOH FROXPQ DGGUHVV FKDQJH ,Q FDVH RI URZ SUHFKDUJH LQWHUUXSW DXWR SUHFKDUJH DQG UHDG EXUVW VWRS
May 12, 2005 SDRAM_04_A0
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209
Preliminary
80 AC Characteristics
$& RSHUDWLQJ FRQGLWLRQV XQOHVV RWKHUZLVH QRWHG
Parameter &/. F\FOH WLPH &/. WR YDOLG RXWSXW GHOD\ 2XWSXW GDWD KROG WLPH &/. KLJK SXOVH ZLGWK &/. ORZ SXOVH ZLGWK ,QSXW VHWXS WLPH ,QSXW KROG WLPH &/. WR RXWSXW LQ /RZ= &/. WR RXWSXW LQ +L= &$6 ODWHQF\ &$6 ODWHQF\ &$6 ODWHQF\ &$6 ODWHQF\ &$6 ODWHQF\ &$6 ODWHQF\ &$6 ODWHQF\ &$6 ODWHQF\ Symbol W&& W&& W6$& W6$& W2+ W2+ W&+ W&/ W66 W6+ W6/= W6+= Min Max Unit QV QV QV QV QV QV QV QV QV Note V
1RWHV 3DUDPHWHUV GHSHQG RQ SURJUDPPHG &$6 ODWHQF\ ,I FORFN ULVLQJ WLPH LV ORQJHU WKDQ QV WUQV VKRXOG EH DGGHG WR WKH SDUDPHWHU $VVXPHG LQSXW ULVH DQG IDOO WLPH WU WI QV ,I WU WI LV ORQJHU WKDQ QV WUDQVLHQW WLPH FRPSHQVDWLRQ VKRXOG EH FRQVLGHUHG LH >WU WI@QV VKRXOG EH DGGHG WR WKH SDUDPHWHU
210
S73WS256N Based MCPs
SDRAM_04_A0 May 12, 2005
Preliminary
81 Simplified Truth Table
Command 5HJLVWHU 0RGH 5HJLVWHU 6HW $XWR 5HIUHVK 5HIUHVK 6HOI 5HIUHVK 5RZ $GGU (QWU\ ([LW CKEn-1 + + / + + CKEn ; + / + ; ; CS# / / / + / / RAS# CAS# WE# / / + ; / + / / + ; + / / + + ; + + DQM ; ; ; ; ; 9 9 BA0,1 A10/AP 23 &2'( ; ; 5RZ $GGUHVV / + / + ; 9 ; / + ; ; &ROXPQ $GGUHVV $$ &ROXPQ $GGUHVV $$ A12, A11, A9 ~ A0 Note
%DQN $FWLYH
$XWR 3UHFKDUJH 'LVDEOH 5HDG &ROXPQ $GGUHVV $XWR 3UHFKDUJH (QDEOH $XWR 3UHFKDUJH 'LVDEOH :ULWH &ROXPQ $GGUHVV $XWR 3UHFKDUJH (QDEOH %XUVW 6WRS 3UHFKDUJH %DQN 6HOHFWLRQ $OO %DQNV (QWU\ ([LW (QWU\ 3UHFKDUJH 3RZHU 'RZQ 0RGH ([LW '40 1R 2SHUDWLRQ &RPPDQG
+ + + + / + / + +
; ; ; / + / +
/ / / + / ; + / + / + /
+ + / ; 9 ; ; + ; 9 ; ; +
/ + + ; 9 ; ; + ; 9 ; +
/ / / ; 9 ; ; + ; 9 ; +
; ; ; ; ; ;
9
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; ; 9 ; ; ;
;
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9DOLG ;
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1RWHV 23 &RGH 2SHUDQG &RGH $ $
%$ %$ 3URJUDP NH\V #056
056 FDQ EH LVVXHG RQO\ DW DOO EDQNV SUHFKDUJH VWDWH $ QHZ FRPPDQG FDQ EH LVVXHG DIWHU &/. F\FOHV RI 056 $XWR UHIUHVK IXQFWLRQV DUH WKH VDPH DV &%5 UHIUHVK RI '5$0 7KH DXWRPDWLFDOO\ SUHFKDUJH ZLWKRXW URZ SUHFKDUJH FRPPDQG LV PHDQW E\ $XWR $XWRVHOI UHIUHVK FDQ EH LVVXHG RQO\ DW DOO EDQNV SUHFKDUJH VWDWH 3DUWLDO VHOI UHIUHVK FDQ EH LVVXHG RQO\ DIWHU VHWWLQJ SDUWLDO VHOI UHIUHVK PRGH RI (056 %$ %$ %DQN VHOHFW DGGUHVVHV 'XULQJ EXUVW UHDG RU ZULWH ZLWK DXWR SUHFKDUJH QHZ UHDGZULWH FRPPDQG FDQ QRW EH LVVXHG $QRWKHU EDQN UHDGZULWH FRPPDQG FDQ EH LVVXHG DIWHU WKH HQG RI EXUVW 1HZ URZ DFWLYH RI WKH DVVRFLDWHG EDQN FDQ EH LVVXHG DW W53 DIWHU WKH HQG RI EXUVW %XUVW VWRS FRPPDQG LV YDOLG DW HYHU\ EXUVW OHQJWK '40 VDPSOHG DW WKH SRVLWLYH JRLQJ HGJH RI &/. PDVNV WKH GDWDLQ DW WKDW VDPH &/. LQ ZULWH RSHUDWLRQ :ULWH '40 ODWHQF\ LV EXW LQ UHDG RSHUDWLRQ LW PDNHV WKH GDWDRXW +L= VWDWH DIWHU &/. F\FOHV 5HDG '40 ODWHQF\ LV
82 Mode Register Field Table to Program Modes
Address )XQFWLRQ BA0 ~ BA1 6HWWLQJ IRU 1RUPDO 056 A12 ~ A10/AP 5)8 A9*2 :%/ A8 A7 A6 A5 A4 A3 %7 A2 A1 A0 7HVW 0RGH &$6 /DWHQF\ %XUVW /HQJWK
1RWH 5HJLVWHU 3URJUDPPHG ZLWK 1RUPDO 056
May 12, 2005 SDRAM_04_A0
S73WS256N Based MCPs
211
Preliminary
82.1
Normal MRS Mode
Test Mode A8 0 0 1 1 A9 A7 0 1 0 1 Type 0RGH 5HJLVWHU 6HW 5HVHUYHG 5HVHUYHG 5HVHUYHG Length %XUVW 6LQJOH %LW A6 CAS Latency A5 A4 Latency 5HVHUYHG 5HVHUYHG 5HVHUYHG 5HVHUYHG 5HVHUYHG BA1 A3 Burst Type Type 6HTXHQWLDO ,QWHUOHDYH Mode Select BA0 Mode 6HWWLQJ IRU 1RUPDO 056 A2 A1 Burst Length A0 BT=0 5HVHUYHG 5HVHUYHG 5HVHUYHG )XOO 3DJH BT=1 5HVHUYHG 5HVHUYHG 5HVHUYHG 5HVHUYHG
Write Burst Length
1RWH )XOO 3DJH /HQJWK [ 0E 0E 0E 0E
Table 82.1
Address )XQFWLRQ BA1 BA0 BA0 0RGH 6HOHFW
Register Programmed with Extended MRS
A9 5)8 A8 A7 A6 '6 A5 A4 5)8 A3 A2 A1 3$65 A0
A12 ~ A10/AP A10
82.2 EMRS for PASR (Partial Array Self Refresh) and DS (Driver Strength)
Mode Select BA1 BA0 A9 Mode 1RUPDO 056 5HVHUYHG (056 IRU 0RELOH 6'5$0 5HVHUYHG Reserved Address A12-A10/AP A8 A7 A4 A3 A6 Driver Strength A5 Driver Strength )XOO A2 A1 A0 PASR Size of Refreshed Array )XOO $UUD\ RI )XOO $UUD\ RI )XOO $UUD\ 5HVHUYHG 5HVHUYHG 5HVHUYHG 5HVHUYHG 5HVHUYHG
1RWHV 5)8 5HVHUYHG IRU IXWXUH XVH VKRXOG VWD\ GXULQJ 056 F\FOH ,I $ LV KLJK GXULQJ 056 F\FOH %XUVW 5HDG 6LQJOH %LW :ULWH IXQFWLRQ ZLOO EH HQDEOHG
83 Partial Array Self Refresh
,Q RUGHU WR VDYH SRZHU FRQVXPSWLRQ 0RELOH 6'5$0 KDV D 3$65 RSWLRQ 0RELOH 6'5$0 VXS SRUWV NLQGV RI 3$65 LQ VHOI UHIUHVK PRGH IXOO DUUD\ RI IXOO DUUD\ RI IXOO DUUD\ 6HH )LJXUH
212
S73WS256N Based MCPs
SDRAM_04_A0 May 12, 2005
Preliminary
BA1=0 BA0=0
BA1=0 BA0=1
BA1=0 BA0=0
BA1=0 BA0=1
BA1=0 BA0=0
BA1=0 BA0=1
BA1=1 BA0=0
BA1=1 BA0=1
BA1=1 BA0=0
BA1=1 BA0=1
BA1=1 BA0=0
BA1=1 BA0=1
- Full Array
- 1/2 of full Array
- 1/4 of full Array
Partial Self Refresh Area
Figure 83.1
Partial Array Self Refresh Areas
83.1
Internal Temperature Compensated Self Refresh (TCSR)
Temperature Range 0D[ & 0D[ & Self Refresh Current (Icc 6) Full Array 1/2 of Full Array 1/4 of Full Array Unit $
1RWHV ,Q RUGHU WR VDYH SRZHU FRQVXPSWLRQ 0RELOH6'5$0 LQFOXGHV WKH LQWHUQDO WHPSHUDWXUH VHQVRU DQG FRQWURO XQLWV WR FRQWURO WKH VHOI UHIUHVK F\FOH DXWRPDWLFDOO\ DFFRUGLQJ WR WKH WZR WHPSHUDWXUH UDQJHV 0D[ & DQG 0D[ & IRU ([WHQGHG 0D[ & IRU &RPPHUFLDO ,I WKH (056 IRU H[WHUQDO 7&65 LV LVVXHG E\ WKH FRQWUROOHU WKLV (056 FRGH IRU 7&65 LV LJQRUHG
84 Power Up Sequence
$SSO\ SRZHU DQG DWWHPSW WR PDLQWDLQ &.( DW D KLJK VWDWH DQG DOO RWKHU LQSXWV PD\ EH XQGHILQHG $SSO\ 9'' EHIRUH RU DW WKH VDPH WLPH DV 9''4 0DLQWDLQ VWDEOH SRZHU VWDEOH FORFN DQG 123 LQSXW FRQGLWLRQ IRU D PLQLPXP RI XV ,VVXH SUHFKDUJH FRPPDQGV IRU DOO EDQNV RI WKH GHYLFHV

,VVXH RU PRUH DXWRUHIUHVK FRPPDQGV ,VVXH D PRGH UHJLVWHU VHW FRPPDQG WR LQLWLDOL]H WKH PRGH UHJLVWHU ,VVXH D H[WHQGHG PRGH UHJLVWHU VHW FRPPDQG WR GHILQH '6 RU 3$65 RSHUDWLQJ W\SH RI WKH GHYLFH DIWHU QRUPDO 056 (056 F\FOH LV QRW PDQGDWRU\ DQG WKH (056 FRPPDQG QHHGV WR EH LVVXHG RQO\ ZKHQ '6 RU 3$65 LV XVHG 7KH GHIDXOW VWDWH ZLWKRXW (056 FRPPDQG LVVXHG LV KDOI GULYHU VWUHQJWK DQG IXOO DUUD\ UHIUHVKHG 7KH GHYLFH LV QRZ UHDG\ IRU WKH RSHUDWLRQ VHOHFWHG E\ (056 )RU RSHUDWLQJ ZLWK '6 RU 3$65 VHW '6 RU 3$65 PRGH LQ (056 VHWWLQJ VWDJH ,Q RUGHU WR DGMXVW DQRWKHU PRGH LQ WKH VWDWH RI '6 RU 3$65 PRGH DGGLWLRQDO (056 VHW LV UH TXLUHG EXW SRZHU XS VHTXHQFH LV QRW QHHGHG DJDLQ DW WKLV WLPH ,Q WKDW FDVH DOO EDQNV KDYH WR EH LQ LGOH VWDWH SULRU WR DGMXVWLQJ (056 VHW
May 12, 2005 SDRAM_04_A0
S73WS256N Based MCPs
213
Preliminary
85 Burst Sequence
85.1 Burst Length = 4
Initial Address A1 A0 Sequential Interleave
85.2 Burst Length = 8
Initial Address A2 A1 A0 Sequential Interleave
86 Device Operations
86.1 Addresses of 256Mb
[
%DQN $GGUHVVHV %$%$
7KLV 6'5$0 LV RUJDQL]HG DV IRXU LQGHSHQGHQW EDQNV RI ZRUGV [ ELWV PHPRU\ DUUD\V 7KH %$%$ LQSXWV DUH ODWFKHG DW WKH WLPH RI DVVHUWLRQ RI 5$6 DQG &$6 WR VHOHFW WKH EDQN WR EH XVHG IRU WKH RSHUDWLRQ 7KH EDQN DGGUHVVHV %$%$ DUH ODWFKHG DW EDQN DF WLYH UHDG ZULWH PRGH UHJLVWHU VHW DQG SUHFKDUJH RSHUDWLRQV
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$GGUHVV ,QSXWV $$
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7KH DGGUHVV ELWV DUH UHTXLUHG WR GHFRGH WKH ZRUG ORFDWLRQV DUH PXOWLSOH[HG LQWR DGGUHVV LQSXW SLQV $$ 7KH ELW URZ DGGUHVVHV DUH ODWFKHG DORQJ ZLWK 5$6 DQG %$ %$ GXULQJ EDQN DFWLYDWH FRPPDQG 7KH ELW FROXPQ DGGUHVVHV DUH ODWFKHG DORQJ ZLWK &$6 :( DQG %$%$ GXULQJ UHDG RU ZULWH FRPPDQG
214
S73WS256N Based MCPs
SDRAM_04_A0 May 12, 2005
Preliminary
86.2 Addresses of 512Mb
%DQN $GGUHVVHV %$%$
[
7KLV 6'5$0 LV RUJDQL]HG DV IRXU LQGHSHQGHQW EDQNV RI ZRUGV [ ELWV PHPRU\ DUUD\V 7KH %$%$ LQSXWV DUH ODWFKHG DW WKH WLPH RI DVVHUWLRQ RI 5$6 DQG &$6 WR VHOHFW WKH EDQN WR EH XVHG IRU WKH RSHUDWLRQ 7KH EDQN DGGUHVVHV %$%$ DUH ODWFKHG DW EDQN DF WLYH UHDG ZULWH PRGH UHJLVWHU VHW DQG SUHFKDUJH RSHUDWLRQV
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7KLV 6'5$0 LV RUJDQL]HG DV IRXU LQGHSHQGHQW EDQNV RI ZRUGV [ ELWV PHPRU\ DUUD\V 7KH %$%$ LQSXWV DUH ODWFKHG DW WKH WLPH RI DVVHUWLRQ RI 5$6 DQG &$6 WR VHOHFW WKH EDQN WR EH XVHG IRU WKH RSHUDWLRQ 7KH EDQN DGGUHVVHV %$%$ DUH ODWFKHG DW EDQN DF WLYH UHDG ZULWH PRGH UHJLVWHU VHW DQG SUHFKDUJH RSHUDWLRQV
$GGUHVV ,QSXWV $$
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7KH DGGUHVV ELWV DUH UHTXLUHG WR GHFRGH WKH ZRUG ORFDWLRQV DUH PXOWLSOH[HG LQWR DGGUHVV LQSXW SLQV $$ 7KH ELW URZ DGGUHVVHV DUH ODWFKHG DORQJ ZLWK 5$6 DQG %$%$ GXULQJ EDQN DFWLYDWH FRPPDQG 7KH ELW FROXPQ DGGUHVVHV DUH ODWFKHG DORQJ ZLWK &$6 :( DQG %$%$ GXULQJ UHDG RU ZULWH FRPPDQG
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7KH DGGUHVV ELWV DUH UHTXLUHG WR GHFRGH WKH ZRUG ORFDWLRQV DUH PXOWLSOH[HG LQWR DGGUHVV LQSXW SLQV $$ 7KH ELW URZ DGGUHVVHV DUH ODWFKHG DORQJ ZLWK 5$6 DQG %$%$ GXULQJ EDQN DFWLYDWH FRPPDQG 7KH ELW FROXPQ DGGUHVVHV DUH ODWFKHG DORQJ ZLWK &$6 :( DQG %$%$ GXULQJ UHDG RU ZULWH FRPPDQG
86.3 Clock (CLK)
7KH FORFN LQSXW LV XVHG DV WKH UHIHUHQFH IRU DOO 6'5$0 RSHUDWLRQV $OO RSHUDWLRQV DUH V\QFKUR QL]HG WR WKH SRVLWLYH JRLQJ HGJH RI WKH FORFN 7KH FORFN WUDQVLWLRQV PXVW EH PRQRWRQLF EHWZHHQ 9,/ DQG 9,+ 'XULQJ RSHUDWLRQ ZLWK &.( KLJK DOO LQSXWV DUH DVVXPHG WR EH LQ D YDOLG VWDWH ORZ RU KLJK IRU WKH GXUDWLRQ RI VHWXS DQG KROG WLPH DURXQG SRVLWLYH HGJH RI WKH FORFN LQ RUGHU WR IXQFWLRQ ZHOO 4 SHUIRUP DQG ,&& VSHFLILFDWLRQV
86.4 Clock Enable (CKE)
7KH FORFN HQDEOH &.( JDWHV WKH FORFN RQWR 6'5$0 ,I &.( JRHV ORZ V\QFKURQRXVO\ ZLWK FORFN VHWXS DQG KROG WLPH DUH WKH VDPH DV RWKHU LQSXWV WKH LQWHUQDO FORFN LV VXVSHQGHG IURP WKH QH[W FORFN F\FOH DQG WKH VWDWH RI RXWSXW DQG EXUVW DGGUHVV LV IUR]HQ DV ORQJ DV WKH &.( UH PDLQV ORZ $OO RWKHU LQSXWV DUH LJQRUHG IURP WKH QH[W FORFN F\FOH DIWHU &.( JRHV ORZ :KHQ DOO EDQNV DUH LQ WKH LGOH VWDWH DQG &.( JRHV ORZ V\QFKURQRXVO\ ZLWK FORFN WKH 6'5$0 HQWHUV WKH SRZHU GRZQ PRGH IURP WKH QH[W FORFN F\FOH 7KH 6'5$0 UHPDLQV LQ WKH SRZHU GRZQ PRGH LJQRULQJ WKH RWKHU LQSXWV DV ORQJ DV &.( UHPDLQV ORZ 7KH SRZHU GRZQ H[LW LV V\QFKUR QRXV DV WKH LQWHUQDO FORFN LV VXVSHQGHG :KHQ &.( JRHV KLJK DW OHDVW &/. W66 EHIRUH WKH KLJK JRLQJ HGJH RI WKH FORFN WKHQ WKH 6'5$0 EHFRPHV DFWLYH IURP WKH VDPH FORFN HGJH DF FHSWLQJ DOO WKH LQSXW FRPPDQGV
86.5 NOP and Device Deselect
:KHQ 5$6 &$6 DQG :( DUH KLJK WKH 6'5$0 SHUIRUPV QR RSHUDWLRQ 123 123 GRHV QRW LQLWLDWH DQ\ QHZ RSHUDWLRQ EXW LV QHHGHG WR FRPSOHWH RSHUDWLRQV ZKLFK UHTXLUH PRUH WKDQ VLQJOH FORFN F\FOH OLNH EDQN DFWLYDWH EXUVW UHDG DXWR UHIUHVK HWF 7KH GHYLFH GHVHOHFW LV DOVR D 123 DQG LV HQWHUHG E\ DVVHUWLQJ &6 KLJK &6 KLJK GLVDEOHV WKH FRPPDQG GHFRGHU VR WKDW 5$6 &$6 :( DQG DOO WKH DGGUHVV LQSXWV DUH LJQRUHG
May 12, 2005 SDRAM_04_A0
S73WS256N Based MCPs
215
Preliminary
86.6 DQM Operation
7KH '40 LV XVHG WR PDVN LQSXW DQG RXWSXW RSHUDWLRQV ,W ZRUNV VLPLODU WR 2( GXULQJ UHDG RSHUDWLRQ DQG LQKLELWV ZULWLQJ GXULQJ ZULWH RSHUDWLRQ 7KH UHDG ODWHQF\ LV WZR F\FOHV IURP '40 DQG ]HUR F\FOH IRU ZULWH ZKLFK PHDQV '40 PDVNLQJ RFFXUV WZR F\FOHV ODWHU LQ UHDG F\FOH DQG RFFXUV LQ WKH VDPH F\FOH GXULQJ ZULWH F\FOH '40 RSHUDWLRQ LV V\QFKURQRXV ZLWK WKH FORFN 7KH '40 VLJQDO LV LPSRUWDQW GXULQJ EXUVW LQWHUUXSWLRQV RI ZULWH ZLWK UHDG RU SUHFKDUJH LQ WKH 6'5$0 'XH WR DV\QFKURQRXV QDWXUH RI WKH LQWHUQDO ZULWH WKH '40 RSHUDWLRQ LV FULWLFDO WR DYRLG XQZDQWHG RU LQFRPSOHWH ZULWHV ZKHQ WKH FRPSOHWH EXUVW ZULWH LV QRW UHTXLUHG 3OHDVH UHIHU WR )LJXUH DOVR
86.7 Mode Register Set (MRS)
7KH PRGH UHJLVWHU VWRUHV WKH GDWD IRU FRQWUROOLQJ WKH YDULRXV RSHUDWLQJ PRGHV RI 6'5$0 ,W SURJUDPV WKH &$6 ODWHQF\ EXUVW W\SH EXUVW OHQJWK WHVW PRGH DQG YDULRXV YHQGRU VSHFLILF RSWLRQV WR PDNH 6'5$0 XVHIXO IRU YDULHW\ RI GLIIHUHQW DSSOLFDWLRQV 7KH GHIDXOW YDOXH RI WKH PRGH UHJLVWHU LV QRW GHILQHG WKHUHIRUH WKH PRGH UHJLVWHU PXVW EH ZULWWHQ DIWHU SRZHU XS WR RSHUDWH WKH 6'5$0 7KH PRGH UHJLVWHU LV ZULWWHQ E\ DVVHUWLQJ ORZ RQ &6 5$6 &$6 DQG :( 7KH 6'5$0 VKRXOG EH LQ DFWLYH PRGH ZLWK &.( DOUHDG\ KLJK SULRU WR ZULWLQJ WKH PRGH UHJLVWHU 7KH VWDWH RI DGGUHVV SLQV $$Q DQG %$%$ LQ WKH VDPH F\FOH DV &6 5$6 &$6 DQG :( JRLQJ ORZ LV WKH GDWD ZULWWHQ LQ WKH PRGH UHJLVWHU 7ZR FORFN F\FOHV LV UHTXLUHG WR FRPSOHWH WKH ZULWH LQ WKH PRGH UHJLVWHU 7KH PRGH UHJLVWHU FRQWHQWV FDQ EH FKDQJHG XVLQJ WKH VDPH FRPPDQG DQG FORFN F\FOH UHTXLUHPHQWV GXULQJ RSHUDWLRQ DV ORQJ DV DOO EDQNV DUH LQ WKH LGOH VWDWH 7KH PRGH UHJLVWHU LV GLYLGHG LQWR YDULRXV ILHOGV GHSHQGLQJ RQ WKH ILHOGV RI IXQF WLRQV 7KH EXUVW OHQJWK ILHOG XVHV $$ EXUVW W\SH XVHV $ &$6 ODWHQF\ UHDG ODWHQF\ IURP FROXPQ DGGUHVV XVH $$ YHQGRU VSHFLILF RSWLRQV RU WHVW PRGH XVH $$ $$3$Q DQG %$%$ 7KH ZULWH EXUVW OHQJWK LV SURJUDPPHG XVLQJ $ $$ $$3$Q DQG %$%$ PXVW EH VHW WR ORZ IRU QRUPDO 6'5$0 RSHUDWLRQ 5HIHU WR WKH WDEOH IRU VSHFLILF FRGHV IRU YDU LRXV EXUVW OHQJWK EXUVW W\SH DQG &$6 ODWHQFLHV
86.8 Extended Mode Register Set (EMRS)
7KH H[WHQGHG PRGH UHJLVWHU VWRUHV WKH GDWD IRU VHOHFWLQJ GULYHU VWUHQJWK DQG SDUWLDO VHOI UH IUHVK (056 F\FOH LV QRW PDQGDWRU\ DQG WKH (056 FRPPDQG QHHGV WR EH LVVXHG RQO\ ZKHQ '6 RU 3$65 LV XVHG 7KH GHIDXOW VWDWH ZLWKRXW (056 FRPPDQG LVVXHG LV KDOI GULYHU VWUHQJWK DQG IXOO DUUD\ UHIUHVKHG 7KH H[WHQGHG PRGH UHJLVWHU LV ZULWWHQ E\ DVVHUWLQJ ORZ RQ &6 5$6 &$6 :( DQG KLJK RQ %$ORZ RQ %$ 7KH 6'5$0 VKRXOG EH LQ DOO EDQN SUHFKDUJH ZLWK &.( DOUHDG\ KLJK SULRU WR ZULWLQJ LQWR WKH H[WHQGHG PRGH UHJLVWHU 7KH VWDWH RI DGGUHVV SLQV $$ LQ WKH VDPH F\FOH DV &6 5$6 &$6 DQG :( JRLQJ ORZ LV ZULWWHQ LQ WKH H[ WHQGHG PRGH UHJLVWHU 7ZR FORFN F\FOHV DUH UHTXLUHG WR FRPSOHWH WKH ZULWH RSHUDWLRQ LQ WKH H[WHQGHG PRGH UHJLVWHU 7KH PRGH UHJLVWHU FRQWHQWV FDQ EH FKDQJHG XVLQJ WKH VDPH FRP PDQG DQG FORFN F\FOH UHTXLUHPHQWV GXULQJ RSHUDWLRQ DV ORQJ DV DOO EDQNV DUH LQ WKH LGOH VWDWH $$ DUH XVHG IRU SDUWLDO VHOI UHIUHVK $$ DUH XVHG IRU 'ULYHU VWUHQJWK /RZ RQ %$ DQG +LJK RQ %$ DUH XVHG IRU (056 $OO WKH RWKHU DGGUHVV SLQV H[FHSW $$ $$ %$ %$ PXVW EH VHW WR ORZ IRU SURSHU (056 RSHUDWLRQ 5HIHU WR WKH WDEOH IRU VSHFLILF FRGHV
86.9 Bank Activate
7KH EDQN DFWLYDWH FRPPDQG LV XVHG WR VHOHFW D UDQGRP URZ LQ DQ LGOH EDQN %\ DVVHUWLQJ ORZ RQ 5$6 DQG &6 ZLWK GHVLUHG URZ DQG EDQN DGGUHVV D URZ DFFHVV LV LQLWLDWHG 7KH UHDG RU ZULWH RSHUDWLRQ FDQ RFFXU DIWHU D WLPH GHOD\ RI W5&'PLQ IURP WKH WLPH RI EDQN DFWLYDWLRQ W5&' LV DQ LQWHUQDO WLPLQJ SDUDPHWHU RI 6'5$0 WKHUHIRUH LW LV GHSHQGHQW RQ RSHUDWLQJ FORFN IUH TXHQF\ 7KH PLQLPXP QXPEHU RI FORFN F\FOHV UHTXLUHG EHWZHHQ EDQN DFWLYDWH DQG UHDG RU ZULWH FRPPDQG VKRXOG EH FDOFXODWHG E\ GLYLGLQJ W5&'PLQ ZLWK F\FOH WLPH RI WKH FORFN DQG WKHQ URXQGLQJ RII WKH UHVXOW WR WKH QH[W KLJKHU LQWHJHU
216
S73WS256N Based MCPs
SDRAM_04_A0 May 12, 2005
Preliminary
7KH 6'5$0 KDV IRXU LQWHUQDO EDQNV LQ WKH VDPH FKLS DQG VKDUHV SDUW RI WKH LQWHUQDO FLUFXLWU\ WR UHGXFH FKLS DUHD WKHUHIRUH LW UHVWULFWV WKH DFWLYDWLRQ RI IRXU EDQNV VLPXOWDQHRXVO\ $OVR WKH QRLVH JHQHUDWHG GXULQJ VHQVLQJ RI HDFK EDQN RI 6'5$0 LV KLJK UHTXLULQJ VRPH WLPH IRU SRZHU VXSSOLHV WR UHFRYHU EHIRUH DQRWKHU EDQN FDQ EH VHQVHG UHOLDEO\ W55'PLQ VSHFLILHV WKH PLQL PXP WLPH UHTXLUHG EHWZHHQ DFWLYDWLQJ GLIIHUHQW EDQN 7KH QXPEHU RI FORFN F\FOHV UHTXLUHG EHWZHHQ GLIIHUHQW EDQN DFWLYDWLRQ PXVW EH FDOFXODWHG VLPLODU WR W5&' VSHFLILFDWLRQ 7KH PLQL PXP WLPH UHTXLUHG IRU WKH EDQN WR EH DFWLYH WR LQLWLDWH VHQVLQJ DQG UHVWRULQJ WKH FRPSOHWH URZ RI G\QDPLF FHOOV LV GHWHUPLQHG E\ W5$6PLQ (YHU\ 6'5$0 EDQN DFWLYDWH FRPPDQG PXVW VDWLVI\ W5$6PLQ VSHFLILFDWLRQ EHIRUH D SUHFKDUJH FRPPDQG WR WKDW DFWLYH EDQN FDQ EH DV VHUWHG 7KH PD[LPXP WLPH DQ\ EDQN FDQ EH LQ WKH DFWLYH VWDWH LV GHWHUPLQHG E\ W5$6PLQ 7KH QXPEHU RI F\FOHV IRU ERWK W5$6PLQ DQG W5$6PD[ FDQ EH FDOFXODWHG VLPLODU WR W5&' VSHFLILFDWLRQ
86.10 Burst Read
7KH EXUVW UHDG FRPPDQG LV XVHG WR DFFHVV EXUVW RI GDWD RQ FRQVHFXWLYH FORFN F\FOHV IURP DQ DFWLYH URZ LQ DQ DFWLYH EDQN 7KH EXUVW UHDG FRPPDQG LV LVVXHG E\ DVVHUWLQJ ORZ RQ &6 DQG &$6 ZLWK :( EHLQJ KLJK RQ WKH SRVLWLYH HGJH RI WKH FORFN 7KH EDQN PXVW EH DFWLYH IRU DW OHDVW W5&'PLQ EHIRUH WKH EXUVW UHDG FRPPDQG LV LVVXHG 7KH ILUVW RXWSXW DSSHDUV LQ &$6 OD WHQF\ QXPEHU RI FORFN F\FOHV DIWHU WKH LVVXH RI EXUVW UHDG FRPPDQG 7KH EXUVW OHQJWK EXUVW VHTXHQFH DQG ODWHQF\ IURP WKH EXUVW UHDG FRPPDQG LV GHWHUPLQHG E\ WKH PRGH UHJLVWHU ZKLFK LV DOUHDG\ SURJUDPPHG 7KH EXUVW UHDG FDQ EH LQLWLDWHG RQ DQ\ FROXPQ DGGUHVV RI WKH DFWLYH URZ 7KH DGGUHVV ZUDSV DURXQG LI WKH LQLWLDO DGGUHVV GRHV QRW VWDUW IURP D ERXQGDU\ VXFK WKDW QXPEHU RI RXWSXWV IURP HDFK ,2 DUH HTXDO WR WKH EXUVW OHQJWK SURJUDPPHG LQ WKH PRGH UHJLVWHU 7KH RXWSXW JRHV LQWR KLJKLPSHGDQFH DW WKH HQG RI WKH EXUVW XQOHVV D QHZ EXUVW UHDG ZDV LQLWLDWHG WR NHHS WKH GDWD RXWSXW VHDPOHVV 7KH EXUVW UHDG FDQ EH WHUPLQDWHG E\ LVVXLQJ DQRWKHU EXUVW UHDG RU EXUVW ZULWH LQ WKH VDPH EDQN RU WKH RWKHU DFWLYH EDQN RU D SUHFKDUJH FRPPDQG WR WKH VDPH EDQN 7KH EXUVW VWRS FRPPDQG LV YDOLG DW HYHU\ SDJH EXUVW OHQJWK
86.11 Burst Write
7KH EXUVW ZULWH FRPPDQG LV VLPLODU WR EXUVW UHDG FRPPDQG DQG LV XVHG WR ZULWH GDWD LQWR WKH 6'5$0 RQ FRQVHFXWLYH FORFN F\FOHV LQ DGMDFHQW DGGUHVVHV GHSHQGLQJ RQ EXUVW OHQJWK DQG EXUVW VHTXHQFH %\ DVVHUWLQJ ORZ RQ &6 &$6 DQG :( ZLWK YDOLG FROXPQ DGGUHVV D ZULWH EXUVW LV LQLWLDWHG 7KH GDWD LQSXWV DUH SURYLGHG IRU WKH LQLWLDO DGGUHVV LQ WKH VDPH FORFN F\FOH DV WKH EXUVW ZULWH FRPPDQG 7KH LQSXW EXIIHU LV GHVHOHFWHG DW WKH HQG RI WKH EXUVW OHQJWK HYHQ WKRXJK WKH LQWHUQDO ZULWLQJ FDQ EH FRPSOHWHG \HW 7KH ZULWLQJ FDQ EH FRPSOHWHG E\ LV VXLQJ D EXUVW UHDG DQG '40 IRU EORFNLQJ GDWD LQSXWV RU EXUVW ZULWH LQ WKH VDPH RU DQRWKHU DFWLYH EDQN 7KH EXUVW VWRS FRPPDQG LV YDOLG DW HYHU\ EXUVW OHQJWK 7KH ZULWH EXUVW FDQ DOVR EH WHUPLQDWHG E\ XVLQJ '40 IRU EORFNLQJ GDWD DQG SURFUHDWLQJ WKH EDQN W5'/ DIWHU WKH ODVW GDWD LQSXW WR EH ZULWWHQ LQWR WKH DFWLYH URZ 6HH '40 2SHUDWLRQ
86.12 All Banks Precharge
$OO EDQNV FDQ EH SUHFKDUJHG DW WKH VDPH WLPH E\ XVLQJ 3UHFKDUJH DOO FRPPDQG $VVHUWLQJ ORZ RQ &6 5$6 DQG :( ZLWK KLJK RQ $$3 DIWHU DOO EDQNV KDYH VDWLVILHG W5$6PLQ UHTXLUH PHQW SHUIRUPV SUHFKDUJH RQ DOO EDQNV $W WKH HQG RI W53 DIWHU SHUIRUPLQJ SUHFKDUJH WR DOO WKH EDQNV DOO EDQNV DUH LQ LGOH VWDWH
86.13 Precharge
7KH SUHFKDUJH RSHUDWLRQ LV SHUIRUPHG RQ DQ DFWLYH EDQN E\ DVVHUWLQJ ORZ RQ &6 5$6 :( DQG $$3 ZLWK YDOLG %$%$ RI WKH EDQN WR EH SUHFKDUJHG 7KH SUHFKDUJH FRPPDQG FDQ EH DVVHUWHG DQ\WLPH DIWHU W5$6PLQ LV VDWLVILHG IURP WKH EDQN DFWLYH FRPPDQG LQ WKH GH VLUHG EDQN W53 LV GHILQHG DV WKH PLQLPXP QXPEHU RI FORFN F\FOHV UHTXLUHG WR FRPSOHWH URZ
May 12, 2005 SDRAM_04_A0
S73WS256N Based MCPs
217
Preliminary
SUHFKDUJH LV FDOFXODWHG E\ GLYLGLQJ W53 ZLWK FORFN F\FOH WLPH DQG URXQGLQJ XS WR WKH QH[W KLJKHU LQWHJHU &DUH VKRXOG EH WDNHQ WR PDNH VXUH WKDW EXUVW ZULWH LV FRPSOHWHG RU '40 LV XVHG WR LQKLELW ZULWLQJ EHIRUH SUHFKDUJH FRPPDQG LV DVVHUWHG 7KH PD[LPXP WLPH DQ\ EDQN FDQ EH DFWLYH LV VSHFLILHG E\ W5$6PD[ 7KHUHIRUH HDFK EDQN DFWLYDWH FRPPDQG $W WKH HQG RI SUHFKDUJH WKH EDQN HQWHUV WKH LGOH VWDWH DQG LV UHDG\ WR EH DFWLYDWHG DJDLQ (QWU\ WR 3RZHU GRZQ $XWR UHIUHVK 6HOI UHIUHVK DQG 0RGH UHJLVWHU VHW HWF LV SRVVLEOH RQO\ ZKHQ DOO EDQNV DUH LQ LGOH VWDWH
86.14 Auto Precharge
7KH SUHFKDUJH RSHUDWLRQ FDQ DOVR EH SHUIRUPHG E\ XVLQJ DXWR SUHFKDUJH 7KH 6'5$0 LQWHU QDOO\ JHQHUDWHV WKH WLPLQJ WR VDWLVI\ W5$6PLQ DQG W53 IRU WKH SURJUDPPHG EXUVW OHQJWK DQG &$6 ODWHQF\ 7KH DXWR SUHFKDUJH FRPPDQG LV LVVXHG DW WKH VDPH WLPH DV EXUVW UHDG RU EXUVW ZULWH E\ DVVHUWLQJ KLJK RQ $$3 ,I EXUVW UHDG RU EXUVW ZULWH E\ DVVHUWLQJ KLJK RQ $$3 WKH EDQN LV OHIW DFWLYH XQWLO D QHZ FRPPDQG LV DVVHUWHG 2QFH DXWR SUHFKDUJH FRPPDQG LV JLYHQ QR QHZ FRPPDQGV DUH SRVVLEOH WR WKDW SDUWLFXODU EDQN XQWLO WKH EDQN DFKLHYHV LGOH VWDWH
86.15 Auto Refresh
7KH VWRUDJH FHOOV RI 0E 0E 0E DQG 0E 6'5$0 QHHG WR EH UHIUHVKHG HYHU\ PV WR PDLQWDLQ GDWD $Q DXWR UHIUHVK F\FOH DFFRPSOLVKHV UHIUHVK RI D VLQJOH URZ RI VWRUDJH FHOOV 7KH LQWHUQDO FRXQWHU LQFUHPHQWV DXWRPDWLFDOO\ RQ HYHU\ DXWR UHIUHVK F\FOH WR UHIUHVK DOO WKH URZV $Q DXWR UHIUHVK FRPPDQG LV LVVXHG E\ DVVHUWLQJ ORZ RQ &6 5$6 DQG &$6 ZLWK KLJK RQ &.( DQG :( 7KH DXWR UHIUHVK FRPPDQG FDQ RQO\ EH DVVHUWHG ZLWK DOO EDQNV EHLQJ LQ LGOH VWDWH DQG WKH GHYLFH LV QRW LQ SRZHU GRZQ PRGH &.( LV KLJK LQ WKH SUHYLRXV F\FOH 7KH WLPH UHTXLUHG WR FRPSOHWH WKH DXWR UHIUHVK RSHUDWLRQ LV VSHFLILHG E\ W$5)&PLQ 7KH PLQ LPXP QXPEHU RI FORFN F\FOHV UHTXLUHG FDQ EH FDOFXODWHG E\ GULYLQJ W$5)& ZLWK FORFN F\FOH WLPH DQG WKHP URXQGLQJ XS WR WKH QH[W KLJKHU LQWHJHU 7KH DXWR UHIUHVK FRPPDQG PXVW EH IROORZHG E\ 123
V XQWLO WKH DXWR UHIUHVK RSHUDWLRQ LV FRPSOHWHG $OO EDQNV ZLOO EH LQ WKH LGOH VWDWH DW WKH HQG RI DXWR UHIUHVK RSHUDWLRQ 7KH DXWR UHIUHVK LV WKH SUHIHUUHG UHIUHVK PRGH ZKHQ WKH 6'5$0 LV EHLQJ XVHG IRU QRUPDO GDWD WUDQVDFWLRQV 7KH 0E DQG 0E 6'5$0V DXWR UH IUHVK F\FOH FDQ EH SHUIRUPHG RQFH LQ V RU D EXUVW RI DXWR UHIUHVK F\FOHV RQFH LQ PV 7KH 0E DQG 0E 6'5$0V DXWR UHIUHVK F\FOH FDQ EH SHUIRUPHG RQFH LQ V RU D EXUVW RI DXWR UHIUHVK F\FOHV RQFH LQ PV
86.16 Self Refresh
7KH VHOI UHIUHVK LV DQRWKHU UHIUHVK PRGH DYDLODEOH LQ WKH 6'5$0 7KH VHOI UHIUHVK LV WKH SUH IHUUHG UHIUHVK PRGH IRU GDWD UHWHQWLRQ DQG ORZ SRZHU RSHUDWLRQ RI 6'5$0 ,Q VHOI UHIUHVK PRGH WKH 6'5$0 GLVDEOHV WKH LQWHUQDO FORFN DQG DOO WKH LQSXW EXIIHUV H[FHSW &.( 7KH UHIUHVK DGGUHVVLQJ DQG WLPLQJ DUH LQWHUQDOO\ JHQHUDWHG WR UHGXFH SRZHU FRQVXPSWLRQ 7KH VHOI UHIUHVK PRGH LV HQWHUHG IURP DOO EDQNV LGOH VWDWH E\ DVVHUWLQJ ORZ RQ &6 5$6 &$6 DQG &.( ZLWK KLJK RQ :( 2QFH WKH VHOI UHIUHVK PRGH LV HQWHUHG RQO\ &.( VWDWH EHLQJ ORZ PDWWHUV DOO WKH RWKHU LQSXWV LQFOXGLQJ WKH FORFN DUH LJQRUHG LQ RUGHU WR UHPDLQ LQ WKH VHOI UHIUHVK PRGH 7KH VHOI UHIUHVK LV H[LWHG E\ UHVWDUWLQJ WKH H[WHUQDO FORFN DQG WKHQ DVVHUWLQJ KLJK RQ &.( 7KLV PXVW EH IROORZHG E\ 123
V IRU D PLQLPXP WLPH RI W65); EHIRUH WKH 6'5$0 UHDFKHV LGOH VWDWH WR EHJLQ QRUPDO RSHUDWLRQ ,Q FDVH WKDW WKH V\VWHP XVHV EXUVW DXWR UHIUHVK GXULQJ QRUPDO RS HUDWLRQ LW LV UHFRPPHQGHG WR XVH EXUVW DXWR UHIUHVK F\FOHV IRU 0E DQG 0E DQG EXUVW DXWR UHIUHVK F\FOHV IRU 0E DQG 0E LPPHGLDWHO\ EHIRUH HQWHULQJ VHOI UHIUHVK PRGH DQG DIWHU H[LWLQJ LQ VHOI UHIUHVK PRGH 2Q WKH RWKHU KDQG LI WKH V\VWHP XVHV WKH GLV WULEXWHG DXWR UHIUHVK WKH V\VWHP RQO\ KDV WR NHHS WKH UHIUHVK GXW\ F\FOH
218
S73WS256N Based MCPs
SDRAM_04_A0 May 12, 2005
Preliminary
87 Basic Feature and Function Descriptions
87.1 Clock Suspend
CLK CMD CKE Internal CLK DQ(CL2) DQ(CL3) D0 D0 D1 D1 D2 D2 D3 D3 WR
Masked by CKE
Not W ritten
Figure 87.1
CLK CMD CKE Internal CLK DQ(CL2) DQ(CL3)
Clock Suspend During Write
RD
Masked by CKE
Q0
D Q1 Q0
Q2 Q1
Q3 Q2 Q3
Suspended Dout
Figure 87.2
Clock Suspend During Read (BL = 4)
87.2 DQM Operation
CLK CMD DQM
Masked by CKE
WR
DQ(CL2) DQ(CL3)
D0 D0
D1 D1
D3 D3
DQM to Data-in Mask = 0
Figure 87.1
CLK CMD DQM DQ(CL2) DQ(CL3)
Write Mask (BL = 4)
RD
Masked by CKE Hi-Z
Q0
Q2
Q3 Q2
Hi-Z
Q1
Q3
DQM to Data-out Mask= 2
May 12, 2005 SDRAM_04_A0
S73WS256N Based MCPs
219
Preliminary
Figure 87.2 Read Mask (BL = 4)
CLK CMD CKE DQM DQ(CL2) DQ(CL3) Q0
Hi-Z Hi-Z
RD
Q2 Q1
HiZ HiZ
Q4 Q3
Hi-Z Hi-Z
Q6 Q5
Q7 Q6
Q8 Q7
1RWHV &.( WR &/. GLVDEOHHQDEOH
&/.
'40 PDNHV GDWD RXW +L= DIWHU &/.V ZKLFK VKRXOG PDVNHG E\ &.( / '40 PDVNV ERWK GDWDLQ DQG GDWDRXW
Figure 87.3
DQM with CLock Suspended (Full Page Read)
87.3 CAS# Interrupt 1
CLK CMD ADD
DQ(CL2) DQ(CL3)
tCCD Note 2
RD A
RD B QA0 QB0 QB1 QB1 QB3 QA0 QB0 QB1 QB1 QB3
1RWHV %\ ,QWHUUXSW ,W LV PHDQW WR VWRS EXUVW UHDGZULWH E\ H[WHUQDO FRPPDQG EHIRUH WKH HQG RI EXUVW %\ &$6 ,QWHUUXSW WR VWRS EXUVW UHDGZULWH E\ &$6 DFFHVV UHDG DQG ZULWH W&&' &$6 WR &$6 GHOD\ &/. &/. W&'/ /DVW GDWD LQ WR QHZ FROXPQ DGGUHVV GHOD\
Figure 87.4
Read Interrupted by Read (BL = 4)
CLK CMD ADD
DQ
WR WR
tCCD Note 2
A
B
DA0 DB0 DB1
tCDL Note 3
1RWHV %\ ,QWHUUXSW ,W LV PHDQW WR VWRS EXUVW UHDGZULWH E\ H[WHUQDO FRPPDQG EHIRUH WKH HQG RI EXUVW %\ &$6 ,QWHUUXSW WR VWRS EXUVW UHDGZULWH E\ &$6 DFFHVV UHDG DQG ZULWH W&&' &$6 WR &$6 GHOD\ &/. &/. W&'/ /DVW GDWD LQ WR QHZ FROXPQ DGGUHVV GHOD\
Figure 87.5
Write Interrupted by Write (BL = 2)
220
S73WS256N Based MCPs
SDRAM_04_A0 May 12, 2005
Preliminary
CLK CMD ADD
DQ(CL2) DQ(CL3)
WR A DA0 DA0
RD B QB0 QB1 QB0 QB1
tCCD Note 2
tCDL Note 3
1RWHV %\ ,QWHUUXSW ,W LV PHDQW WR VWRS EXUVW UHDGZULWH E\ H[WHUQDO FRPPDQG EHIRUH WKH HQG RI EXUVW %\ &$6 ,QWHUUXSW WR VWRS EXUVW UHDGZULWH E\ &$6 DFFHVV UHDG DQG ZULWH W&&' &$6 WR &$6 GHOD\ &/. &/. W&'/ /DVW GDWD LQ WR QHZ FROXPQ DGGUHVV GHOD\
Figure 87.6
Write Interrupted by Read (BL = 2)
May 12, 2005 SDRAM_04_A0
S73WS256N Based MCPs
221
Preliminary
87.4 CAS# Interrupt 2
(a) CL=2, BL=4 CLK 1) CMD DQM DQ 2) CMD DQM DQ 3) CMD DQM DQ 4) CMD DQM DQ (b) C L=3, BL=4 CLK 1) CMD DQM DQ 2) CMD DQM DQ 3) CMD DQM DQ 4) CMD DQM DQ 5) CMD DQM DQ Q0
Hi-Z
Note 1
RD
WR
D0 RD
D1 WR
D2
D3
Hi-Z
D0
D1 WR
D2
D3
RD
Hi-Z
D0
D1 WR
D2
D3
RD
Q0
Hi-Z
Note 1
D0
D1
D2
D3
RD
WR
D0 RD
D1 WR
D2
D3
D0 RD
D1 WR
D2
D3
D0 RD
D1 WR
D2
D3
Hi-Z
D0
D1 WR
D2
D3
RD
D0
D1
D2
D3
1RWHV 7R SUHYHQW EXV FRQWHQWLRQ WKHUH VKRXOG EH DW OHDVW RQH JDS EHWZHHQ GDWD LQ DQG GDWD RXW
Figure 87.7 Read Interrupted by Write and DQM
222
S73WS256N Based MCPs
SDRAM_04_A0 May 12, 2005
Preliminary
tRDL = 2CLK CLK CMD DQM DQ D0 D1 D2
Masked by DQM
WR
PRE
Note 3
Note 2
1RWHV 7R SUHYHQW EXV FRQWHQWLRQ '40 VKRXOG EH LVVXHG ZKLFK PDNHV DW OHDVW RQH JDS EHWZHHQ GDWD LQ DQG GDWD RXW 7R LQKLELW LQYDOLG ZULWH '40 VKRXOG EH LVVXHG 7KLV SUHFKDUJH FRPPDQG DQG EXUVW ZULWH FRPPDQG VKRXOG EH RI WKH VDPH EDQN RWKHUZLVH LW LV QRW SUHFKDUJH LQWHUUXSW EXW RQO\ DQRWKHU EDQN SUHFKDUJH RI IRXU EDQNV RSHUDWLRQ
Figure 87.8
Write Interrupted by Precharge and DQM
1) Normal Write BL=4 & tRDL=2CLK CLK CMD DQ WR D0 D1 D2 D3
tRDLNote 1
PRE
2) Normal Read (BL=4) CLK CMD DQ(CL2 ) DQ(CL3 ) RD Q0 Q1 Q0
PRE Q2 Q1
Note 2
Q3 Q2
1
Q3
2
1RWHV W5'/
&/. LV VXSSRUWHG UHVSHFWLYHO\
1XPEHU RI YDOLG RXWSXW GDWD DIWHU URZ SUHFKDUJH IRU &$6 /DWHQF\
7KH URZ DFWLYH FRPPDQG RI WKH SUHFKDUJH EDQN FDQ EH LVVXHG DIWHU W53 IURP WKLV SRLQW 7KH QHZ UHDGZULWH FRPPDQG RI RWKHU DFWLYDWHG EDQN FDQ EH LVVXHG IURP WKLV SRLQW $W EXUVW UHDGZULWH ZLWK DXWR SUHFKDUJH &$6 LQWHUUXSW RI WKH VDPH EDQN LV LOOHJDO W'$/ GHILQHG /DVW GDWD LQ WR $FWLYH GHOD\ W'$/ W5'/ W53 LV VXSSRUWHG
Figure 87.9
Precharge
May 12, 2005 SDRAM_04_A0
S73WS256N Based MCPs
223
Preliminary
1) Normal Write (BL=4) CLK CMD DQ WR D0 D1 D2 D3
tRDL =2CLK tDAL=tRDL +tRP Note 4
2) Nor al Read (BL=4) m CLK ACT CMD DQ(CL2) DQ(CL3) RD Q0 Q1 Q0 Q2 Q1 Q3 Q2 Q3
Auto Precharge Starts Note 3 Auto Pr echarge Starts@tRDL= 2CLK *3
1RWHV W5'/
&/. LV VXSSRUWHG UHVSHFWLYHO\
1XPEHU RI YDOLG RXWSXW GDWD DIWHU URZ SUHFKDUJH IRU &$6 /DWHQF\
7KH URZ DFWLYH FRPPDQG RI WKH SUHFKDUJH EDQN FDQ EH LVVXHG DIWHU W53 IURP WKLV SRLQW 7KH QHZ UHDGZULWH FRPPDQG RI RWKHU DFWLYDWHG EDQN FDQ EH LVVXHG IURP WKLV SRLQW $W EXUVW UHDGZULWH ZLWK DXWR SUHFKDUJH &$6 LQWHUUXSW RI WKH VDPH EDQN LV LOOHJDO W'$/ GHILQHG /DVW GDWD LQ WR $FWLYH GHOD\ W'$/ W5'/ W53 LV VXSSRUWHG
Figure 87.10
Auto Precharge
224
S73WS256N Based MCPs
SDRAM_04_A0 May 12, 2005
Preliminary
1) Nor al Write m BL=4 & tRDL=2CLK CLK CMD DQM DQ D0
D1 D2
tRDLNote 1
WR
PRE
2) Write Burst Stop (BL=8) CLK CMD DQM DQ
D0 D1 D2 D3
tBDL Note 2
3) Read Interrupted by Precharge (BL=4) CLK
WR
STOP
CMD DQ(CL2) DQ(CL3)
RD
PRE Q0
Q1 Q0
1
Q1
2
4) ReadBurst Stop (BL=4) CLK CMD DQ(CL2) DQ(CL3) RD
STOP
Q0
Q1 Q0
1
Q1
2
1RWHV W5'/
&/. LV VXSSRUWHG
W%'/ &/. /DVW GDWD LQ WR EXUVW VWRS GHOD\ 5HDG RU ZULWH EXUVW VWRS FRPPDQG LV YDOLG DW HYHU\ EXUVW OHQJWK 1XPEHU RI YDOLG RXWSXW GDWD DIWHU URZ SUHFKDUJH RU EXUVW VWRS IRU &$6 ODWHQF\ WLYHO\ UHVSHF
35( $OO EDQNV SUHFKDUJH LV QHFHVVDU\ 056 FDQ EH LVVXHG RQO\ DW DOO EDQNV SUHFKDUJH VWDWH
Figure 87.11
Burst Stop and Interrupted by Precharge
1) Mode Register Set CLK CMD
Note 4
PRE
tRP
MRS
2CLK
ACT
1RWHV W5'/
&/. LV VXSSRUWHG
W%'/ &/. /DVW GDWD LQ WR EXUVW VWRS GHOD\ 5HDG RU ZULWH EXUVW VWRS FRPPDQG LV YDOLG DW HYHU\ EXUVW OHQJWK 1XPEHU RI YDOLG RXWSXW GDWD DIWHU URZ SUHFKDUJH RU EXUVW VWRS IRU &$6 ODWHQF\ WLYHO\ UHVSHF
35( $OO EDQNV SUHFKDUJH LV QHFHVVDU\ 056 FDQ EH LVVXHG RQO\ DW DOO EDQNV SUHFKDUJH VWDWH
Figure 87.12 Mode Register Set
May 12, 2005 SDRAM_04_A0
S73WS256N Based MCPs
225
Preliminary
1) Clock Suspend (= Active Power Down) Exit CLK CKE Internal CLK CMD
Note 1
2) Power Down (= Precharge Power Down) Exit CLK
tSS
CKE Internal CLK RD CMD
Note 2
tSS
NOP ACT
Figure 87.13 Clock Suspend Exit and Power Down Exit
87.5 Auto Refresh
$Q DXWR UHIUHVK FRPPDQG LV LVVXHG E\ KDYLQJ &6 5$6 DQG &$6 KHOG ORZ ZLWK &.( DQG :( KLJK DW WKH ULVLQJ HGJH RI WKH FORFN &/. $OO EDQNV PXVW EH SUHFKDUJHG DQG LGOH IRU W53PLQ EHIRUH WKH DXWR UHIUHVK FRPPDQG LV DSSOLHG 1R FRQWURO RI WKH H[WHUQDO DGGUHVV SLQV LV UHTXLUHG RQFH WKLV F\FOH KDV VWDUWHG EHFDXVH RI WKH LQWHUQDO DGGUHVV FRXQWHU :KHQ WKH UH IUHVK F\FOH KDV FRPSOHWHG DOO EDQNV ZLOO EH LQ WKH LGOH VWDWH $ GHOD\ EHWZHHQ WKH DXWR UHIUHVK FRPPDQG DQG WKH QH[W DFWLYDWH FRPPDQG RU VXEVHTXHQW DXWR UHIUHVK FRPPDQG PXVW EH JUHDWHU WKDQ RU HTXDO WR WKH W$5)&PLQ
CLK Command CKE = High
PRE Aut o Refresh
~ ~
CMD
tRP
tARFC(min)
Figure 87.14 Auto Refresh
87.6 Self Refresh
$ 6HOI 5HIUHVK FRPPDQG LV GHILQHG E\ KDYLQJ &6 5$6 &$6 DQG &.( KHOG ORZ ZLWK :( KLJK DW WKH ULVLQJ HGJH RI WKH FORFN 2QFH WKH VHOI 5HIUHVK FRPPDQG LV LQLWLDWHG &.( PXVW EH KHOG ORZ WR NHHS WKH GHYLFH LQ 6HOI 5HIUHVK PRGH $IWHU FORFN F\FOH IURP WKH VHOI UHIUHVK FRPPDQG DOO RI WKH H[WHUQDO FRQWURO VLJQDOV LQFOXGLQJ V\VWHP FORFN &/. FDQ EH GLVDEOHG H[ FHSW &.( 7KH FORFN LV LQWHUQDOO\ GLVDEOHG GXULQJ 6HOI 5HIUHVK RSHUDWLRQ WR UHGXFH SRZHU 7R H[LW WKH 6HOI 5HIUHVK PRGH VXSSO\ VWDEOH FORFN LQSXW EHIRUH UHWXUQLQJ &.( KLJK DVVHUW GHVH OHFW RU 123 FRPPDQG DQG WKHQ DVVHUW &.( KLJK ,Q FDVH WKDW WKH V\VWHP XVHV EXUVW DXWR UHIUHVK GXULQJ QRUPDO RSHUDWLRQ LW LV UHFRPPHQGHG WR XVH EXUVW DXWR UHIUHVK F\FOH LPPHGL DWHO\ EHIRUH HQWHULQJ VHOI UHIUHVK PRGH DQG DIWHU H[LWLQJ LQ VHOI UHIUHVK PRGH 2Q WKH RWKHU KDQG LI WKH V\VWHP XVHV WKH GLVWULEXWHG DXWR UHIUHVK WKH V\VWHP RQO\ KDV WR NHHS WKH UHIUHVK GXW\ F\FOH
CLK Command CKE
tSS
Self Refresh
~ ~
~ ~
~ ~
~ ~
Stable Clock
NOP
~ ~
~ ~
~ ~
tSS
Figure 87.15
Self Refresh
226
S73WS256N Based MCPs
~ ~
tSRFX(min)
~ ~
ACT
SDRAM_04_A0 May 12, 2005
Preliminary
88 Burst Type Control
%DVLF 0RGH 5DQGRP 0RGH 6HTXHQWLDO &RXQWLQJ ,QWHUOHDYH &RXQWLQJ 5DQGRP FROXPQ $FFHVV &/. W&&' 6HH WKH %XUVW 6HTXHQFH 7DEOH %/ $W 056 $ %/ DQG IXOO SDJH $W 056 $ 6HH WKH %XUVW 6HTXHQFH 7DEOH %/ %/ $W %/ ,QWHUOHDYH &RXQWLQJ 6HTXHQWLDO &RXQWLQJ (YHU\ F\FOH 5HDG:ULWH &RPPDQG ZLWK UDQGRP FROXPQ DGGUHVV FDQ UHDOL]H 5DQGRP &ROXPQ $FFHVV 7KDW LV VLPLODU WR ([WHQGHG 'DWD 2XW ('2 2SHUDWLRQ RI FRQYHQWLRQDO '5$0
89 Burst Length Control
%DVLF 0RGH )XOO 3DJH 6SHFLDO 0RGH 5DQGRP 0RGH %56: %XUVW 6WRS 5$6 ,QWHUUXSW ,QWHUUXSWHG E\ 3UHFKDUJH &$6 ,QWHUUXSW $W 056 $ $W DXWR SUHFKDUJH W5$6 VKRXOG QRW EH YLRODWHG $W 056 $ $W DXWR SUHFKDUJH W5$6 VKRXOG QRW EH YLRODWHG $W 056 $ $W 056 $
$W 056 $ :UDS DURXQG PRGH LQILQLWH EXUVW OHQJWK VKRXOG EH VWRSSHG E\ EXUVW VWRS 5$6 LQWHUUXSW RU &$6 LQWHUUXSW $W 056 $ 5HDG EXUVW IXOO SDJH ZULWH %XUVW $W DXWR SUHFKDUJH RI ZULWH W5$6 VKRXOG QRW EH YLRODWHG W%'/ 9DOLG '4 DIWHU EXUVW VWRS LV IRU &$6 ODWHQF\ UHVSHFWLYHO\ 8VLQJ EXUVW VWRS FRPPDQG DQ\ EXUVW OHQJWK FRQWURO LV SRVVLEOH %HIRUH WKH HQG RI EXUVW 5RZ SUHFKDUJH FRPPDQG RI WKH VDPH EDQN VWRSV UHDG ZULWH EXUVW ZLWK 5RZ SUHFKDUJH W5'/ ZLWK '40 YDOLG '4 DIWHU EXUVW VWRS LV IRU &$6 ODWHQF\ UHVSHFWLYHO\ 'XULQJ UHDGZULWH EXUVW ZLWK DXWR SUHFKDUJH 5$6 LQWHUUXSW FDQ QRW EH LVVXHG %HIRUH WKH HQG RI EXUVW QHZ UHDGZULWH VWRSV UHDGZULWH EXUVW DQG VWDUWV QHZ UHDGZULWH EXUVW 'XULQJ UHDGZULWH EXUVW ZLWK DXWR SUHFKDUJH &$6 LQWHUUXSW FDQ QRW EH LVVXHG
,QWHUUXSW 0RGH
May 12, 2005 SDRAM_04_A0
S73WS256N Based MCPs
227
Preliminary
90 Function Truth Table 1
Current State CS# + / / ,'/( / / / / / + / / 5RZ $FWLYH / / / / / + / / 5HDG / / / / / + / / :ULWH / / / / / + 5HDG ZLWK $XWR 3UHFKDUJH / / / / / + :ULWH ZLWK $XWR 3UHFKDUJH / / / / / + / 3UHFKDUJLQJ / / / / RAS# ; + + + / / / / ; + + + + / / / ; + + + + / / / ; + + + + / / / ; + + + / / ; + + + / / ; + + + / / CAS# ; + + / + + / / ; + + / / + + / ; + + / / + + / ; + + / / + + / ; + + / + / ; + + / + / ; + + / + + WE# ; + / ; + / + / ; + / + / + / ; ; + / + / + / ; ; + / + / + / ; ; + / ; ; ; ; + / ; ; ; ; + / ; + / BA ; ; ; %$ %$ %$ ; 23 FRGH ; ; ; %$ %$ %$ %$ ; ; ; ; %$ %$ %$ %$ ; ; ; ; %$ %$ %$ %$ ; ; ; ; %$ %$ ; ; ; ; %$ %$ ; ; ; ; %$ %$ %$ Address ; ; ; 5$ $$3 ; 23 FRGH ; ; ; 123 123 ,//(*$/ 5RZ 123 $XWR 5HIUHVK RU 6HOI 5HIUHVK 0RGH 5HJLVWHU $FFHVV 123 123 ,//(*$/ %DQN $FWLYH /DWFK 5$ Action Note
&$ $$3 ,//(*$/
&$ $$3 %HJLQ 5HDG ODWFK &$ GHWHUPLQH $3 &$ $$3 %HJLQ 5HDG ODWFK &$ GHWHUPLQH $3 5$ $$3 ; ; ; ; ,//(*$/ 3UHFKDUJH ,//(*$/ 123 &RQWLQXH %XUVW WR (QG ! 5RZ $FWLYH 123 &RQWLQXH %XUVW WR (QG ! 5RZ $FWLYH 7HUP EXUVW ! 5RZ DFWLYH
&$ $$3 7HUP EXUVW 1HZ 5HDG 'HWHUPLQH $3 &$ $$3 7HUP EXUVW 1HZ :ULWH 'HWHUPLQH $3 5$ $$3 ; ; ; ; ,//(*$/ 7HUP EXUVW 3UHFKDUJH WLPLQJ IRU 5HDGV ,//(*$/ 123 &RQWLQXH %XUVW WR (QG ! 5RZ $FWLYH 123 &RQWLQXH %XUVW WR (QG ! 5RZ $FWLYH 7HUP EXUVW ! 5RZ DFWLYH
&$ $$3 7HUP EXUVW 1HZ UHDG 'HWHUPLQH $3 &$ $$3 7HUP EXUVW 1HZ :ULWH 'HWHUPLQH $3 5$ $$3 ; ; ; ; 5$ 5$ ; ; ; ; 5$ 5$ ; ; ; ; &$ 5$ $$3 ,//(*$/ 7HUP EXUVW SUHFKDUJH WLPLQJ IRU :ULWHV ,//(*$/ 123 &RQWLQXH %XUVW WR (QG ! 3UHFKDUJH 123 &RQWLQXH %XUVW WR (QG ! 3UHFKDUJH ,//(*$/ ,//(*$/ ,//(*$/ 123 &RQWLQXH %XUVW WR (QG ! 3UHFKDUJH 123 &RQWLQXH %XUVW WR (QG ! 3UHFKDUJH ,//(*$/ ,//(*$/ ,//(*$/ 123 ! ,GOH DIWHU W53 123 ! ,GOH DIWHU W53 ,//(*$/ ,//(*$/ ,//(*$/ 123 ! ,GOH DIWHU W53
&$ $$3 ,//(*$/
&$ $$3 ,//(*$/

228
S73WS256N Based MCPs
SDRAM_04_A0 May 12, 2005
Preliminary
/ + / 5RZ $FWLYDWLQJ / / / / / + / 5HIUHVKLQJ / / / + 0RGH 5HJLVWHU $FFHVVLQJ / / / /
/ ; + + + / / / ; + + / / ; + + + /
/ ; + + / + + / ; + / + / ; + + / ;
; ; + / ; + / ; ; ; ; ; ; ; + / ; ;
; ; ; ; %$ %$ %$ ; ; ; ; ; ; ; ; ; ; ;
; ; ; ; &$ 5$ $$3 ; ; ; ; ; ; ; ; ; ; ;
,//(*$/ 123 ! 5RZ $FWLYH DIWHU W5&' 123 ! 5RZ $FWLYH DIWHU W5&' ,//(*$/ ,//(*$/ ,//(*$/ ,//(*$/ ,//(*$/ 123 ! ,GOH DIWHU W5& 123 ! ,GOH DIWHU W5& ,//(*$/ ,//(*$/ ,//(*$/ 123 ! ,GOH DIWHU FORFNV 123 ! ,GOH DIWHU FORFNV ,//(*$/ ,//(*$/ ,//(*$/
/HJHQG 5$ 5RZ $GGUHVV %$ GUHVV $3 $XWR 3UHFKDUJH
%DQN $GGUHVV 123
1R 2SHUDWLRQ &RPPDQG &$
&ROXPQ $G
1RWHV $OO HQWULHV DVVXPH WKH &.( ZDV DFWLYH +LJK GXULQJ WKH SUHFKDUJH FORFN DQG WKH FXUUHQW FORFN F\FOH ,OOHJDO WR EDQN LQ VSHFLILHG VWDWH )XQFWLRQ PD\ EH OHJDO LQ WKH EDQN LQGLFDWHG E\ %$ GHSHQGLQJ RQ WKH VWDWH RI WKDW EDQN 0XVW VDWLVI\ EXV FRQWHQWLRQ EXV WXUQ DURXQG DQGRU ZULWH UHFRYHU\ UHTXLUHPHQWV 123 WR EDQN SUHFKDUJLQJ RU LQ LGOH VWDWH 0D\ SUHFKDUJH EDQN LQGLFDWHG E\ %$ DQG $$3 ,OOHJDO LI DQ\ EDQN LV QRW LGOH
May 12, 2005 SDRAM_04_A0
S73WS256N Based MCPs
229
Preliminary
91 Function Truth Table 2
Current State CKE (n-1) + / 6HOI 5HIUHVK / / / / / + $OO %DQNV 3UHFKDUJH 3RZHU 'RZQ / / / / / / + + + $OO %DQNV ,GOH + + + + + / $Q\ 6WDWH RWKHU WKDQ/LVWHGD ERYH + + / / CKE n ; + + + + + / ; + + + + + / + / / / / / / / / + / + / CS# ; + / / / / ; ; + / / / / ; ; + / / / / / / ; ; ; ; ; RAS# ; ; + + + / ; ; ; + + + / ; ; ; + + + / / / ; ; ; ; ; CAS# ; ; + + / ; ; ; ; + + / ; ; ; ; + + / + / / ; ; ; ; ; WE# ; ; + / ; ; ; ; ; + / ; ; ; ; ; + / ; + + / ; ; ; ; ; Address ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; 5$ ; ; ; ; ; ; Action ([LW 6HOI 5HIUHVK ! ,GOH DIWHU ([LW 6HOI 5HIUHVK ! ,GOH DIWHU WV5); ([LW 6HOI 5HIUHVK ! ,GOH DIWHU WV5); ,//(*$/ ,//(*$/ ,//(*$/ 123 0DLQWDLQ 6HOI 5HIUHVK ,19$/,' ([LW 3RZHU 'RZQ ! $%, ([LW 3RZHU 'RZQ ! $%, ,//(*$/ ,//(*$/ ,//(*$/ 123 0DLQWDLQ /RZ 3RZHU 0RGH 5HIHU WR )XQFWLRQ 7UXWK 7DEOH (QWHU 3RZHU 'RZQ (QWHU 3RZHU 'RZQ ,//(*$/ ,//(*$/ 5RZ %DQN $FWLYH (QWHU 6HOI 5HIUHVK 123 5HIHU WR )XQFWLRQ 7UXWK 7DEOH %HJLQ &ORFN 6XVSHQG QH[W F\FOH ([LW &ORFN 6XVSHQG QH[W F\FOH 0DLQWDLQ &ORFN 6XVSHQG Note
23 &RGH 0RGH 5HJLVWHU $FFHVV
/HJHQG $%,
$OO %DQNV ,GOH 5$
5RZ $GGUHVV
1RWHV &.( ORZ WR KLJK WUDQVLWLRQ LV DV\QFKURQRXV &.( ORZ WR KLJK WUDQVLWLRQ LV DV\QFKURQRXV LI UHVWDUWV LQWHUQDO FORFN $ PLQLPXP VHWXS WLPH &/. W66 PXVW EH VDWLVILHG EHIRUH DQ\ FRPPDQG RWKHU WKDQ H[LW 3RZHU GRZQ DQG VHOI UHIUHVK FDQ EH HQWHUHG RQO\ IURP WKH DOO EDQNV LGOH VWDWH 0XVW EH D OHJDO FRPPDQG
230
S73WS256N Based MCPs
SDRAM_04_A0 May 12, 2005
Preliminary
92 Timing Diagrams
0
CLOCK
1
2
3
4
5
6
7
8
9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25
CKE
Hi
CS#
RAS#
CAS#
ADDR
Key
Key
RAa
BA0
BA1
A10/AP
RAa
DQ
Hi-Z
Hi-Z
WE#
DQM
High level is necessar y tRP
Precharge (All Bank) Auto Refresh
tARFC
Auto Refresh
tARFC
Normal MRS Extended MRS Row Active (A-Bank)
: Don't care
1RWHV $SSO\ SRZHU DQG DWWHPSW WR PDLQWDLQ &.( DW D KLJK VWDWH DQG DOO RWKHU LQSXWV PD\ EH XQGHILQHG $SSO\ 9'' EHIRUH RU DW WKH VDPH WLPH DV 9''4 0DLQWDLQ VWDEOH SRZHU VWDEOH FORFN DQG 123 LQSXW FRQGLWLRQ IRU D PLQLPXP RI V ,VVXH SUHFKDUJH FRPPDQGV IRU DOO EDQNV RI WKH GHYLFHV ,VVXH RU PRUH DXWRUHIUHVK FRPPDQGV ,VVXH D PRGH UHJLVWHU VHW FRPPDQG WR LQLWLDOL]H WKH PRGH UHJLVWHU ,VVXH D H[WHQGHG PRGH UHJLVWHU VHW FRPPDQG WR GHILQH '6 RU 3$65 RSHUDWLQJ W\SH RI WKH GHYLFH DIWHU QRUPDO 056 (056 F\FOH LV QRW PDQGDWRU\ DQG WKH (056 FRPPDQG QHHGV WR EH LVVXHG RQO\ ZKHQ '6 RU 3$65 LV XVHG 7KH GHIDXOW VWDWH ZLWKRXW (056 FRPPDQG LVVXHG LV KDOI GULYHU VWUHQJWK DQG IXOO DUUD\ UHIUHVKHG 7KH GHYLFH LV QRZ UHDG\ IRU WKH RSHUDWLRQ VHOHFWHG E\ (056 )RU RSHUDWLQJ ZLWK '6 RU 3$65 VHW '6 RU 3$65 PRGH LQ (056 VHWWLQJ VWDJH ,Q RUGHU WR DGMXVW DQRWKHU PRGH LQ WKH VWDWH RI '6 RU 3$65 PRGH DGGLWLRQDO (056 VHW LV UHTXLUHG EXW SRZHU XS VHTXHQFH LV QRW QHHGHG DJDLQ DW WKLV WLPH ,Q WKDW FDVH DOO EDQNV KDYH WR EH LQ LGOH VWDWH SULRU WR DGMXVWLQJ (056 VHW
Figure 92.1
Power Up Sequence
May 12, 2005 SDRAM_04_A0
S73WS256N Based MCPs
231
Preliminary
0
CLOCK
1
2
3
tCH 4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
tCC
CKE
*Note 1
tCL tRAS tRC HIGH tSH tRP
CS#
tRCD tSH
RAS#
tSS
tSS
CAS#
tSH tSH tSS
Ca
*Note 2,3
ADDR
Ra
Cb
*Note 2,3
Cc
*Note 2,3 *Note 4
Rb
*Note 2
tSS
*Note 2
BA0,BA1
BS
BS
*Note 3
BS
*Note 3
BS
*Note 3
BS
*Note 4
BS
A10/AP
Ra
Rb
tSAC
DQ Qa
tSH
Db Qc
tSLZ
WE#
tOH
tSS tSS tSH
tSS tSH
DQM
Row Active
Read
Write
Read Precharge
Row Active
: Don't care
1RWHV $OO LQSXW H[FHSW &.( %DQN DFWLYH
'40 FDQ EH GRQ
W FDUH ZKHQ &6
LV KLJK DW WKH &/. KLJK JRLQJ HGJH
UHDGZULWH DUH FRQWUROOHG E\ %$ %$
Figure 92.2 Single Bit Read-Write-Read Cycle (Same Page) @CAS Latency=3, Burst Length=1
232
S73WS256N Based MCPs
SDRAM_04_A0 May 12, 2005
Preliminary
0
CLOCK
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
CKE
HIGH tRC
*Note 1
CS#
RAS#
*Note 2
CAS#
ADDR
Ra
Ca
Rb
Cb
BA0
BA1
A10/AP
Ra
Rb
tOH
CL=2 DQ CL=3 Qa0 Qa1 Qa2 Qa3 Db0 Db1 Db2 Db3
tRCD
tSAC tOH
Qa0 Qa1 Qa2
tSHZ
Qa3
*Note 4
tRDL
Db0
Db1
Db2
Db3
tSAC
WE#
tSHZ
*Note 4
tRDL
DQM
Row Active (A-Bank)
Read (A-Bank)
Precharge (A-Bank)
Row Active (A-Bank)
Write (A-Bank)
Precharge (A-Bank)
: Don't care
1RWHV 0LQLPXP URZ F\FOH WLPHV LV UHTXLUHG WR FRPSOHWH LQWHUQDO '5$0 RSHUDWLRQ 5RZ SUHFKDUJH FDQ LQWHUUXSW EXUVW RQ DQ\ F\FOH >&$6 /DWHQF\ @ QXPEHU RI YDOLG RXWSXW GDWD LV DYDLODEOH DIWHU 5RZ SUHFKDUJH /DVW YDOLG RXWSXW ZLOO EH +L= W6+= DIWHU WKH FORFN 2XWSXW ZLOO EH +L= DIWHU WKH HQG RI EXUVW )XOO SDJH ELW EXUVW
Figure 92.3
Read & Write Cycle at Same Bank @Burst Length=4, tRDL=2CLK
May 12, 2005 SDRAM_04_A0
S73WS256N Based MCPs
233
Preliminary
0
CLOCK
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
CKE
HIGH tRC
*Note 1
CS#
RAS#
*Note 2
CAS#
ADDR
Ra
Ca
Rb
Cb
BA0
BA1
A10/AP
Ra
Rb
tOH
CL=2 DQ CL=3 Qa0 Qa1 Qa2 Qa3 Db0 Db1 Db2 Db3
tRCD
tSAC tOH
Qa0 Qa1 Qa2
tSHZ
Qa3
*Note 4
tRDL
Db0
Db1
Db2
Db3
tSAC
WE#
tSHZ
*Note 4
tRDL
DQM
Row Active (A-Bank)
Read (A-Bank)
Precharge (A-Bank)
Row Active (A-Bank)
Write (A-Bank)
Precharge (A-Bank)
: Don't care
1RWHV 7R ZULWH GDWD EHIRUH EXUVW UHDG HQGV '40 VKRXOG EH DVVHUWHG WKUHH F\FOH SULRU WR ZULWH FRPPDQG WR DYRLG EXV FRQWHQWLRQ 5RZ SUHFKDUJH ZLOO LQWHUUXSW ZULWLQJ /DVW GDWD LQSXW W5'/ EHIRUH 5RZ SUHFKDUJH ZLOO EH ZULWWHQ '40 VKRXOG PDVN LQYDOLG LQSXW GDWD RQ SUHFKDUJH FRPPDQG F\FOH ZKHQ DVVHUWLQJ SUHFKDUJH EHIRUH HQG RI EXUVW ,QSXW GDWD DIWHU 5RZ SUHFKDUJH F\FOH ZLOO EH PDVNHG LQWHUQDOO\ W'$/ODVW GDWD LQ WR DFWLYH GHOD\ LV &/. W53
Figure 92.4 Read & Write Cycle at Same Bank @Burst Length=4, tRDL=2CLK
234
S73WS256N Based MCPs
SDRAM_04_A0 May 12, 2005
Preliminary
0
CLOCK
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
CKE
*Note 1
HIGH
CS#
RAS#
*Note 2
CAS#
ADDR
RAa
RBb
CAa
RCc
CBb
RDd
CCc
CDd
BA0
BA1
A10/AP
RAa
RBb
RCc
RDd
CL=2 DQ CL=3
QAa0 QAa1 QAa2 QBb0 QBb1 QBb2 QCc0 QCc1 QCc2 QDd0 QDd1 QDd2
QAa0 QAa1 QAa2 QBb0 QBb1 QBb2 QCc0 QCc1 QCc2 QDd0 QDd1 QDd2
WE#
DQM
Row Active (A-Bank)
Read (A-Bank) Row Active (B-Bank)
Read (B-Bank) Row Active (C-Bank)
Read (C-Bank) Row Active (D-Bank)
Read (D-Bank) Precharge (C-Bank)
Precharge (D-Bank)
Precharge (A-Bank)
Precharge (B-Bank)
: Don't care
1RWHV &6 FDQ EH GRQ
W FDUHG ZKHQ 5$6 &$6
DQG :(
DUH KLJK DW WKH FORFN KLJK JRLQJ HGJH
7R LQWHUUXSW D EXUVW UHDG E\ URZ SUHFKDUJH ERWK WKH UHDG DQG WKH SUHFKDUJH EDQNV PXVW EH WKH VDPH
Figure 92.5
Page Read Cycle at Different Bank @Burst Length=4
May 12, 2005 SDRAM_04_A0
S73WS256N Based MCPs
235
Preliminary
0
CLOCK
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
CKE
HIGH
CS#
RAS#
*Note 2
CAS#
ADDR
RAa
RAb
CAa
CBb
RCc
RDd
CCc
CDd
BA0
BA1
A10/AP
RAa
RBb
RCc
RDd
DQ
DAa0 DAa1 DAa2 DAa3 DBb0 DBb1 DBb2 DBb3 DCc0 DCc1 DDd0 DDd1 DDd2
tCDL
WE#
*Note 1
tRDL
DQM
Row Active (A-Bank)
Write (A-Bank) Row Active (B-Bank)
Write (B-Bank) Row Active (C-Bank)
Row Active (D-Bank) Write (C-Bank)
Write (D-Bank)
Precharge (All Banks)
: Don't care
1RWHV 7R LQWHUUXSW EXUVW ZULWH E\ 5RZ SUHFKDUJH '40 VKRXOG EH DVVHUWHG WR PDVN LQYDOLG LQSXW GDWD 7R LQWHUUXSW EXUVW ZULWH E\ 5RZ SUHFKDUJH ERWK WKH ZULWH DQG WKH SUHFKDUJH EDQNV PXVW EH WKH VDPH
Figure 92.6
Page Write Cycle at Different Bank @Burst Length=4, tRDL=2CLK
236
S73WS256N Based MCPs
SDRAM_04_A0 May 12, 2005
Preliminary
0
CLOCK
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
CKE
HIGH
CS#
RAS#
CAS#
ADDR
RAa
CAa
RDb
CDb
RBc
CBc
BA0
BA1
A10/AP
RAa
RDb
RBc
tCDL
*Note 1
DQ
{
CL=2
QAa0 QAa1 QAa2 QAa3
DDb0 DDb1 DDb2 DDb3
QBc0 QBc1 QBc2
CL=3
QAa0 QAa1 QAa2 QAa3
DDb0 DDb1 DDb2 DDb3
QBc0 QBc1
WE#
DQM
Row Active (A-Bank)
Read (A-Bank)
Precharge (A-Bank) Row Active (D-Bank)
Write (D-Bank) Row Active (B-Bank)
Read (B-Bank)
: Don't care
1RWHV W&'/ VKRXOG EH PHW WR FRPSOHWH ZULWH
Figure 92.7 Read & Write Cycle at Different Bank @Burst Length=4
May 12, 2005 SDRAM_04_A0
S73WS256N Based MCPs
237
Preliminary
0
CLOCK
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
CKE
HIGH
CS#
RAS#
CAS#
ADDR
RAa
RBb
CAa
CBb
RAc
CAc
BA0
BA1
A10/AP
RAa
RBb
RAc
DQ CL=2
QAa0 QAa1 QBb0 QBb1 QBb2 DBb3
DAc0 DAc1
CL=3
QAa0 QAa1 QBb0 QBb1 QBb2 DBb3
DAc0 DAc1
WE#
DQM
Row Active (A-Bank)
Read with Auto Pre charge (A-Bank) Row Active (B-Bank)
Read without Auto Precharge(B-Bank) Auto Precharge Start Point (A-Bank) *Note1
Precharge (B-Bank)
Row Active (A-Bank)
Write with Auto Precharge (A-Bank)
: Don't care
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Figure 92.8
Read & Write Cycle with Auto Precharge I @Burst Length=4
238
S73WS256N Based MCPs
SDRAM_04_A0 May 12, 2005
Preliminary
0
CLOCK
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
CKE
HIGH
CS#
RAS#
CAS#
ADDR
Ra
Ca
Rb
Cb
BA0
BA1
A10/AP
Ra
Rb
DQ CL=2
Qa0
Qa1
Qa2
Qa3
Qb0
Qb1
Qb2
Qb3
CL=3
Qa0
Qa1
Qa2
Qa3
Qb0
Qb1
Qb2
Qb3
WE#
DQM
*Note1
Row Active (A-Bank)
Read with Auto Precharge (A-Bank)
Auto Precharge Start Point (A-Bank) Row Active (B-Bank)
Read with Auto Precharge (B-Bank)
Auto Precharge Start Point (B-Bank)
: Don't care
1RWHV $Q\ FRPPDQG WR $EDQN LV QRW DOORZHG LQ WKLV SHULRG W53 LV GHWHUPLQHG IURP DW DXWR SUHFKDUJH VWDUW SRLQW
Figure 92.9
Read & Write Cycle with Auto Precharge 2 @Burst Length=4
May 12, 2005 SDRAM_04_A0
S73WS256N Based MCPs
239
Preliminary
0
CLOCK
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
CKE
CS#
RAS#
CAS#
ADDR
Ra
Ca
Cb
Cc
BA0
BA1
A10/AP
Ra
DQ
Qa0
Qa1
Qa2
Qa3
Qb0
Qb1
Dc0
Dc2
tSHZ
WE#
tSHZ
*Note 1
DQM
Row Active
Read
Clock Suspension
Read
Read DQM
Write DQM Write Clock Suspension
Write DQM
: Don't care
1RWHV '40 LV QHHGHG WR SUHYHQW EXV FRQWHQWLRQ
Figure 92.10
Clock Suspension & DQM Operation Cycle @CAS Latency=2, Burst Length=4
240
S73WS256N Based MCPs
SDRAM_04_A0 May 12, 2005
Preliminary
0
CLOCK
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
CKE
HIGH
CS#
RAS#
CAS#
ADDR
RAa
CAa
CAb
BA0
BA1
A10/AP
RAa 1 1 QAb0 QAb1 QAb2 QAb3 QAb4 QAb5
DQ
{
CL=2
QAa0 QAa1 QAa2 QAa3 QAa4
2 QAa0 QAa1 QAa2 QAa3 QAa4
2 QAb0 QAb1 QAb2 QAb3 QAb4 QAb5
CL=3
WE#
DQM
Row Active (A-Bank)
Read (A-Bank)
Burst Stop
Read (A-Bank)
Precharge (A-Bank)
: Don't care
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Figure 92.11
Read Interrupted by Precharge Command & Read Burst Stop Cycle @Full Page Burst
May 12, 2005 SDRAM_04_A0
S73WS256N Based MCPs
241
Preliminary
0
CLOCK
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
CKE
HIGH
CS#
RAS#
CAS#
ADDR
RAa
CAa
CAb
BA0
BA1
A10/AP
RAa
*Note 1
tBDL
*Note 1,2
tRDL
DQ
DAa0 DAa1 DAa2 DAa3 DAa4
DAb0 DAb1 DAb2 DAb3 DAb4 DAb5
WE
DQM
Row Active (A-Bank)
Write (A-Bank)
Burst Stop
Write (A-Bank)
Precharge (A-Bank)
: Don't care
1RWHV $W IXOO SDJH PRGH EXUVW LV ILQLVKHG E\ EXUVW VWRS RU SUHFKDUJH 'DWDLQ DW WKH F\FOH RI LQWHUUXSWHG E\ SUHFKDUJH FDQ QRW EH ZULWWHQ LQWR WKH FRUUHVSRQGLQJ PHPRU\ FHOO ,W LV GHILQHG E\ $& SDUDPHWHU RI W5'/ '40 DW ZULWH LQWHUUXSWHG E\ SUHFKDUJH FRPPDQG LV QHHGHG WR SUHYHQW LQYDOLG ZULWH '40 VKRXOG PDVN LQYDOLG LQSXW GDWD RQ SUHFKDUJH FRPPDQG F\FOH ZKHQ DVVHUWLQJ SUHFKDUJH EHIRUH HQG RI EXUVW ,QSXW GDWD DIWHU 5RZ SUHFKDUJH F\FOH ZLOO EH PDVNHG LQWHUQDOO\ %XUVW VWRS LV YDOLG DW HYHU\ EXUVW OHQJWK
Figure 92.12 Write Interrupted by Precharge Command & Write Burst Stop Cycle @ Full Page Burst, tRDL=2CLK
242
S73WS256N Based MCPs
SDRAM_04_A0 May 12, 2005
Preliminary
0
CLOCK
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
CKE
HIGH
CS#
RAS#
*Note 2
CAS#
ADDR
RAa
CAa
RBb
CAb
RCc
CBc
CCd
BA0
BA1
A10/AP
RAa
RBb
RCc
CL=2 DQ CL=3
DAa0
QAb0 QAb1
DBc0
QCd0 QCd1
DAa0
QAb0 QAb1
DBc0
QCd0 QCd1
WE#
DQM
Row Active (A-Bank)
Row Active (B-Bank) Write Read with (A-Bank) Auto Precharge (A-Bank)
Row Active (C-Bank) Write with Auto Precharge (B-Bank)
Read (C-Bank)
Precharge (C-Bank)
: Don't care
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Figure 92.13
Burst Read Single bit Write Cycle @Burst Length=2
May 12, 2005 SDRAM_04_A0
S73WS256N Based MCPs
243
Preliminary
0
CLOCK
1
2
3
~ ~ ~ ~
4
5
6
7
8
9
~ ~
10
11
12
13
14
15
16
17
18
19
tSS
CKE
*Note 1 *Note 2
tSS
~ ~ ~ ~
tSS
*Note 2
*Note 3
~ ~
~ ~
~ ~
~ ~
~ ~
CAS# ~ ~ ~ ~ Ra ~ ~
~ ~
~ ~
~ ~
RAS#
~ ~
~ ~
CS#
~ ~
~ ~
~ ~
~ ~
~ ~
~ ~
~ ~
~ ~
~ ~
A10/AP
Ra
~ ~
~ ~
BA
~ ~
~ ~
ADDR
Ca
DQ
Qa0
Qa1
Qa2
~ ~
~ ~
~ ~
~ ~
Precharge Power-down Entry
Row Active
~ ~
DQM
~ ~
~ ~
WE#
~ ~
tSHZ
Read
Precharge
Precharge Power-down Exit
Active Power-down Entry
Active Power-down Exit
: Don't care
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Figure 92.14 Active/Precharge Power Down Mode @CAS Latency=2, Burst Length=4
244
S73WS256N Based MCPs
SDRAM_04_A0 May 12, 2005
Preliminary
0
CLOCK
1
2
3
4
5
6
~ ~ ~ ~
7
8
9
10
11
12
13
~ ~
14
15
16
17
18
19
*Note 2 *Note 1
*Note 4
tSRFX
tSS
CS#
~ ~
~ ~
CKE
*Note 3
~ ~
RAS#
~ ~ ~ ~
~ ~
~ ~
~ ~
CAS#
~ ~
~ ~
ADDR
BA0,BA1
~ ~ ~ ~
~ ~
~ ~
~ ~
A10/AP
DQ
Hi-Z
Hi-Z
~ ~
~ ~
~ ~
~ ~
~ ~
Self Refresh Entry
Self Refresh Exit
~ ~
DQM
~ ~
~ ~
WE#
~ ~
~ ~
~ ~
~ ~
~ ~
~ ~
~ ~
~ ~
~ ~
~ ~
~ ~
~ ~
*Note 6
Auto Refresh
: Don't care
1RWHV 7R (QWHU 6HOI 5HIUHVK 0RGH &6 5$6 &$6 ZLWK &.( VKRXOG EH ORZ DW WKH VDPH FORFN F\FOH $IWHU FORFN F\FOH DOO WKH LQSXWV LQFOXGLQJ WKH V\VWHP FORFN FDQ EH GRQ
W FDUH H[FHSW IRU &.( 7KH GHYLFH UHPDLQV LQ VHOI UHIUHVK PRGH DV ORQJ DV &.( VWD\V /RZ 2QFH WKH GHYLFH HQWHUV VHOI UHIUHVK PRGH PLQLPXP W5$6 LV UHTXLUHG EHIRUH H[LW IURP VHOI UHIUHVK 7R ([LW 6HOI 5HIUHVK 0RGH 6\VWHP FORFN UHVWDUW DQG EH VWDEOH EHIRUH UHWXUQLQJ &.( KLJK &6 VWDUWV IURP KLJK 0LQLPXP W65); LV UHTXLUHG DIWHU &.( JRLQJ KLJK WR FRPSOHWH VHOI UHIUHVK H[LW . F\FOH 0E 0E RU . F\FOH 0E 0E RI EXUVW DXWR UHIUHVK LV UHTXLUHG EHIRUH VHOI UHIUHVK HQWU\ DQG DIWHU VHOI UHIUHVK H[LW LI WKH V\VWHP XVHV EXUVW UHIUHVK
Figure 92.15
Self Refresh Entry & Exit Cycle
May 12, 2005 SDRAM_04_A0
S73WS256N Based MCPs
245
Preliminary
Mode Register Set Cycle
0
CLOCK
Auto Refresh Cycle
5 6 0 1 2 3 4 5 6 7 8 9 10
1
2
3
4
CKE
HIGH
HIGH
CS#
*Note 2
tARFC
RAS#
*Note 1
CAS#
*Note 3
ADDR
Key
Ra
BA0
BA1
DQ
Hi-Z
Hi-Z
WE#
DQM
MRS
New Command
Auto Refresh
New Command
: Don't care
1RWHV 0RGH 5HJLVWHU 6HW &\FOH
246
S73WS256N Based MCPs
SDRAM_04_A0 May 12, 2005
Preliminary
&6 5$6 &$6 %$ %$ LQWHUQDO PRGH UHJLVWHU
:(
DFWLYDWLRQ DW WKH VDPH FORFN F\FOH ZLWK DGGUHVV NH\ ZLOO VHW
0LQLPXP FORFN F\FOHV VKRXOG EH PHW EHIRUH QHZ 5$6 DFWLYDWLRQ 3OHDVH UHIHU WR 0RGH 5HJLVWHU 6HW 056 $OO EDQNV SUHFKDUJH VKRXOG EH FRPSOHWHG EHIRUH 0RGH 5HJLVWHU 6HW F\FOH DQG DXWR UHIUHVK F\FOH
0
CLOCK
1
2
3
4
5
6
CKE
HIGH
CS#
*Note 2
RAS#
*Note 1
CAS#
*Note 3
ADDR
Key
Ra
BA0
BA1
DQ
Hi-Z
WE#
DQM
EMRS
New Command
: Don't care
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:(
DFWLYDWLRQ DW WKH VDPH FORFN F\FOH ZLWK DGGUHVV NH\ ZLOO VHW DFWLYDWLRQ
0LQLPXP FORFN F\FOHV VKRXOG EH PHW EHIRUH QHZ 5$6 3OHDVH UHIHU WR 0RGH 5HJLVWHU 6HW 056
Figure 92.16
Extended Mode Register Set Cycle
May 12, 2005 SDRAM_04_A0
S73WS256N Based MCPs
247
Preliminary
93 SDRAM Type 2 Revision Summary
Revision A (May 12, 2005)
,QLWLDO UHOHDVH
248
S73WS256N Based MCPs
SDRAM_04_A0 May 12, 2005
Advance
Information
94 MCP Revision Summary
Revision A (October 19, 2004)
,QLWLDO UHOHDVH
Revision A1 (May 31, 2005)
$GGHG 6'5$0 7\SH PRGXOH $GGHG )($ SDFNDJH GLDJUDP
Revision A2 (November 9, 2005)
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Revision A3 (December 16, 2005)
&RUUHFWHG SDFNDJH IURP )($ WR )7)
Colophon The products described in this document are designed, developed and manufactured as contemplated for general use, including without limitation, ordinary industrial use, general office use, personal use, and household use, but are not designed, developed and manufactured as contemplated (1) for any use that includes fatal risks or dangers that, unless extremely high safety is secured, could have a serious effect to the public, and could lead directly to death, personal injury, severe physical damage or other loss (i.e., nuclear reaction control in nuclear facility, aircraft flight control, air traffic control, mass transport control, medical life support system, missile launch control in weapon system), or (2) for any use where chance of failure is intolerable (i.e., submersible repeater and artificial satellite). Please note that Spansion LLC will not be liable to you and/or any third party for any claims or damages arising in connection with abovementioned uses of the products. Any semiconductor devices have an inherent chance of failure. You must protect against injury, damage or loss from such failures by incorporating safety design measures into your facility and equipment such as redundancy, fire protection, and prevention of over-current levels and other abnormal operating conditions. If any products described in this document represent goods or technologies subject to certain restrictions on export under the Foreign Exchange and Foreign Trade Law of Japan, the US Export Administration Regulations or the applicable laws of any other country, the prior authorization by the respective government entity will be required for export of those products. Trademarks and Notice The contents of this document are subject to change without notice. This document may contain information on a Spansion LLC product under development by Spansion LLC. Spansion LLC reserves the right to change or discontinue work on any product without notice. The information in this document is provided as is without warranty or guarantee of any kind as to its accuracy, completeness, operability, fitness for particular purpose, merchantability, non-infringement of third-party rights, or any other warranty, express, implied, or statutory. Spansion LLC assumes no liability for any damages of any kind arising out of the use of the information in this document. Copyright (c)2004-2005 Spansion LLC. All rights reserved. Spansion, the Spansion logo, and MirrorBit are trademarks of Spansion LLC. Other company and product names used in this publication are for identification purposes only and may be trademarks of their respective companies.
December 16, 2005 S73WS256N_00_A3
S73WS256N Based MCPs
249

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